# Power MOSFET, N Channel, 30 V, 130 A, 3000 µohm, DFN, Surface Mount ![Product image](https://novapart.co/image/farnell:2728030/) **URL**: https://novapart.co/products/NTMFS4834NT1G/power-mosfet-n-channel-30-v-130-a-3000-ohm-dfn **SKU**: NTMFS4834NT1G **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €1.0600 **Stock**: 25+ **Lead Time**: 2 days (indicative) ## Description Transistor Polarity:N Channel; Continuous Drain Current Id:130A; Drain Source Voltage Vds:30V; On Resistance Rds(on):0.0026ohm; Rds(on) Test Voltage Vgs:11.5V; Threshold Voltage Vgs:2.5V; Po ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | Lead (19-Jan-2021) | | No. Of Pins | 5Pins | | Channel Type | N Channel | | Product Range | - | | Qualification | - | | Power Dissipation | 86.2W | | Transistor Mounting | Surface Mount | | Rds(On) Test Voltage | 11.5V | | Transistor Case Style | DFN | | Drain Source Voltage Vds | 30V | | Operating Temperature Max | 150°C | | Continuous Drain Current Id | 130A | | Drain Source On State Resistance | 3000µohm | | Gate Source Threshold Voltage Max | 2.5V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2728030/) ## NTMFS4834N ## Power MOSFET ## **30 V, 130 A, Single N−Channel, SO−8FL** ## **Features** - Low R to Minimize Conduction Losses DS(on) - Low Capacitance to Minimize Driver Losses - Optimized Gate Charge to Minimize Switching Losses **http://onsemi.com** - These are Pb−Free Devices **V(BR)DSS RDS(ON) MAX ID MAX Applications** • Refer to Application Note AND8195/D 3.0 m @ 10 V 30 V 130 A • CPU Power Delivery 4.0 m @ 4.5 V • DC−DC Converters • Low Side Switching D (5,6) **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) **Parameter Symbol Value Unit** Drain−to−Source Voltage VDSS 30 V G (4) Gate−to−Source Voltage VGS ± 20 V Continuous Drain TA = 25 ° C ID 21 A S (1,2,3) Current R(Note 1) JA TA = 85 ° C 15 **N−CHANNEL MOSFET** ~~FTE~~ Power Dissipation TA = 25 ° C PD 2.31 W R JA (Note 1) **MARKING** ~~| LO~~ Continuous Drain TA = 25 ° C ID 13 A **DIAGRAM** Current R(Note 2)Power DissipationJA SteadyState TTAA = 85 = 25 °° CC PD 9.50.9 W **SO−8 FLAT LEAD** 1 SS 4834ND D ~~es~~ R JA (Note 2) ~~ee~~ **CASE 488AA** S AYWZZ Continuous Drain TC = 25 ° C ID 130 A **STYLE 1** G D Current R(Note 1) JC TC = 85 ° C 93 D ~~Po~~ Power Dissipation ~~|~~ T ~~Ee~~ C = 25 ° C PD ~~HW~~ 86.2 W AY = Assembly Location= Year R JC (Note 1) W = Work Week ~~oe|~~ =: _ Pulsed Drain TA = 25 ° C, IDM 260 A ZZ = Lot Traceability Current tp = 10 s ~~ee~~ Operating Junction and Storage ~~er~~ TJ ~~ee~~ , TSTG −55 to ° C Temperature +150 ~~{|}~~ Source Current (Body Diode) IS 71 A **ORDERING INFORMATION** Drain to Source DV/DT dV/dt 6 V/ns **Device Package Shipping**[†] Single Pulse Drain−to−Source Avalanche EAS 512 mJ Energy (TJ = 25 ° C, VDD = 30 V, VGS = 10 V, NTMFS4834NT1G SO−8FL 1500 Tape / Reel IL = 32 Apk, L = 1.0 mH, RG = 25 (Pb−Free) Lead Temperature for Soldering Purposes TL 260 ° C NTMFS4834NT3G SO−8FL 5000 Tape / Reel (1/8” from case for 10 s) (Pb−Free) ~~EE~~ Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended †For information on tape and reel specifications, Operating Conditions is not implied. Extended exposure to stresses above the including part orientation and tape sizes, please Recommended Operating Conditions may affect device reliability. refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. ## **Applications** - Refer to Application Note AND8195/D - CPU Power Delivery - DC−DC Converters - Low Side Switching Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 2. Surface−mounted on FR4 board using the minimum recommended pad size. Publication Order Number: **1** © Semiconductor Components Industries, LLC, 2012 **May, 2012 − Rev. 6** **NTMFS4834N/D** **NTMFS4834N** ## **THERMAL RESISTANCE MAXIMUM RATINGS** |**THERMAL RESISTANCE MAXIMUM RATINGS**|||| |---|---|---|---| |**Parameter**|**Symbol**|**Value**|**Unit**| |Junction−to−Case (Drain)|R�JC|1.45|°C/W| |Junction−to−Ambient – Steady State (Note 3)|R�JA|54|| |Junction−to−Ambient – Steady State (Note )|R�JA|138.7|| 3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 4. Surface−mounted on FR4 board using the minimum recommended pad size. **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) |**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)||||| |---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**|||||||| |Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|30|||V| |Drain−to−Source Breakdown Voltage
Temperature Coefficient|V(BR)DSS/
TJ||||21||mV/°C| |Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,
VDS= 24 V|TJ= 25°C|||1|�A| ||||TJ= 125°C|||10|| |Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS|=±20 V|||±100|nA| |**ON CHARACTERISTICS**(Note 5)|||||||| |Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID=|250�A|1.5||2.5|V| |Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||6.1||mV/°C| |Drain−to−Source On Resistance|RDS(on)|VGS= 10 V to
11.5 V|ID= 30 A||2.6|3.0|m�| ||||ID= 15 A||2.5||| |||VGS= 4.5 V|ID= 30 A||3.5|4.0|| ||||ID= 15 A||3.4||| |Forward Transconductance|gFS|VDS= 15 V, ID= 15 A|||35.2||S| |**CHARGES, CAPACITANCES & GATE RESISTANCE**|||||||| |Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 12 V|||4500||pF| |Output Capacitance|COSS||||960||| |Reverse Transfer Capacitance|CRSS||||500||| |Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V; ID= 30 A|||32|48|nC| |Threshold Gate Charge|QG(TH)||||5.4||| |Gate−to−Source Charge|QGS||||12||| |Gate−to−Drain Charge|QGD||||11||| |Total Gate Charge|QG(TOT)|VGS= 11.5 V, VDS= 15 V;
ID= 30 A|||74||nC| |**SWITCHING CHARACTERISTICS**(Note 6)|||||||| |Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 15 V, ID= 15 A,
RG= 3.0�|||20||ns| |Rise Time|tr||||34||| |Turn−Off Delay Time|td(OFF)||||22||| |Fall Time|tf||||23||| |Turn−On Delay Time|td(ON)|VGS= 11.5 V, VDS= 15 V,
ID= 15 A, RG= 3.0�|||11||ns| |Rise Time|tr||||23||| |Turn−Off Delay Time|td(OFF)||||37||| |Fall Time|tf||||15||| 5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 6. Switching characteristics are independent of operating junction temperatures. **http://onsemi.com** **2** ## **NTMFS4834N** ## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) |**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)||||| |---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||| |Forward Diode Voltage|VSD|VGS= 0 V,
IS= 30 A|TJ= 25°C||0.77|1.2|V| ||||TJ= 125°C||0.70||| |Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,
IS= 30 A|||34||ns| |Charge Time|ta||||18||| |Discharge Time|tb||||16||| |Reverse Recovery Charge|QRR||||25.9||nC| |**PACKAGE PARASITIC VALUES**|||||||| |Source Inductance|LS|TA= 25°C|||0.65||nH| |Drain Inductance|LD||||0.005||nH| |Gate Inductance|LG||||1.84||nH| |Gate Resistance|RG||||1.4||�| 5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 6. Switching characteristics are independent of operating junction temperatures. **http://onsemi.com** **3** **NTMFS4834N** ## **TYPICAL PERFORMANCE CURVES** **==> picture [238 x 173] intentionally omitted <==** **----- Start of picture text -----**
200
VGS = 5 to 6 V
180 TJ = 25 ° C 4.2 V
160
4.0 V
140
120
3.8 V
100
80 3.6 V
60
3.4 V
40
20 3.2 V
3.0 V
0
0 1 2 3 4 5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
, DRAIN CURRENT (AMPS)
ID
**----- End of picture text -----**
**==> picture [234 x 174] intentionally omitted <==** **----- Start of picture text -----**
200
180 VDS ≥ 10 V
160
140
120
100
80
60
40 TJ = 25 ° C
TJ = 125 ° C
20
TJ = −55 ° C
0
0 1 2 3 4 5 6
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
, DRAIN CURRENT (AMPS)
ID
**----- End of picture text -----**
**==> picture [490 x 451] intentionally omitted <==** **----- Start of picture text -----**
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
30 0.007
ID = 30 A TJ = 25 ° C
TJ = 25 ° C 0.006
25
0.005
20
0.004 VGS = 4.5 V
15
0.003
10 0.002 VGS = 11.5 V
5 0.001
0 0
2 4 6 8 10 12 10 15 20 25 30 35 40 45 50 55 60
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and
Voltage Gate Voltage
2.0 100,000
ID = 30 A VGS = 0 V
VGS = 10 V
1.5 10,000 TJ = 150 ° C
1.0 1,000
TJ = 125 ° C
0.5 100
0 10
−50 −25 0 25 50 75 100 125 150 2 4 8 12 16 20 24 28 30
TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current
Temperature vs. Voltage
) � ) �
, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (
DS(on) DS(on)
R R
, LEAKAGE (nA)
(NORMALIZED) IDSS
, DRAIN−TO−SOURCE RESISTANCE
DS(on)
R
**----- End of picture text -----**
**http://onsemi.com** **4** **NTMFS4834N** ## **TYPICAL PERFORMANCE CURVES** **==> picture [490 x 604] intentionally omitted <==** **----- Start of picture text -----**
6500 12 20
60005500 Ciss TJ = 25 ° C 10 Q T 18
16
5000
4500 VDS VGS 14
8
4000 Ciss 12
3500
6 10
3000
2500 8
2000 Crss C oss 4 Qgs Qgd 6
1500
4
1000500 2 TIDJ = 30 A = 25 ° C 2
0 0 0
15 10 5 0 5 10 15 20 25 30 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75
VGS VDS QG, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−To−Source and Drain−To−Source
Figure 7. Capacitance Variation Voltage vs. Total Charge
1000 30
VDS = 15 V VGS = 0 V
ID = 15 A 25 T J = 25 ° C
VGS = 11.5 V
100 20
td(off)
15
tr
tf
10 td(on) 10
5
1 0
1 10 100 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Figure 10. Diode Forward Voltage vs. Current
Variation vs. Gate Resistance
1000 560
520 ID = 32 A
480
10 � s
100 440
400
100 � s
360
1 ms 320
10 280
VGS = 20 V 10 ms 240
SINGLE PULSE dc 200
TC = 25 ° C 160
1
RDS(on) LIMIT 120
THERMAL LIMIT 80
PACKAGE LIMIT 40
0.1 0
0.1 1 10 100 25 50 75 100 125 150
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE ( ° C)
V
DS
C, CAPACITANCE (pF)
, GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
t, TIME (ns)
IS, SOURCE CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
AVALANCHE ENERGY (mJ)
, SINGLE PULSE DRAIN−TO−SOURCE
AS
E
**----- End of picture text -----**
**Figure 11. Maximum Rated Forward Biased Safe Operating Area** **Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature** **http://onsemi.com** **5** **NTMFS4834N** ## **PACKAGE DIMENSIONS** **==> picture [475 x 582] intentionally omitted <==** **----- Start of picture text -----**
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE G
2 X NOTES:
1. DIMENSIONING AND TOLERANCING PER
0.20 C ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
a D A 3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
2 B 2 X BURRS.
D1 MILLIMETERS
0.20 C
DIM MIN NOM MAX
f o fe t —= A 0.90 1.00 1.10
A1 0.00 −−− 0.05
E1 4 X b 0.33 0.41 0.51
c 0.23 0.28 0.33
E D 5.15 BSC
2 D1 4.50 4.90 5.10
c D2 3.50 −−− 4.22
A1 E 6.15 BSC
HH a E1 5.50 5.80 6.10
P 1 2 3 T 4 ify) EEE E2 3.45 −−− 4.30
e 1.27 BSC
TOP VIEW G 0.51 0.61 0.71
3 X C K 1.20 1.35 1.50
0.10 C e SEATINGPLANE L1L 0.510.05 0.610.17 0.710.20
ma g , E e M 3.00 3.40 3.80
A DETAIL A 0 −−− 12
0.10 C Fae STYLE 1:
PIN 1. SOURCE
SIDE VIEW a DETAIL A SOLDERING FOOTPRINT* if} 2. 3. SOURCESOURCE —_ +
4. GATE
3X 4X 5. DRAIN
8X b 1.270 0.750
4X
0.10 C A B 1.000
0.05 c L e/2
1 fe 4 0.965 b oo ts
K
1.330 2X
ft an a 0.905
E2 2X
PIN 5 M 0.495 4.530
(EXPOSED PAD) L1
3.200
0.475
G ac D2 and
2X
BOTTOM VIEW 1.530
rah Lo 4.560 eS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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**----- End of picture text -----**
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