# Power MOSFET, N Channel, 30 V, 26 A, 0.0013 ohm, DFN, Surface Mount

![Product image](https://novapart.co/image/farnell:2101432/)

**URL**: https://novapart.co/products/NTMFS4833NT1G/power-mosfet-n-channel-30-v-26-a-00013-ohm-dfn
**SKU**: NTMFS4833NT1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.8430
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 5Pins |
| Channel Type | N Channel |
| Power Dissipation | 125W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 125W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.0013ohm |
| Transistor Case Style | DFN |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 26A |
| Drain Source On State Resistance | 0.0013ohm |
| Gate Source Threshold Voltage Max | 1.5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2101432/)

## NTMFS4833N 

## Power MOSFET 

## **30 V, 191 A, Single N−Channel, SO−8FL** 

## **Features** 

- Low R to Minimize Conduction Losses DS(on) 

- Low Capacitance to Minimize Driver Losses 

- Optimized Gate Charge to Minimize Switching Losses 

## **http://onsemi.com** 

- These are Pb−Free Devices 

> **Applications** ~~a~~ **V(BR)DSS RDS(ON)** ~~ee~~ **MAX** ~~eee~~ **ID MAX** • Refer to Application Note AND8195/D 2.0 m @ 10 V • CPU Power Delivery 30 V 191 A 3.0 m @ 4.5 V • DC−DC Converters • Low Side Switching D (5) **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) ~~ee~~ **Parameter Symbol** ~~ee~~ **Value** ~~ee~~ **Unit** Drain−to−Source Voltage VDSS 30 V G (4) Gate−to−Source Voltage VGS ± 20 V ~~———~~ Continuous Drain TA = 25 ° C ID 26 A ~~re~~ S (1,2,3) Current R(Note 1) JA TA = 85 ° C 19 **N−CHANNEL MOSFET** ~~Ce~~ Power Dissipation TA = 25 ° C PD 2.35 W R JA (Note 1) **MARKING** ~~a ee~~ Continuous Drain TA = 25 ° C ID 16 A **DIAGRAM** ~~ee~~ Current R(Note 2) JA Steady TA = 85 ° C ~~ee~~ 12 y~ 1 S D D State Power DissipationR JA (Note 2) TA = 25 ° C PD 0.91 W **SO−8 FLAT LEAD** SS AYWW4833N ~~ee~~ **CASE 488AA** Continuous Drain TC = 25 ° C ID 191 A **STYLE 1** G D Current R(Note 1) JC TC = 85 ° C 138 D ~~J Cer~~ Power Dissipation TC = 25 ° C PD 125 W A = Assembly Location R JC (Note 1) Y = Year WW = Work Week ~~a~~ Pulsed Drain ~~ee~~ TA = 25 ° ~~ee~~ C, ~~ee~~ IDM 288 A = Pb−Free Package ~~ee~~ CurrentOperating Junction and Storage ~~ee~~ tp = 10 s TJ ~~ee~~ , TSTG −55 to ~~ee~~ ° C (Note: Microdot may be in either location) Temperature +150 ~~eeee ee~~ Source Current (Body Diode) IS 104 A **ORDERING INFORMATION** Drain to Source dV/dt dV/dt 6 V/ns ~~————~~ Single Pulse Drain−to−Source Avalanche EAS 612.5 mJ **Device Package Shipping**[†] Energy (TJ = 25 ° C, VDD = 30 V, VGS = 10 V, ~~pr~~ IL = 35 Apk, L = 1.0 mH, RG = 25 NTMFS4833NT1G SO−8FL 1500/Tape & Reel (Pb−Free) Lead Temperature for Soldering Purposes TL 260 ° C ~~ee~~ (1/8 ″ from case for 10 s) ~~ee ee~~ NTMFS4833NT3G (Pb−Free)SO−8FL 5000/Tape & Reel Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended †For information on tape and reel specifications, Operating Conditions is not implied. Extended exposure to stresses above the including part orientation and tape sizes, please Recommended Operating Conditions may affect device reliability. 

   - †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 

1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

2. Surface−mounted on FR4 board using the minimum recommended pad size. 

Publication Order Number: **NTMFS4833N/D** 

**1** 

© Semiconductor Components Industries, LLC, 2010 **May, 2010 − Rev. 7** 

**NTMFS4833N** 

## **THERMAL RESISTANCE MAXIMUM RATINGS** 

|**THERMAL RESISTANCE MAXIMUM RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Value**|**Unit**|
|Junction−to−Case (Drain)|R�JC|1.0|°C/W|
|Junction−to−Ambient – Steady State (Note 3)|R�JA|53.2||
|Junction−to−Ambient – t < 10s (Note 3)|R�JA|20.3||
|Junction−to−Ambient – Steady State (Note 4)|R�JA|137.8||



3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 

4. Surface−mounted on FR4 board using the minimum recommended pad size. 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|30|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/<br>TJ||||17||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 24 V|TJ= 25°C|||1|�A|
||||TJ= 125°C|||10||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS|=±20 V|||±100|nA|
|**ON CHARACTERISTICS**(Note 5)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID=|250�A|1.5||2.5|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||7.12||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V to<br>11.5 V|ID= 30 A||1.3|2.0|m�|
||||ID= 15 A||1.3|||
|||VGS= 4.5 V|ID= 30 A||2.3|3.0||
||||ID= 15 A||2.3|||
|Forward Transconductance|gFS|VDS= 15 V, ID= 15 A|||30||S|
|**CHARGES, CAPACITANCES & GATE RESISTANCE**||||||||
|Input Capacitance|CISS|VGS= 0 V, f = 1 MHz, VDS= 12 V|||5600||pF|
|Output Capacitance|COSS||||1200|||
|Reverse Transfer Capacitance|CRSS||||650|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V; ID= 30 A|||39|58|nC|
|Threshold Gate Charge|QG(TH)||||6.0|||
|Gate−to−Source Charge|QGS||||16|||
|Gate−to−Drain Charge|QGD||||17|||
|Total Gate Charge|QG(TOT)|VGS= 11.5 V, VDS= 15 V; ID= 30 A|||88||nC|
|**SWITCHING CHARACTERISTICS**(Note 6)||||||||
|Turn−On Delay Time|td(ON)|VGS= 4.5 V, VDS= 15 V, ID= 15 A,<br>RG= 3.0�|||25||ns|
|Rise Time|tr||||34|||
|Turn−Off Delay Time|td(OFF)||||35|||
|Fall Time|tf||||17|||
|Turn−On Delay Time|td(ON)|VGS= 11.5 V, VDS= 15 V,<br>ID= 15 A, RG= 3.0�|||14||ns|
|Rise Time|tr||||19|||
|Turn−Off Delay Time|td(OFF)||||50|||
|Fall Time|tf||||10|||



5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

6. Switching characteristics are independent of operating junction temperatures. 

**http://onsemi.com** 

**2** 

## **NTMFS4833N** 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**(TJ=|25°C unless|otherwise specified)|otherwise specified)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 30 A|TJ= 25°C|−|0.8|1.0|V|
||||TJ= 125°C|−|0.68|−||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt = 100 A/�s,<br>IS= 30 A||−|38|−|ns|
|Charge Time|ta|||−|19|−||
|Discharge Time|tb|||−|19|−||
|Reverse Recovery Charge|QRR|||−|36|−|nC|
|**PACKAGE PARASITIC VALUES**||||||||
|Source Inductance|LS|TA= 25°C||−|0.50|−|nH|
|Drain Inductance|LD|||−|0.005|−|nH|
|Gate Inductance|LG|||−|1.84|−|nH|
|Gate Resistance|RG|||−|1.0|−|�|



5. Pulse Test: pulse width � 300 � s, duty cycle � 2%. 

6. Switching characteristics are independent of operating junction temperatures. 

**http://onsemi.com** 

**3** 

**NTMFS4833N** 

## **TYPICAL PERFORMANCE CURVES** 

**==> picture [234 x 174] intentionally omitted <==**

**----- Start of picture text -----**<br>
200<br>VDSDS ≥  10 V<br>175<br>150<br>125<br>100<br>TJ = 125J = 125 = 125 ° C<br>75<br>50<br>TJ = 25J = 25 = 25 ° C<br>25<br>TJ = −55J = −55 = −55 ° C<br>0<br>0 1 2 3 4 5<br>VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)GS, GATE−TO−SOURCE VOLTAGE (VOLTS), GATE−TO−SOURCE VOLTAGE (VOLTS)<br>, DRAIN CURRENT (AMPS)<br>IDD<br>**----- End of picture text -----**<br>


**==> picture [490 x 630] intentionally omitted <==**

**----- Start of picture text -----**<br>
200 200<br>4.2 V thru 10 V<br>175 VGS = 4.0 V 175 VDSDS ≥  10 V<br>TJ = 25 ° C 3.8 V<br>150 150<br>125 3.6 V 125<br>100 100<br>3.4 V TJ = 125J = 125 = 125 ° C<br>75 75<br>50 3.2 V 50<br>TJ = 25J = 25 = 25 ° C<br>25 3.0 V 25<br>2.8 V TJ = −55J = −55 = −55 ° C<br>0 0<br>0 1 2 3 4 5 0 1 2 3 4 5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)GS, GATE−TO−SOURCE VOLTAGE (VOLTS), GATE−TO−SOURCE VOLTAGE (VOLTS)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.010 0.004<br>TJ = 25 ° C<br>I D  = 30 A<br>0.008 TJ = 25 ° C<br>0.003<br>VGS = 4.5 V<br>0.006<br>0.002<br>0.004<br>VGS = 11.5 V<br>0.001<br>0.002<br>0 0<br>2 4 6 8 10 12 25 50 75 100 125 150 175 200<br>VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>1.75 100,000<br>ID = 30 A VGS = 0 V<br>1.5 VGS = 10 V<br>TJ = 150 ° C<br>1.25<br>10,000<br>1.0 TJ = 125 ° C<br>0.75<br>1,000<br>0.5<br>0.25<br>0 100<br>−50 −25 0 25 50 75 100 125 150 0 5 10 15 20 25 30<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature vs. Voltage<br>, DRAIN CURRENT (AMPS) , DRAIN CURRENT (AMPS)<br>ID IDD<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>IDSS<br>, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**http://onsemi.com** 

**4** 

**NTMFS4833N** 

## **TYPICAL PERFORMANCE CURVES** 

**==> picture [244 x 603] intentionally omitted <==**

**----- Start of picture text -----**<br>
8000<br>7000 C iss TJ = 25 ° C<br>6000<br>C iss<br>5000<br>4000<br>Crss<br>3000<br>2000<br>C oss<br>1000<br>0 V DS  = 0 V V GS  = 0 V<br>10 5 0 5 10 15 20 25<br>VGS VDS<br>GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>Figure 7. Capacitance Variation<br>1000<br>VDD = 15 V<br>ID = 15 A td(off)<br>VGS = 11.5 V<br>tf<br>100<br>tr<br>td(on)<br>10<br>1 10 100<br>RG, GATE RESISTANCE ( � )<br>Figure 9. Resistive Switching Time<br>Variation vs. Gate Resistance<br>1000<br>10  � s<br>100<br>100  � s<br>10<br>1 ms<br>1 VGS = 20 V<br>SINGLE PULSE<br>TC = 25 ° C 10 ms<br>0.1 RDS(on) LIMIT dc<br>THERMAL LIMIT<br>PACKAGE LIMIT<br>0.01<br>0.1 1 10 100<br>VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>C, CAPACITANCE (pF)<br>t, TIME (ns)<br>ID, DRAIN CURRENT (AMPS)<br>**----- End of picture text -----**<br>


**==> picture [244 x 603] intentionally omitted <==**

**----- Start of picture text -----**<br>
12<br>QT<br>10 VGS<br>8<br>6<br>Q1 Q2<br>4<br>2 ID = 30 A<br>TJ = 25 ° C<br>0<br>0 10 20 30 40 50 60 70 80 90<br>QG, TOTAL GATE CHARGE (nC)<br>Figure 8. Gate−To−Source and Drain−To−Source<br>Voltage vs. Total Charge<br>30<br>VGS = 0 V<br>25<br>TJ = 25 ° C<br>20<br>15<br>10<br>5<br>0<br>0 0.2 0.4 0.6 0.8 1.0<br>VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)<br>Figure 10. Diode Forward Voltage vs. Current<br>650<br>600 ID = 35 A<br>550<br>500<br>450<br>400<br>350<br>300<br>250<br>200<br>150<br>100<br>50<br>0<br>25 50 75 100 125 150<br>TJ, STARTING JUNCTION TEMPERATURE ( ° C)<br>, GATE−TO−SOURCE VOLTAGE (VOLTS)<br>GS<br>V<br>IS, SOURCE CURRENT (AMPS)<br>AVALANCHE ENERGY (mJ)<br>, SINGLE PULSE DRAIN−TO−SOURCE<br>AS<br>E<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature** 

**http://onsemi.com** 

**5** 

**NTMFS4833N** 

## **TYPICAL PERFORMANCE CURVES** 

**==> picture [245 x 170] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000<br>100<br>25 ° C<br>100 ° C<br>10<br>125 ° C<br>1<br>1 10 100 1,000 10,000<br>PULSE WIDTH ( � s)<br>ID, DRAIN CURRENT (AMPS)<br>**----- End of picture text -----**<br>


**Figure 13. Avalanche Characteristics** 

**http://onsemi.com** 

**6** 

**NTMFS4833N** 

## **PACKAGE DIMENSIONS** 

**==> picture [470 x 466] intentionally omitted <==**

**----- Start of picture text -----**<br>
DFN5 5x6, 1.27P<br>(SO−8FL)<br>CASE 488AA−01<br>ISSUE D<br>2 X NOTES:<br>1. DIMENSIONING AND TOLERANCING PER<br>0.20 C ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETER.<br>_ D fa A t 3. DIMENSION D1 AND E1 DO NOT INCLUDE<br>MOLD FLASH PROTRUSIONS OR GATE<br>2 B 2 X BURRS.<br>D1 MILLIMETERS<br>0.20 C<br>DIM MIN NOM MAX<br>oe A 0.90 1.00 1.10<br>A1 0.00 −−− 0.05<br>E1 4 X b 0.33 0.41 0.51<br>c 0.23 0.28 0.33<br>E D 5.15 BSC<br>2 D1 4.50 4.90 5.10<br>c D2 3.50 −−− 4.22<br>A1 E 6.15 BSC<br>E1 5.50 5.80 6.10<br>1 2 3 4 E2 3.45 −−− 4.30<br>e 1.27 BSC<br>TOP VIEW G 0.51 0.61 0.71<br>3 X C K 0.51 −−− −−−<br>0.10 C e SEATINGPLANE L1L 0.510.05 0.610.17 0.710.20<br>O —<— M 3.00 3.40 3.80<br>-. [|] A T N DETAIL A L} ———I 0  −−− 12<br>a 0.10 C<br>SOLDERING FOOTPRINT*<br>SIDE VIEW<br>DETAIL A<br>3X 4X<br>1.270 0.750<br>8X b 4X<br>1.000<br>0.10 C A B STYLE 1:<br>PIN 1. SOURCE<br>0.05 c L e/2  2. SOURCE<br> 3. SOURCE<br>1 i tio 4 n  4. GATE 0.965 _o ujo ot<br> 5. DRAIN<br>K  6. DRAIN 1.330 2X<br>0.905<br>f t +_L<br>2X<br>E2 0.495 4.530<br>PIN 5 M<br>(EXPOSED PAD) L1 3.200<br>P oo 4 0.475<br>ee GT<br>G D2 2X<br>1.530<br>BOTTOM VIEW<br>4.560<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>**----- End of picture text -----**<br>


**ON Semiconductor** and          are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

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**NTMFS4833N/D** 

**7** 



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