# Dual MOSFET, P Channel, 20 V, 20 V, 3.3 A, 3.3 A, 0.075 ohm ![Product image](https://novapart.co/image/farnell:2845403/) **URL**: https://novapart.co/products/NTLJD3115PT1G/dual-mosfet-p-channel-20-v-33-a-0075-ohm **SKU**: NTLJD3115PT1G **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Dual MOSFETs **Price**: €0.2430 **Stock**: 10+ **Lead Time**: 106 days (indicative) ## Description Transistor Polarity:Dual P Channel; Continuous Drain Current Id:-3.3A; Drain Source Voltage Vds:-20V; On Resistance Rds(on):0.075ohm; Rds(on) Test Voltage Vgs:-4.5V; Threshold Voltag ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | No SVHC (25-Jun-2025) | | No. Of Pins | 6Pins | | Channel Type | P Channel | | Product Range | - | | Qualification | - | | Transistor Case Style | WDFN | | Operating Temperature Max | 150°C | | Power Dissipation N Channel | 1.5W | | Power Dissipation P Channel | 1.5W | | Drain Source Voltage Vds N Channel | 20V | | Drain Source Voltage Vds P Channel | 20V | | Continuous Drain Current Id N Channel | 3.3A | | Continuous Drain Current Id P Channel | 3.3A | | Drain Source On State Resistance N Channel | 0.075ohm | | Drain Source On State Resistance P Channel | 0.075ohm | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2845403/) NTLJD3115P ## Power MOSFET ## **−20 V, −4.1 A, Dual P−Channel, 2x2 mm WDFN Package** ## **Features** - WDFN Package Provides Exposed Drain Pad for Excellent Thermal Conduction ## **www.onsemi.com** **==> picture [492 x 500] intentionally omitted <==** **----- Start of picture text -----**
|||||||||||| |---|---|---|---|---|---|---|---|---|---|---| |•|2x2 mm Footprint Same as SC−88|V(BR)DSS|RDS(on) MAX|ID MAX|(Note 1)| |•|Lowest RDS(on) Solution in 2x2 mm Package|ee|100 m|ee|@ −4.5 V|ee| |•|1.8 V RDS(on) Rating for Operation at Low Voltage Gate Drive Logic|−20 V|135 m|@ −2.5 V|−4.1 A| |Level| |200 m|@ −1.8 V| |•|Low Profile (< 0.8 mm) for Easy Fit in Thin Environments| |•|Bidirectional Current Flow with Common Source Configuration|S1|S2| |•|This is a Pb−Free Device| |Applications|G1|G2| |•|Optimized for Battery and Load Management Applications in| |Portable Equipment| |•|Li−Ion Battery Charging and Protection Circuits| |•|High Side Load Switch|D1|D2| |P−CHANNEL MOSFET|P−CHANNEL MOSFET| |MAXIMUM RATINGS|(TJ = 25|°|C unless otherwise noted)|MARKING| |D2| |a|Parameter|Symbol|Value|Unit|D1|DIAGRAM| |a|Drain−to−Source Voltage|VDSS|−20|V|WDFN6|1|JDM|6| |Gate−to−Source Voltage|VGS|±|8.0|V|CASE 506AN|2|5| |a|SS|3|x|4| |Continuous DrainCurrent (Note 1)|SteadyState|TTA A = 25= 85|°°|CC|ID|−3.3−2.4|A|Pin 1|JDM|= Specific Device Code= Date Code| |Poo|aee|t|≤|5 s|TA = 25|°|C|−4.1|.|= Pb−Free Package| |Power Dissipation|Steady|PD|1.5|W|(Note: Microdot may be in either location)| |(Note 1)|State|TA = 25|°|C|PIN CONNECTIONS| |t|≤|5 s|2.3| |Poo| |Continuous Drain|TA = 25|°|C|||ID|−2.3|A|D1| |Current (Note 2)|Steady|TA = 85|°|C|−1.6|S1|1|6|D1| |State| |Power Dissipation(Note 2)|TA = 25|°|C|PD|0.71|W|G1|2|5|G2| |Pulsed Drain Current|tp|= 10 s|IDM|−20|A|D2| |Operating Junction and Storage Temperature|TJ, TSTG|−55 to|°|C|D2|3|4|S2| |150| |a|Source Current (Body Diode) (Note 2)|IS|−1.9|A|(Top View)| |Lead Temperature for Soldering Purposes|TL|260|°|C| |″|ORDERING INFORMATION| |a|(1/8|from case for 10 s)| |Stresses exceeding those listed in the Maximum Ratings table may damage the|Device|Packagegee|Shippingppingingg|[[†]]| |device. If any of these limits are exceeded, device functionality should not be|NTLJD3115PT1G|WDFN6|3000/Tape & Reel| |assumed, damage may occur and reliability may be affected.| |(Pb−Free)| |1.|Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq| |[2 oz] including traces).|NTLJD3115PTAG|WDFN6|3000/Tape & Reel| |2.|Surface Mounted on FR4 Board using the minimum recommended pad size|ee|=|(Pb−Free)| **----- End of picture text -----**
**ORDERING INFORMATION Device Packagegee Shippingppingingg**[[†]] NTLJD3115PT1G WDFN6 3000/Tape & Reel (Pb−Free) NTLJD3115PTAG WDFN6 3000/Tape & Reel ~~=~~ (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 2. Surface Mounted on FR4 Board using the minimum recommended pad size of 30 mm[2] , 2 oz Cu. Publication Order Number: **1** © Semiconductor Components Industries, LLC, 2013 **August, 2016 − Rev. 7** **NTLJD3115P/D** **NTLJD3115P** ## **THERMAL RESISTANCE RATINGS** |**THERMAL RESISTANCE RATINGS**|||| |---|---|---|---| |**Parameter**|**Symbol**|**Max**|**Unit**| |**SINGLE OPERATION (SELF−HEATED)**|||| |Junction−to−Ambient – Steady State (Note 3)|R�JA|83|°C/W| |Junction−to−Ambient – Steady State Min Pad (Note 4)|R�JA|177|| |Junction−to−Ambient – t≤5 s (Note 3)|R�JA|54|| |**DUAL OPERATION (EQUALLY HEATED)**|||| |Junction−to−Ambient – Steady State (Note 3)|R�JA|58|°C/W| |Junction−to−Ambient – Steady State Min Pad (Note 4)|R�JA|133|| |Junction−to−Ambient – t≤5 s (Note 3)|R�JA|40|| 3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm[2] , 2 oz Cu). **www.onsemi.com** **2** ## **NTLJD3115P** **MOSFET ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) |**Parameter**|**Symbol**|**Test Conditions**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---|---|---| |**OFF CHARACTERISTICS**|||||||| |Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID= −250�A||−20|||V| |Drain−to−Source Breakdown Voltage
Temperature Coefficient|V(BR)DSS/TJ|ID= −250�A, Ref to 25°C|||9.95||mV/°C| |Zero Gate Voltage Drain Current|IDSS|VDS= −16 V, VGS= 0 V|TJ= 25°C|||−1.0|�A| ||||TJ= 85°C|||−10|| |Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±8.0 V||||±100|nA| |**ON CHARACTERISTICS**(Note 5)|||||||| |Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= −250�A||−0.4|−0.7|−1.0|V| |Negative Gate Threshold
Temperature Coefficient|VGS(TH)/TJ||||2.44||mV/°C| |Drain−to−Source On−Resistance|RDS(on)|VGS= −4.5, ID= −2.0 A|||75|100|m�| |||VGS= −2.5, ID= −2.0 A|||101|135|| |||VGS= −1.8, ID= −1.6 A|||150|200|| |Forward Transconductance|gFS|VDS= −5.0 V, ID= −2.0 A|||6.0||S| |**CHARGES, CAPACITANCES AND GATE RESISTANCE**|||||||| |Input Capacitance|CISS|VGS= 0 V, f = 1.0 MHz,
VDS= −10 V|||531||pF| |Output Capacitance|COSS||||91||| |Reverse Transfer Capacitance|CRSS||||56||| |Total Gate Charge|QG(TOT)|VGS= −4.5 V, VDS= −10 V,
ID= −2.0 A|||5.5|6.2|nC| |Threshold Gate Charge|QG(TH)||||0.7||| |Gate−to−Source Charge|QGS||||1.0||| |Gate−to−Drain Charge|QGD||||1.4||| |Gate Resistance|RG||||8.8||�| |**SWITCHING CHARACTERISTICS**(Note 6)|||||||| |Turn−On Delay Time|td(ON)|VGS= −4.5 V, VDD= −5.0 V,
ID= −1.0 A, RG= 6.0�|||6.0||ns| |Rise Time|tr||||11||| |Turn−Off Delay Time|td(OFF)||||21||| |Fall Time|tf||||8.0||| |Turn−On Delay Time|td(ON)|VGS= −4.5 V, VDD= −10 V,
ID= −2.0 A, RG= 2.0�|||6.0||ns| |Rise Time|tr||||12||| |Turn−Off Delay Time|td(OFF)||||19||| |Fall Time|tf||||6.0||| |**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||| |Forward Recovery Voltage|VSD|VGS= 0 V, IS = −1.0 A|TJ= 25°C||−0.75|−1.0|V| ||||TJ= 125°C||−0.64||| |Reverse Recovery Time|tRR|VGS= 0 V, dISD/dt= 100 A/�s,
IS= −1.0 A|||12.6||ns| |Charge Time|ta||||7.0||| |Discharge Time|tb||||5.6||| |Reverse Recovery Time|QRR||||5.0||nC| 5. Pulse Test: Pulse Width � 300 � s, Duty Cycle � 2%. 6. Switching characteristics are independent of operating junction temperatures. **www.onsemi.com** **3** **NTLJD3115P** ## **TYPICAL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) **==> picture [487 x 174] intentionally omitted <==** **----- Start of picture text -----**
5 5
VGS = −1.9 V to −6 V TJ = 25 ° C VDS ≥ 10 V
4.5
4 −1.8 V 4
3.5
−1.7 V
3 3
2.5 −1.6 V
2 2
1.5 −1.5 V TJ = 25 ° C
1 −1.4 V 1
0.5 −1.3 V−1.2 V T J = 125 ° C TJ = −55 ° C
0 0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0 0.5 1 1.5 2 2.5 3
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
, DRAIN CURRENT (AMPS) , DRAIN CURRENT (AMPS)
D D
−I −I
**----- End of picture text -----**
**Figure 1. On−Region Characteristics** **Figure 2. Transfer Characteristics** **==> picture [487 x 436] intentionally omitted <==** **----- Start of picture text -----**
0.1 0.15
VGS = −4.5 V T J = 25 ° C
0.09 TJ = 100 ° C VGS = −2.5 V
0.08 0.1
TJ = 25 ° C VGS = −4.5 V
0.07
0.06 TJ = −55 ° C 0.05
0.05
0.04 0
1.0 1.5 2.0 2.5 1 2 3 4 5
−ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus Drain Current Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1.6 10000
ID = −2.2 A VGS = 0 V
VGS = −4.5 V
1.4 TJ = 150 ° C
1000
1.2
1.0 TJ = 100 ° C
100
0.8
0.6 10
−50 −25 0 25 50 75 100 125 150 2 4 6 8 10 12 14 16 18 20
TJ, JUNCTION TEMPERATURE ( ° C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current
Temperature versus Voltage
) � ) �
, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (
DS(on) DS(on)
R R
, LEAKAGE (nA)
(NORMALIZED) DSS
−I
, DRAIN−TO−SOURCE RESISTANCE
DS(on)
R
**----- End of picture text -----**
**www.onsemi.com** **4** **NTLJD3115P** ## **TYPICAL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) **==> picture [492 x 175] intentionally omitted <==** **----- Start of picture text -----**
1200 5 20
VDS = 0 V VGS = 0 V TJ = 25 ° C QT
1000
Ciss 4 16
800
3 12
VDS VGS
600
QGS QGD
2 8
400 Crss
200 Coss 1 ID = −2.2 A 4
TJ = 25 ° C
0 0 0
5 0 5 10 15 20 0 1 2 3 4 5 6
VGS VDS QG, TOTAL GATE CHARGE (nC)
C, CAPACITANCE (pF)
-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
**----- End of picture text -----**
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) **Figure 7. Capacitance Variation** **Figure 8. Gate−To−Source and Drain−To−Source Voltage versus Total Charge** **==> picture [487 x 171] intentionally omitted <==** **----- Start of picture text -----**
1000 3
V DD = −15 V VGS = 0 V
I D = −2.2 A 2.5
VGS = −4.5 V
100 2
tf 1.5
tr
10 td(off) 1
td(on)
0.5
TJ = 150 ° C TJ = 25 ° C
1 0
1 10 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
RG, GATE RESISTANCE (OHMS) −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
t, TIME (ns)
, SOURCE CURRENT (AMPS)
s
−I
**----- End of picture text -----**
**Figure 9. Resistive Switching Time Variation versus Gate Resistance** **Figure 10. Diode Forward Voltage versus Current** **==> picture [242 x 171] intentionally omitted <==** **----- Start of picture text -----**
100
TC = 25 ° C
TJ = 150 ° C
SINGLE PULSE 10 � s
10
100 � s
1 ms
1 10 ms
*See Note 2 on Page 1
0.1
RDS(on) LIMIT
THERMAL LIMIT dc
PACKAGE LIMIT
0.01
0.1 1 10 100
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
, DRAIN CURRENT (AMPS)
D
−I
**----- End of picture text -----**
**Figure 11. Maximum Rated Forward Biased Safe Operating Area** **www.onsemi.com** **5** **NTLJD3115P** ## **TYPICAL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) **==> picture [473 x 186] intentionally omitted <==** **----- Start of picture text -----**
1000
D = 0.5
100
0.2
0.1 *See Note 2 on Page 1
10
0.05 P(pk)
D CURVES APPLY FOR POWER
0.02 PULSE TRAIN SHOWN
1 0.01 READ TIME AT t1
t1 TJ(pk) − TA = P(pk) R � JA(t)
t2
SINGLE PULSE DUTY CYCLE, D = t1/t2
0.1
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
t, TIME (s)
EFFECTIVE TRANSIENT THERMAL RESISTANCE
**----- End of picture text -----**
**Figure 12. Thermal Response** **www.onsemi.com** **6** **NTLJD3115P** ## **PACKAGE DIMENSIONS** **WDFN6, 2x2** CASE 506AN ISSUE G **==> picture [454 x 402] intentionally omitted <==** **----- Start of picture text -----**
NOTES:
D A EXPOSED Cu MOLD CMPD 1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
B ÉÉ ÇÇÇ 2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
ÉÉÇÇ ÇÇÇÉÉÉ 0.15 AND 0.30 mm FROM THE TERMINAL TIP.
PLATING 4. COPLANARITY APPLIES TO THE EXPOSED
DETAIL B PAD AS WELL AS THE TERMINALS.
PIN ONE “pes OPTIONAL MILLIMETERS
REFERENCE ÍÍÍ E CONSTRUCTIONS DIM MIN MAX
A 0.70 0.80
ÍÍÍ A1 0.00 0.05
0.10 C A3 0.20 REF
ÍÍÍ L L b 0.25 0.35
0.10 C D 2.00 BSC
TOP VIEW D2 0.57 0.77
L1 E 2.00 BSC
E2 0.90 1.10
DETAIL B A3 DETAIL A e 0.65 BSC
0.10 C OPTIONAL F 0.95 BSC
CONSTRUCTIONS K 0.25 REF
L 0.20 0.30
ait 0.08 C A f o f of a L1 --- 0.10
NOTE 4
A1
SIDE VIEW C SEATINGPLANE SOLDERMASK DEFINED
MOUNTING FOOTPRINT
0.10 C A B 1.80
2X
D2 D2 0.82
L F
1 3
1.10
6X 0.45
DETAIL A
E2 2.30
0.10 C A B
PACKAGE
OUTLINE
K 6 4 6X b
e 0.10 C A B 1 0.65
0.05 C NOTE 3 PITCH
fa p 6X 0.39 Pan
BOTTOM VIEW DIMENSIONS: MILLIMETERS
| yee
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
**----- End of picture text -----**
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