# Power MOSFET, N Channel, 20 V, 255 mA, 3.4 ohm, SOT-723, Surface Mount

![Product image](https://novapart.co/image/farnell:2533195/)

**URL**: https://novapart.co/products/NTK3043NT1G/power-mosfet-n-channel-20-v-255-ma-34-ohm-sot-723
**SKU**: NTK3043NT1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.0570
**Stock**: 1000+
**Lead Time**: 153 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:255mA; Drain Source Voltage Vds:20V; On Resistance Rds(on):1.6ohm; Rds(on) Test Voltage Vgs:4.5V; Threshold Voltage Vgs:1.3V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 440mW |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 4.5V |
| Transistor Case Style | SOT-723 |
| Drain Source Voltage Vds | 20V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 255mA |
| Drain Source On State Resistance | 3.4ohm |
| Gate Source Threshold Voltage Max | 1.3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2533195/)

## NTK3043N 

## ~~ee~~ MOSFET – Power, N-Channel with ESD Protection, SOT-723 20 V, 285 mA 

## **Features** 

- Enables High Density PCB Manufacturing 

- 44% Smaller Footprint than SC−89 and 38% Thinner than SC−89 

- Low Voltage Drive Makes this Device Ideal for Portable Equipment 

- Low Threshold Levels, VGS(TH) < 1.3 V 

- Low Profile (< 0.5 mm) Allows It to Fit Easily into Extremely Thin Environments such as Portable Electronics 

- Operated at Standard Logic Level Gate Drive, Facilitating Future Migration to Lower Levels Using the Same Basic Topology 

## **www.onsemi.com** 

||~~ee~~||
|---|---|---|
|**V(BR)DSS**<br>~~ee~~|**RDS(on) TYP**<br>~~ee~~<br>~~ee~~|**ID Max**<br>~~ee~~|
|20 V|1.5  @ 4.5 V<br>~~ee~~|285 mA|
||2.4  @ 2.5 V||
||5.1  @ 1.8 V||
||6.8  @ 1.65 V||



**==> picture [34 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
Top View<br>**----- End of picture text -----**<br>


- These are Pb−Free and Halogen−Free Devices 

## **Applications** 

- Interfacing, Switching 

- High Speed Switching 

- Cellular Phones, PDAs 

**MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise stated) 

**Parameter Symbol Value Unit** ~~a~~ Drain−to−Source Voltage VDSS 20 V ~~a~~ Gate−to−Source Voltage VGS ± 10 V ~~a~~ Continuous Drain Steady TA = 25 ° C 255 Current (Note 1) State TA = 85 ° C ID 185 mA P ~~ES ES~~ t 5 s TA = 25 ° C 285 ~~r=[|.] || [fofF~~ Power Dissipation Steady 440 (Note 1) State TA = 25 ° C PD mW t 5 s 545 Continuous Drain TA = 25 ° C ID 210 Current (Note 2) Steady TA = 85 ° C 155 mA ~~a eee~~ Power Dissipation State TA = 25 ° C PD 310 mW (Note 2) ~~_ ——~~ Pulsed Drain Current tp = 10 s IDM 400 mA Operating Junction and Storage Temperature TJ, TSTG −55 to ° C 150 ~~eea~~ Source Current (Body Diode) (Note 2) IS 286 mA Lead Temperature for Soldering Purposes 260 ° C (1/8” from case for 10 seconds) TL 

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces) 

2. Surface−mounted on FR4 board using the minimum recommended pad size. 

**==> picture [74 x 140] intentionally omitted <==**

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3<br>1 2<br>1 − Gate<br>2 − Source<br>3 − Drain<br>**----- End of picture text -----**<br>


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MARKING<br>DIAGRAM<br>KA<br>SOT−723<br>CASE 631AA<br>STYLE 5 1<br>KA = Device Code<br>M = Date Code<br>M<br>**----- End of picture text -----**<br>


## **ORDERING INFORMATION** 

|**Device**|**Package**|**Shipping**†|
|---|---|---|
|NTK3043NT1G|SOT−723*|4000 / Tape & Reel|
|NTK3043NT5G|SOT−723*|8000 / Tape & Reel|



- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 

- *These packages are inherently Pb−Free. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2013 **July, 2019 − Rev. 5** 

**NTK3043N/D** 

**NTK3043N** 

## **THERMAL RESISTANCE RATINGS** 

|**THERMAL RESISTANCE RATINGS**||||
|---|---|---|---|
|**Parameter**|**Symbol**|**Max**|**Unit**|
|Junction−to−Ambient – Steady State (Note 3)|R�JA|280|°C/W|
|Junction−to−Ambient – t = 5 s (Note 3)|R�JA|228||
|Junction−to−Ambient – Steady State Minimum Pad (Note 4)|R�JA|400||



3. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces) 

4. Surface−mounted on FR4 board using the minimum recommended pad size. 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise specified) 

|**ELECTRICAL CHARACTERISTICS**|(TJ= 25°C unless otherwise specified)|(TJ= 25°C unless otherwise specified)||||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Test Condition**||**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|VGS= 0 V, ID= 100�A||V(BR)DSS|20|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|ID= 100�A, Reference to 25°C||V(BR)DSS/TJ||27||mV/°C|
|Zero Gate Voltage Drain Current|VGS= 0 V,<br>VDS= 16 V|TJ= 25°C|IDSS|||1|�A|
|||TJ= 125°C||||10||
|Gate−to−Source Leakage Current|VDS= 0 V, VGS=±5 V||IGSS|||1|�A|
|**ON CHARACTERISTICS**(Note 3)||||||||
|Gate Threshold Voltage|VGS= VDS, ID= 250�A||VGS(TH)|0.4||1.3|V|
|Gate Threshold Temperature Coefficient|||VGS(TH)/TJ||−2.4||mV/°C|
|Drain−to−Source On Resistance|VGS= 4.5V, ID= 10 mA||RDS(ON)||1.5|3.4|�|
||VGS= 4.5V, ID= 255 mA||||1.6|3.8||
||VGS= 2.5 V, ID= 1 mA||||2.4|4.5||
||VGS= 1.8 V, ID= 1 mA||||5.1|10||
||VGS= 1.65 V, ID= 1 mA||||6.8|15||
|Forward Transconductance|VDS= 5 V, ID= 100 mA||gFS||0.275||S|
|Gate Resistance|TA= 25°C||RG||2.2||k�|
|**CHARGES, CAPACITANCES AND GATE RESISTANCE**||||||||
|Input Capacitance|VGS= 0 V, f = 1 MHz, VDS= 10 V||CISS||11||pF|
|Output Capacitance|||COSS||8.3|||
|Reverse Transfer Capacitance|||CRSS||2.7|||
|**SWITCHING CHARACTERISTICS, VGS= 4.5 V**(Note 4)||||||||
|Turn−On Delay Time|VGS= 4.5 V, VDD= 5 V, ID= 10 mA,<br>RG= 6�||td(ON)||13||ns|
|Rise Time|||tr||15|||
|Turn−Off Delay Time|||td(OFF)||94|||
|Fall Time|||tf||55|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VGS= 0 V, IS= 286 mA|TJ= 25°C|VSD||0.83|1.2|V|
|||TJ= 125°C|||0.69|||
|Reverse Recovery Time|VGS= 0 V, VDD= 20 V, dISD/dt = 100 A/�s,<br>IS= 286 mA||tRR||9.1||ns|
|Charge Time|||ta||7.1|||
|Discharge Time|||tb||2.0|||
|Reverse Recovery Charge|||QRR||3.7||nC|



5. Pulse Test: pulse width � 300 � s, duty cycle � 2% 

6. Switching characteristics are independent of operating junction temperatures 

**www.onsemi.com** 

**2** 

**NTK3043N** 

## **TYPICAL PERFORMANCE CURVES** 

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0.3<br>2.5 V<br>V GS  = 3 V to 10 V<br>TJ = 25 ° C<br>0.2<br>2.2 V<br>2.0 V<br>0.1<br>1.8 V<br>1.6 V<br>1.4 V<br>0<br>0 1 2 3 4 5<br>VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>DRAIN CURRENT (AMPS)<br>ID,<br>**----- End of picture text -----**<br>


**Figure 1. On−Region Characteristics** 

**==> picture [233 x 173] intentionally omitted <==**

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0.3<br>VDS ≥  5 V<br>0.2<br>0.1 T J  = 125 ° C<br>TJ = 25 ° C<br>0 TJ = −55 ° C<br>1 1.5 2 2.5<br>VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)<br>DRAIN CURRENT (AMPS)<br>ID,<br>**----- End of picture text -----**<br>


**Figure 2. Transfer Characteristics** 

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5 6<br>ID = 0.255 A TJ = 25 ° C<br>TJ = 25 ° C<br>4 5<br>3 4<br>VGS = 2.5 V<br>2 3<br>1 2<br>VGS = 4.5 V<br>0 1<br>1 2 3 4 5 6 7 8 9 10 0 0.1 0.2 0.3<br>VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS)<br>Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and<br>Voltage Gate Voltage<br>9.0 1000<br>VGS = 0 V<br>8.0<br>VGS = 1.65 V, ID = 1 mA<br>7.0<br>6.0 VGS = 1.8 V, ID = 10 mA 100 TJ = 150 ° C<br>5.0<br>4.0<br>3.0 VGS = 2.5 V, ID = 10 mA 10 TJ = 125 ° C<br>2.0<br>1.0 VGS = 4.5 V, ID = 10 mA<br>0 1<br>−50 −25 0 25 50 75 100 125 150 5 10 15 20<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>) � ) �<br>DRAIN−TO−SOURCE RESISTANCE ( DRAIN−TO−SOURCE RESISTANCE (<br>DS(on),  DS(on),<br>R R<br>DRAIN−TO−SOURCE RESISTANCE , LEAKAGE (nA)<br>IDSS<br>DS(on),<br>R<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

**www.onsemi.com** 

**3** 

**NTK3043N** 

## **TYPICAL PERFORMANCE CURVES** 

**==> picture [243 x 181] intentionally omitted <==**

**----- Start of picture text -----**<br>
25<br>Ciss TJ = 25 ° C<br>20<br>Crss<br>15<br>Ciss<br>10<br>Coss<br>5<br>0 VDS = 0 V VGS = 0 V Crss<br>10 5 0 5 10 15 20<br>VGS VDS<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V) 

**Figure 7. Capacitance Variation** 

**==> picture [239 x 395] intentionally omitted <==**

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1000<br>VDD = 5 V<br>ID = 10 mA<br>VGS = 4.5 V<br>100 td(off)<br>tf<br>tr<br>10 td(on)<br>1<br>1 10 100<br>RG, GATE RESISTANCE (OHMS)<br>Figure 8. Resistive Switching Time<br>Variation vs. Gate Resistance<br>0.4<br>VGS = 0 V<br>TJ = 25 ° C<br>0.3<br>0.2<br>0.1<br>TJ = 150 ° C<br>TJ = 125 ° C TJ = −55 ° C<br>0<br>0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)<br>t, TIME (ns)<br>, SOURCE CURRENT (AMPS)<br>IS<br>**----- End of picture text -----**<br>


**Figure 9. Diode Forward Voltage vs. Current** 

**www.onsemi.com** 

**4** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

**SOT−723** CASE 631AA−01 ISSUE D 

DATE 10 AUG 2009 

**SCALE 4:1** 

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−X− NOTES:<br>1. DIMENSIONING AND TOLERANCING PER ASME<br>D Y14.5M, 1994.<br>b1 A 2. CONTROLLING DIMENSION: MILLIMETERS.<br>3 −Y− 3. MAXIMUM LEAD THICKNESS INCLUDES LEADFINISH. MINIMUM LEAD THICKNESS IS THE MINIMUMFINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM<br>THICKNESS OF BASE MATERIAL.<br>E H E 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD<br>FLASH, PROTRUSIONS OR GATE BURRS.<br>1 2<br>Go 2X b tf MILLIMETERS<br>C DIM MIN NOM MAX<br>2X e 0.08 X Y A 0.45 0.50 0.55<br>SIDE VIEW b 0.15 0.21 0.27<br>TOP VIEW b1 0.25 0.31 0.37<br>C 0.07 0.12 0.17<br>3X L D 1.15 1.20 1.25<br>1 E 0.75 0.80 0.85<br>e 0.40 BSC<br>H E 1.15 1.20 1.25<br>L 0.29 REF<br>L2 0.15 0.20 0.25<br>3X L2 |CU E GENERIC<br>BOTTOM VIEW MARKING DIAGRAM*<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:<br>PIN 1. BASE PIN 1. ANODE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE XX M<br> 2. EMITTER  2. N/C  2. ANODE  2. CATHODE  2. SOURCE<br> 3. COLLECTOR  3. CATHODE  3. CATHODE  3. ANODE  3. DRAIN<br>=<br>1<br>XX = Specific Device Code<br>RECOMMENDED<br>M = Date Code<br>**----- End of picture text -----**<br>


1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 

3. MAXIMUM LEAD THICKNESS INCLUDES LEADFINISH. MINIMUM LEAD THICKNESS IS THE MINIMUMFINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 

**==> picture [177 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
RECOMMENDED<br>SOLDERING FOOTPRINT*<br>2X<br>0.40<br>2X 0.27<br>“Ar<br>PACKAGE<br>OUTLINE<br>SAE]<br>1.50<br>3X 0.52 aoe 0.36<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G”, may or not be present. 

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON12989D** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: SOT−723 PAGE 1 OF 1** ~~SE~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2019 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi** ’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

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◊ 

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