# Dual MOSFET, Complementary N and P Channel, 30 V, 30 V, 250 mA, 250 mA, 1 ohm ![Product image](https://novapart.co/image/farnell:2533193/) **URL**: https://novapart.co/products/NTJD4158CT1G/dual-mosfet-complementary-n-and-p-channel-30-v-250 **SKU**: NTJD4158CT1G **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Dual MOSFETs **Price**: €0.1090 **Stock**: 1000+ **Lead Time**: 148 days (indicative) ## Description Transistor Polarity:N and P Complement; Continuous Drain Current Id:250mA; Drain Source Voltage Vds:30V; On Resistance Rds(on):1ohm; Rds(on) Test Voltage Vgs:4.5V; Threshold Volt ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | No SVHC (25-Jun-2025) | | No. Of Pins | 6Pins | | Channel Type | Complementary N and P Channel | | Product Range | - | | Qualification | - | | Transistor Case Style | SC-88 | | Operating Temperature Max | 150°C | | Power Dissipation N Channel | 270mW | | Power Dissipation P Channel | 270mW | | Drain Source Voltage Vds N Channel | 30V | | Drain Source Voltage Vds P Channel | 30V | | Continuous Drain Current Id N Channel | 250mA | | Continuous Drain Current Id P Channel | 250mA | | Drain Source On State Resistance N Channel | 1ohm | | Drain Source On State Resistance P Channel | 1ohm | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2533193/) NTJD4158C, NVJD4158C ## MOSFET – Small Signal, Complementary, SC-88 30 V/-20 V, +0.25/-0.88 A ## **Features** - Leading 20 V Trench for Low RDS(on) Performance ## **www.onsemi.com** - ESD Protected Gate - SC−88 Package for Small Footprint (2 x 2 mm) - NV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable - These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant ## **Applications** - DC−DC Conversion - Load/Power Management Load/Power Management • Load Switch • Cell Phones, MP3s, Digital Cameras, PDAs **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) ~~a~~ **Parameter Symbol Value Unit** Drain−to−Source Voltage N−Ch VDSS 30 V P−Ch −20 ~~| | ee~~ Gate−to−Source Voltage N−Ch ~~ee le~~ VGS ± 20 V P−Ch ± 12 ~~ee~~ **N−Channel** Continuous Drain Steady ~~|~~ TA ~~ee~~ = 25 ° C ID ~~le|~~ 0.25 A Current (Note 1) State TA = 85 ° C 0.18 ~~ee~~ **P−Channel** Continuous Drain Steady TA = 25 ° C −0.88 Current (Note 1) State TA = 85 ° C −0.63 ~~i | |~~ Power Dissipation Steady ° PD 0.27 W (Note 1) State TA = 25 C ~~P~~ Pulsed Drain Cur- ~~T~~ N−Ch ~~|~~ IDM ~~|~~ 0.5 A rent tp = 10 s P−Ch −3.0 ~~es~~ Operating Junction and Storage Temperature ~~|~~ TJ, Tstg ~~|~~ −55 to ° C 150 ~~e~~ Source Current (Body Diode) ~~e~~ N−Ch ~~ee~~ IS 0.25 A P−Ch −0.48 ~~ee~~ Lead Temperature for Soldering Purposes ~~| ee~~ T ~~le~~ L ~~|~~ 260 ° C (1/8 ″ from case for 10 s) ~~eeee ee~~ **THERMAL RESISTANCE RATINGS Parameter Symbol Max Unit** ~~a~~ Junction−to−Ambient – Steady State (Note 1) R JA 460 ° C/W - Load Switch - Cell Phones, MP3s, Digital Cameras, PDAs ||~~ee~~|~~ee~~| |---|---|---| |**V(BR)DSS**
~~ee~~|**RDS(on) Typ**
~~ee~~
~~ee~~|**ID Max**
~~ee~~
~~ee~~| |N−Ch
30 V
~~Poe~~|1.0 @ 4.5 V
~~ee~~
~~Poe~~|0.25 A
~~ee~~
~~Poe~~| ||1.5 @ 2.5 V
~~Poe~~|| |P−Ch
−20 V
ee|215 m @ −4.5 V
ee|−0.88 A| ||345 m @ −2.5 V
ee|| **SC−88 (SOT−363) (6−Leads)** **==> picture [183 x 285] intentionally omitted <==** **----- Start of picture text -----**
S1 1 6 D1
G1 2 5 G2
D2 3 4 S2
fi
(Top View)
MARKING DIAGRAM &
PIN ASSIGNMENT
D1 G2 S2
6
1
XXX M
f
SC−88 (SOT−363)
CASE 419B
STYLE 26 1
S1 rt G1 D2
XXX = Specific Device Code
M = Date Code
= Pb−Free Package
(Note: Microdot may be in either location) :
**----- End of picture text -----**
## **ORDERING INFORMATION** See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Publication Order Number: **NTJD4158C/D** **1** © Semiconductor Components Industries, LLC, 2015 **May, 2019 − Rev. 6** **NTJD4158C, NVJD4158C** 1. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). **www.onsemi.com** **2** ## **NTJD4158C, NVJD4158C** **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) |**ELECTRICAL CHARACTERIST**|**ICS**(TJ= 25|°C unl|ess otherwise noted)|ess otherwise noted)||||| |---|---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**N/P**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**(Note 3)||||||||| |Drain−to−Source
Breakdown Voltage|V(BR)DSS|N|VGS= 0 V|ID= 250�A|30|||V| |||P||ID= −250�A|−20|||| |Drain−to−Source Breakdown
Voltage Temperature Coefficient|V(BR)DSS/
TJ|N||||33||mV/
°C| |||P||||−9.0||| |Zero Gate Voltage Drain Current|IDSS|N|VGS= 0 V, VDS= 30 V|TJ= 25°C|||1.0|�A| |||P|VGS= 0 V, VDS= −16 V||||1.0|| |||N|VGS= 0 V, VDS= 30 V|TJ= 125°C||0.5||| |||P|VGS= 0 V, VDS= −16 V|||0.5||| |Gate−to−Source Leakage Current|IGSS|N|VDS= 0 V, VGS= 10 V||||1.0|�A| |||P|VDS = 0 V,VGS= −4.5 V||||1.0|| |**ON CHARACTERISTICS**(Note 2)||||||||| |Gate Threshold Voltage|VGS(TH)|N|VGS= VDS|ID= 100�A|0.8|1.2|1.5|V| |||P||ID= −250�A|−0.45|−0.61|−1.5|| |Negative Gate Threshold
Temperature Coefficient|VGS(TH)/
TJ|N||||3.2||mV/
°C| |||P||||−2.7||| |Drain−to−Source On Resistance|RDS(on)|N|VGS= 4.5 V, ID= 10 mA|||1.0|1.5|�| |||P|VGS= −4.5 V, ID= −0.88 A|||0.215|0.260|| |||N|VGS= 2.5 V, ID= 10 mA|||1.5|2.5|| |||P|VGS= −2.5 V, ID= −0.71 A|||0.345|0.500|| |Forward Transconductance|gFS|N|VDS= 3.0 V, ID= 10 mA|||0.08||S| |||P|VDS = −10 V,ID = −0.88 A|||3.0||| |**CHARGES, CAPACITANCES AND GATE RESISTANCE**||||||||| |Input Capacitance|CISS|N|f = 1 MHz, VGS= 0 V|VDS= 5.0 V||20|33|pF| |||P||VDS= −20 V||155|225|| |Output Capacitance|COSS|N||VDS= 5.0 V||19|32|| |||P||VDS= −20 V||25|40|| |Reverse Transfer Capacitance|CRSS|N||VDS= 5.0 V||7.25|12|| |||P||VDS= −20 V||18|30|| |Total Gate Charge|QG(TOT)|N|VGS= 5.0 V, VDS= 24 V, ID= 0.1 A|||0.9|1.5|nC| |||P|VGS= −4.5 V, VDS= −10 V, ID= −0.88 A|||2.2|3.5|| |Threshold Gate Charge|QG(TH)|N|VGS= 5.0 V, VDS= 24 V, ID= 0.1 A|||0.2||| |||P|VGS= −4.5 V, VDS= −10 V, ID= −0.88 A|||0.2||| |Gate−to−Source Charge|QGS|N|VGS= 5.0 V, VDS= 24 V, ID= 0.1 A|||0.3||| |||P|VGS= −4.5 V, VDS= −10 V, ID= −0.88 A|||0.5||| |Gate−to−Drain Charge|QGD|N|VGS= 5.0 V, VDS= 24 V, ID= 0.1 A|||0.2||| |||P|VGS = −4.5 V,VDS = −10 V,ID = −0.88 A|||0.65||| |**SWITCHING CHARACTERISTICS**(Note 3)||||||||| |Turn−On Delay Time|td(ON)|N|VGS= 4.5 V, VDD= 5.0 V,
ID= 250 mA, RG= 50 �|||15||ns| |Rise Time|tr|||||66||| |Turn−Off Delay Time|td(OFF)|||||56||| |Fall Time|tf|||||78||| |Turn−On Delay Time|td(ON)|P|VGS= −4.5 V, VDD= −10 V,
ID= −0.5 A, RG= 20 �|||5.8||| |Rise Time|tr|||||6.5||| |Turn−Off Delay Time|td(OFF)|||||13.5||| |Fall Time|tf|||||3.5||| |**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||| |Forward Diode Voltage|VSD|N|VGS= 0 V, TJ= 25°C|IS= 10 mA||0.65|0.7|V| |||P||IS= −0.48 A||−0.8|−1.2|| |||N|VGS= 0 V, TJ= 125°C|IS= 10 mA||0.45||| |||P||IS= −0.48 A||−0.66||| |Reverse Recovery Time|tRR|N|VGS= 0 V, dIS/dt= 8.0 A/�s|IS= 10 mA||12.4||ns| |||P|VGS= 0 V, dIS/dt= 100 A/�s|IS= −0.48 mA||10.6||| 2. Pulse Test: pulse width ≤ 300 � s, duty cycle ≤ 2%. 3. Switching characteristics are independent of operating junction temperatures. **www.onsemi.com** **3** **NTJD4158C, NVJD4158C** ## **TYPICAL N−CHANNEL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) **==> picture [491 x 605] intentionally omitted <==** **----- Start of picture text -----**
0.2 0.2
0.18 VGS = 10 V to 2.8 V TJ = 25 ° C VDS = 5 V
VGS = 2.6 V
0.16 2.2 V
2.4 V 0.15
0.14
0.12
0.1 0.1
0.08 2 V TJ = 125 ° C 25 ° C
0.06
0.05
0.04 1.8 V
0.02 TJ = −55 ° C
0 0
0 0.25 0.5 0.75 1 1.25 1.5 1 1.25 1.5 1.75 2 2.25 2.5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
1.3 2.5
1.2 VGS = 4.5 V TJ = 125 ° C TJ = 25 ° C
1.1 2.0
1.0 VGS = 2.5 V
1.5
0.9
0.8 TJ = 25 ° C
1.0
0.7
0.6 TJ = −55 ° C 0.5 VGS = 4 V
0.5
0.4 0
0.005 0.055 0.105 0.155 0.205 0.005 0.055 0.105 0.155 0.205
ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Drain Current and Figure 4. On−Resistance vs. Drain Current and
Temperature Gate Voltage
2 1000
ID = 0.01 A VGS = 0 V
1.75 VGS = 4.5 V
1.5
1.25 TJ = 150 ° C
1 100
0.75
0.5
TJ = 125 ° C
0.25
0 10
−50 −25 0 25 50 75 100 125 150 0 5 10 15 20 25 30
TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DRAIN CURRENT (AMPS) DRAIN CURRENT (AMPS)
ID, ID,
) � ) �
DRAIN−TO−SOURCE RESISTANCE ( DRAIN−TO−SOURCE RESISTANCE (
DS(on), DS(on),
R R
, LEAKAGE (nA)
DRAIN−TO−SOURCE
IDSS
DS(on),
R RESISTANCE (NORMALIZED)
**----- End of picture text -----**
**Figure 5. On−Resistance Variation with Temperature** **Figure 6. Drain−to−Source Leakage Current vs. Voltage** **www.onsemi.com** **4** **NTJD4158C, NVJD4158C** ## **TYPICAL N−CHANNEL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) **==> picture [236 x 176] intentionally omitted <==** **----- Start of picture text -----**
50
VDS = 0 V VGS = 0 V TJ = 25 ° C
40 Ciss
30 Crss
20 Ciss
Coss
10
Crss
0
10 5 0 5 10 15 20 25
VGS VDS
C, CAPACITANCE (pF)
**----- End of picture text -----**
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) **Figure 7. Capacitance Variation** **==> picture [227 x 178] intentionally omitted <==** **----- Start of picture text -----**
5
QG
4
3
QGS QGD
2
1
ID = 0.1 A
TJ = 25 ° C
0
0 0.2 0.4 0.6 0.8 1
QG, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE VOLTAGE (VOLTS)
GS,
V
**----- End of picture text -----**
**Figure 8. Gate−to−Source Voltage vs. Total Gate Charge** **==> picture [238 x 172] intentionally omitted <==** **----- Start of picture text -----**
1000
VDD = 5.0 V
ID = 0.25 A
VGS = 4.5 V
100
tf
tr
td(off)
td(on)
10
1 10 100
RG, GATE RESISTANCE (OHMS)
t, TIME (ns)
**----- End of picture text -----**
**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** **==> picture [244 x 172] intentionally omitted <==** **----- Start of picture text -----**
0.1
VGS = 0 V
TJ = 25 ° C
0.08
0.06
0.04
0.02
0
0.5 0.55 0.6 0.65 0.7 0.75
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
, SOURCE CURRENT (AMPS)
IS
**----- End of picture text -----**
**Figure 10. Diode Forward Voltage vs. Current** **www.onsemi.com** **5** **NTJD4158C, NVJD4158C** ## **TYPICAL P−CHANNEL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) **==> picture [490 x 604] intentionally omitted <==** **----- Start of picture text -----**
1 1
VGS = −4.5, −3.5 & −2.5 V TJ = 25 ° C VDS ≥ −20 V
0.9
−2 V −1.75 V 0.8
0.75
0.7
0.6
0.5 0.5
0.4
−1.5 V
0.3 125 ° C
0.25
0.2
−1.25 V 0.1 25 ° C
0 −1 V 0 TJ = −55 ° C
0 0.4 0.8 1.2 1.6 2 0 0.5 1 1.5 2 2.5 3 3.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
0.3 0.5
VGS = −4.5 V TJ = 25 ° C
TJ = 125 ° C 0.4
0.25
VGS = −2.5 V
0.3
0.2 TJ = 25 ° C VGS = −4.5 V
0.2
0.15
TJ = −55 ° C 0.1
0.1 0
0 0.25 0.5 0.75 1 0.4 0.5 0.6 0.7 0.8 0.9 1
−ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Drain Current and Figure 4. On−Resistance vs. Drain Current and
Temperature Gate Voltage
2.0 10000
ID = −0.88 A VGS = 0 V
1.8
VGS = −4.5 V
1.6 TJ = 150 ° C
1.4
1000
1.2
1.0 TJ = 125 ° C
0.8
100
0.6
0.4
0.2
0 10
−50 −25 0 25 50 75 100 125 150 0 5 10 15 20
TJ, JUNCTION TEMPERATURE ( ° C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DRAIN CURRENT (AMPS) DRAIN CURRENT (AMPS)
D, D,
−I −I
) � ) �
DRAIN−TO−SOURCE RESISTANCE ( DRAIN−TO−SOURCE RESISTANCE (
DS(on), DS(on),
R R
DRAIN−TO−SOURCE LEAKAGE CURRENT (nA)
DS(on),
R RESISTANCE (NORMALIZED) DSS,
−I
**----- End of picture text -----**
**Figure 5. On−Resistance Variation with Temperature** **Figure 6. Drain−to−Source Leakage Current vs. Voltage** **www.onsemi.com** **6** **NTJD4158C, NVJD4158C** ## **TYPICAL P−CHANNEL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) **==> picture [487 x 406] intentionally omitted <==** **----- Start of picture text -----**
350 5
Ciss VDS = 0 V VGS = 0 V TJ = 25 ° C QT
300
4
250
Crss
3
200
Q 1 Q2
150
2
100
1
50 Coss ID = −0.88 A
TJ = 25 ° C
0 0
10 5 0 5 10 15 20 0 0.4 0.8 1.2 1.6 2
VGS VDS Qg, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−to−Source Voltage vs. Total
Figure 7. Capacitance Variation Gate Charge
100 0.5
VGS = 0 V
TJ = 25 ° C
0.4
0.3
td(off)
10 tr
td(on) 0.2
tf VIDDD = −0.8 A = −10 V 0.1
VGS = −4.5 V
1 0
1 10 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
RG, GATE RESISTANCE (OHMS) −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
GATE−TO−SOURCE VOLTAGE (VOLTS)
GS,
−V
t, TIME (ns)
, SOURCE CURRENT (AMPS)
S
−I
**----- End of picture text -----**
**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** **Figure 10. Diode Forward Voltage vs. Current** ## **ORDERING INFORMATION** |**ORDERING INFORMATION**|||| |---|---|---|---| |**Device**|**Marking**|**Package**|**Shipping**†| |NTJD4158CT1G|TCD|SC−88
(Pb−Free)|3000 / Tape & Reel| |NTJD4158CT2G|TCD||| |NVJD4158CT1G*|VCD||| †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. - *NV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable. **www.onsemi.com** **7** MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** **SC−88/SC70−6/SOT−363** CASE 419B−02 ISSUE Y **==> picture [479 x 420] intentionally omitted <==** **----- Start of picture text -----**
1
SCALE 2:1 2X DATE 11 DEC 2012
aaa H D
- D H NOTES:1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
D GAGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
PLANE SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
6 5 4 THE PLASTIC BODY AND DATUM H.
L2 L 5. DATUMS A AND B ARE DETERMINED AT DATUM H.
E E1 DETAIL A 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THELEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
1 2 3
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
2X aaa C TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
bbb H D 2X 3 TIPS RADIUS OF THE FOOT.
e MILLIMETERS INCHES
DIM MIN NOM MAX MIN NOM MAX
B l= 6X b : A −−− −−− 1.10 −−− −−− 0.043
ddd M C A-B D A1 0.00 −−− 0.10 0.000 −−− 0.004
TOP VIEW A2 0.70 0.90 1.00 0.027 0.035 0.039
b 0.15 0.20 0.25 0.006 0.008 0.010
C 0.08 0.15 0.22 0.003 0.006 0.009
A2 DETAIL A D 1.80 2.00 2.20 0.070 0.078 0.086
A E 2.00 2.10 2.20 0.078 0.082 0.086
E1 1.15 1.25 1.35 0.045 0.049 0.053
e 0.65 BSC 0.026 BSC
L 0.26 0.36 0.46 0.010 0.014 0.018
L2 0.15 BSC 0.006 BSC
aaa 0.15 0.006
bbb 0.30 0.012
6X ccc C ccc 0.10 0.004
(tll, A1 C A SEATINGPLANE Ma c === ddd 0.10 0.004
SIDE VIEW END VIEW GENERIC
MARKING DIAGRAM*
RECOMMENDED 6
SOLDERING FOOTPRINT*
6X 6X XXXM
0.30 0.66
1
Ta os 2.50 XXX = Specific Device Code
M = Date Code*
= Pb−Free Package
0.65 yo (Note: Microdot may be in either location)
PITCH
**----- End of picture text -----**
## DATE 11 DEC 2012 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. - *Date Code orientation and/or position may vary depending upon manufacturing location. **==> picture [83 x 5] intentionally omitted <==** **----- Start of picture text -----**
DIMENSIONS: MILLIMETERS
**----- End of picture text -----**
- *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. - *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ ”, may or may not be present. Some products may not follow the Generic Marking. ## **STYLES ON PAGE 2** **DOCUMENT NUMBER: 98ASB42985B** **DESCRIPTION: SC−88/SC70−6/SOT−363** Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. **PAGE 1 OF 2** ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. www.onsemi.com © Semiconductor Components Industries, LLC, 2019 ## **SC−88/SC70−6/SOT−363** CASE 419B−02 ISSUE Y ## DATE 11 DEC 2012 |STYLE 1:|STYLE 2:|STYLE 3:|STYLE 4:|STYLE 5:|STYLE 6:| |---|---|---|---|---|---| |PIN 1. EMITTER 2|CANCELLED|CANCELLED|PIN 1. CATHODE|PIN 1. ANODE|PIN 1. ANODE 2| |2. BASE 2|||2. CATHODE|2. ANODE|2. N/C| |3. COLLECTOR 1|||3. COLLECTOR|3. COLLECTOR|3. CATHODE 1| |4. EMITTER 1|||4. EMITTER|4. EMITTER|4. ANODE 1| |5. BASE 1|||5. BASE|5. BASE|5. N/C| |6. COLLECTOR 2|||6. ANODE|6. CATHODE|6. CATHODE 2| |STYLE 7:|STYLE 8:|STYLE 9:|STYLE 10:|STYLE 11:|STYLE 12:| |PIN 1. SOURCE 2|CANCELLED|PIN 1. EMITTER 2|PIN 1. SOURCE 2|PIN 1. CATHODE 2|PIN 1. ANODE 2| |2. DRAIN 2||2. EMITTER 1|2. SOURCE 1|2. CATHODE 2|2. ANODE 2| |3. GATE 1||3. COLLECTOR 1|3. GATE 1|3. ANODE 1|3. CATHODE 1| |4. SOURCE 1||4. BASE 1|4. DRAIN 1|4. CATHODE 1|4. ANODE 1| |5. DRAIN 1||5. BASE 2|5. DRAIN 2|5. CATHODE 1|5. ANODE 1| |6. GATE 2||6. COLLECTOR 2|6. GATE 2|6. ANODE 2|6. CATHODE 2| |STYLE 13:|STYLE 14:|STYLE 15:|STYLE 16:|STYLE 17:|STYLE 18:| |PIN 1. ANODE|PIN 1. VREF|PIN 1. ANODE 1|PIN 1. BASE 1|PIN 1. BASE 1|PIN 1. VIN1| |2. N/C|2. GND|2. ANODE 2|2. EMITTER 2|2. EMITTER 1|2. VCC| |3. COLLECTOR|3. GND|3. ANODE 3|3. COLLECTOR 2|3. COLLECTOR 2|3. VOUT2| |4. EMITTER|4. IOUT|4. CATHODE 3|4. BASE 2|4. BASE 2|4. VIN2| |5. BASE|5. VEN|5. CATHODE 2|5. EMITTER 1|5. EMITTER 2|5. GND| |6. CATHODE|6. VCC|6. CATHODE 1|6. COLLECTOR 1|6. COLLECTOR 1|6. VOUT1| |STYLE 19:|STYLE 20:|STYLE 21:|STYLE 22:|STYLE 23:|STYLE 24:| |PIN 1. I OUT|PIN 1. COLLECTOR|PIN 1. ANODE 1|PIN 1. D1 (i)|PIN 1. Vn|PIN 1. CATHODE| |2. GND|2. COLLECTOR|2. N/C|2. GND|2. CH1|2. ANODE| |3. GND|3. BASE|3. ANODE 2|3. D2 (i)|3. Vp|3. CATHODE| |4. V CC|4. EMITTER|4. CATHODE 2|4. D2 (c)|4. N/C|4. CATHODE| |5. V EN|5. COLLECTOR|5. N/C|5. VBUS|5. CH2|5. CATHODE| |6. V REF|6. COLLECTOR|6. CATHODE 1|6. D1 (c)|6. N/C|6. CATHODE| |STYLE 25:|STYLE 26:|STYLE 27:|STYLE 28:|STYLE 29:|STYLE 30:| |PIN 1. BASE 1|PIN 1. SOURCE 1|PIN 1. BASE 2|PIN 1. DRAIN|PIN 1. ANODE|PIN 1. SOURCE 1| |2. CATHODE|2. GATE 1|2. BASE 1|2. DRAIN|2. ANODE|2. DRAIN 2| |3. COLLECTOR 2|3. DRAIN 2|3. COLLECTOR 1|3. GATE|3. COLLECTOR|3. DRAIN 2| |4. BASE 2|4. SOURCE 2|4. EMITTER 1|4. SOURCE|4. EMITTER|4. SOURCE 2| |5. EMITTER|5. GATE 2|5. EMITTER 2|5. DRAIN|5. BASE/ANODE|5. GATE 1| |6. COLLECTOR 1|6. DRAIN 1|6. COLLECTOR 2|6. DRAIN|6. CATHODE|6. DRAIN 1| Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment. |**DOCUMENT NUMBER:**|**98ASB42985B**|Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.|Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.| |---|---|---|---| |**DESCRIPTION:**|**SC−88/SC70−6/SOT−363**||**PAGE 2 OF 2**| ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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