# Power MOSFET, SuperFET®, N Channel, 650 V, 40 A, 0.07 ohm, TO-247AB, Through Hole

![Product image](https://novapart.co/image/farnell:2835593/)

**URL**: https://novapart.co/products/NTHL082N65S3F/power-mosfet-superfet-n-channel-650-v-40-a-007-ohm
**SKU**: NTHL082N65S3F
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €5.4100
**Stock**: 10+
**Lead Time**: 372 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:40A; Drain Source Voltage Vds:650V; On Resistance Rds(on):0.07ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:5V; P

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | Lead (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 313W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-247AB |
| Drain Source Voltage Vds | 650V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 40A |
| Drain Source On State Resistance | 0.07ohm |
| Gate Source Threshold Voltage Max | 5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2835593/)

## **www.onsemi.com** 

## **NTHL082N65S3F** 

**N-Channel SuperFET[®] III FRFET[®] MOSFET 650 V, 40 A, 82 m** Ω 

## **Features** 

- 700 V @ TJ = 150[o] C 

- Typ. RDS(on) = 70 mΩ 

- Ultra Low Gate Charge (Typ. Qg = 81 nC) 

- Low Effective Output Capacitance (Typ. Coss(eff.) = 722 pF) 

- 100% Avalanche Tested 

- RoHS Compliant 

## **Applications** 

- Telecom / Sever Power Supplies 

## **Description** 

SuperFET[®] III MOSFET is ON Semiconductor’s brand-new high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate. Consequently, SuperFET III MOSFET is very suitable for the various power system for miniaturization and higher efficiency. SuperFET III FRFET[®] MOSFET’s optimized reverse recovery performance of body diode can remove additional component and improve system reliability. 

- Industrial Power Supplies 

- UPS / Solar 

||**G**<br>**D S**<br>**TO-247**<br>**long leads**<br>GP|**G**|**S**<br>**D**<br>~~&~~|**S**<br>**D**<br>~~&~~|**S**<br>**D**<br>~~&~~|**S**<br>**D**<br>~~&~~|**S**<br>**D**<br>~~&~~|**S**<br>**D**<br>~~&~~||
|---|---|---|---|---|---|---|---|---|---|
|**Absolute Maximum Ratings  **TC= 25oC unless otherwise noted.||||||||||
|**Symbol**|**Parameter**|||||||**NTHL082N65S3F**|**Unit**|
|VDSS|Drain to Source Voltage|||||||650|V|
||- DC|||||||±30|V|
|VGSS|Gate to Source Voltage<br>- AC                                               (f > 1 Hz)|- AC                                               (f > 1 Hz)|- AC                                               (f > 1 Hz)|- AC                                               (f > 1 Hz)||||±30|V|
|ID|Drain Current<br>- Continuous (TC= 25oC)<br>- Continuous (TC= 100oC)|||||||40<br>25.5|A|
|IDM|Drain Current<br>- Pulsed|- Pulsed|- Pulsed    (Note 1)|||||100|A|
|EAS|Single Pulsed Avalanche Energy||(Note 2)|||||510|mJ|
|IAS<br>Avalanche Current(Note 1)<br>4.8<br>A<br>EAR<br>Repetitive Avalanche Energy (Note 1)<br>3.13<br>mJ<br>dv/dt<br>MOSFET dv/dt<br>100<br>V/ns<br>Peak Diode Recoverydv/dt(Note 3)<br>50<br>PD<br>Power Dissipation<br> (TC= 25oC)<br>313<br>W<br>- Derate Above 25oC<br>2.5<br>W/oC<br>TJ, TSTG<br>Operatingand Storage Temperature Range<br>-55 to +150<br>oC<br>~~——————~~||||||||||
|TL|Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds|Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds||||||300|oC|
|**Thermal Characteristics**||||||||||
|**Symbol**<br>**Parameter**<br>RθJC<br>Thermal Resistance, Junction to Case, Max.<br>RθJA<br>Thermal Resistance, Junction to Ambient, Max.<br>~~————~~|||**NTHL082N65S3F**<br>**Unit**<br>0.4<br>oC/W<br>62.5<br>~~ae~~|||||||



Semiconductor Components Industries, LLC, 2017                                                                                               Publication Order Number: September, 2017, Rev. 1.0                                                                                                                                                NTHL082N65S3F/D 

**1** 

## **Package Marking and Ordering Information** 

|**Part Number**|**Part Number**|**Top Mark**|**Package**|**Package**|**Packing Method**|**Reel Size**|**Reel Size**|**Tape Width**|**Tape Width**|**Tape Width**|**Quantity**|**Quantity**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|
|NTHL082N65S3F||NTHL082N65S3F|TO-247||Tube|N/A||N/A|||30 units||
|**Electrical Characteristics**TC= 25oC unless otherwise noted.|||||||||||||
|**Symbol**|**Parameter**|||**Test Conditions**|||**Min.**||**Typ.**|**Max.**||**Unit**|
|**Off Characteristics**|||||||||||||
|BVDSS|Drain to Source Breakdown Voltage|||VGS= 0 V, ID= 1 mA, TJ= 25°C|||650||-|-||V|
|||||VGS= 0 V, ID= 1 mA, TJ= 150°C|||700||-|-||V|
|ΔBVDSS<br>/ΔTJ|Breakdown Voltage Temperature<br>Coefficient|||ID= 10 mA, Referenced to 25oC|||-||0.7|-||V/oC|
|IDSS|Zero Gate Voltage Drain Current|||VDS= 650 V, VGS= 0 V|||-||-|10||μA|
|||||VDS= 520 V, TC= 125oC|||-||124|-|||
|IGSS|Gate to BodyLeakage Current|||VGS= ±30 V, VDS= 0 V|||-||-|±100||nA|
|**On Characteristics**|||||||||||||
|VGS(th)|Gate Threshold Voltage|||VGS= VDS, ID= 4 mA|||3.0||-|5.0||V|
|RDS(on)|Static Drain to Source On Resistance|||VGS= 10 V, ID= 20 A|||-||70|82||mΩ|
|gFS|Forward Transconductance|||VDS= 20 V, ID= 20 A|||-||24|-||S|
|**Dynamic Characteristics**|||||||||||||
|Ciss|Input Capacitance|||VDS= 400 V, VGS= 0 V,<br>f = 1 MHz|||-||3410|-||pF|
|Coss|Output Capacitance||||||-||70|-||pF|
|Coss(eff.)|Effective Output Capacitance|||VDS= 0 V to 400 V, VGS= 0 V|||-||722|-||pF|
|Coss(er.)|Energy Related Output Capacitance|||VDS= 0 V to 400 V, VGS= 0 V|||-||126|-||pF|
|Qg(tot)|Total Gate Charge at 10V|||VDS= 400 V, ID= 20 A,<br>VGS= 10 V<br>(Note 4)|||-||81|-||nC|
|Qgs|Gate to Source Gate Charge||||||-||24|-||nC|
|Qgd|Gate to Drain “Miller” Charge||||||-||32|-||nC|
|ESR|Equivalent Series Resistance|||f = 1 MHz|||-||1.9|-||Ω|
|**Switching Characteristics**|||||||||||||
|td(on)|Turn-On DelayTime|||VDD= 400 V, ID= 20 A,<br>VGS= 10 V, Rg= 3Ω<br>(Note 4)|||-||27|-||ns|
|tr|Turn-On Rise Time||||||-||27|-||ns|
|td(off)|Turn-Off DelayTime||||||-||79|-||ns|
|tf|Turn-Off Fall Time||||||-||5|-||ns|
|**Source-Drain Diode Characteristics**|||||||||||||
|IS|Maximum Continuous Source to Drain Diode Forward Current||||||-||-|40||A|
|ISM|Maximum Pulsed Source to Drain Diode Forward Current||||||-||-|100||A|
|VSD|Source to Drain Diode Forward Voltage|||VGS= 0 V, ISD= 20 A|||-||-|1.3||V|
|trr|Reverse RecoveryTime|||VGS= 0 V, ISD= 20 A,<br>dIF/dt = 100 A/μs|||-||108|-||ns|
|Qrr|Reverse RecoveryCharge||||||-||410|-||nC|



## **Notes:** 

1. Repetitive rating: pulse-width limited by maximum junction temperature. 

2. IAS = 4.8 A, RG = 25 Ω, starting TJ = 25°C. 

3. ISD ≤ 20 A, di/dt ≤ 100 A/μs, VDD ≤ 400 V, starting TJ = 25°C. 

4. Essentially independent of operating temperature typical characteristics. 

www.onsemi.com 

**2** 

## **Typical Performance Characteristics** 

**==> picture [457 x 183] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics<br>200 200<br>VGS =   10.0V *Notes:<br>100              8.0V 100    1. V DS = 20V<br>             7.0V    2. 250 μ s Pulse Test<br>             6.5V<br>             6.0V<br>             5.5V<br>10<br>150 o C<br>10<br>25oC<br>1<br>*Notes: -55 o C<br>   1. 250 μ s Pulse Test<br>   2. TC = 25 [o] C<br>0.1 1<br>0.1 1 10 20 2 3 4 5 6 7 8 9<br>VDS, Drain-Source Voltage[V] VGS, Gate-Source Voltage[V]<br>, Drain Current[A] , Drain Current[A]<br>ID ID<br>**----- End of picture text -----**<br>


**Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage** 

**Figure 4. Body Diode Forward Voltage Variation vs. Source Current** 

**==> picture [461 x 370] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.20 1000<br>*Note: TC = 25 [o] C *Notes:<br>1. V GS  = 0V<br>100 2. 250 μ s Pulse Test<br>0.15<br> 150 [o] C<br>10<br>25 [o] C<br>0.10 V GS  = 10V 1<br>VGS = 20V 0.1 -55 o C<br>0.05<br>0.01<br>0.00 0.001<br>0 20 40 60 80 100 120 0.0 0.5 1.0 1.5 2.0<br>ID, Drain Current [A] VSD, Body Diode Forward Voltage [V]<br>Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics<br>100000 10<br>*Note: ID = 20A<br>10000 Ciss 8 VDS = 130V<br>1000 V DS  = 400V<br>6<br>Coss<br>100<br>*Note: 4<br>10    1. VGS = 0V<br>   2. f = 1MHz<br>1 Ciss = Cgs + Cgd (Cds = shorted) C rss 2<br>Coss = Cds + Cgd<br>Crss = Cgd<br>0.1 0<br>0.1 1 10 100 1000 0 20 40 60 80 100<br>VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC]<br>] Ω<br>DS(ON),<br>R<br>, Reverse Drain Current [A]<br>IS<br>Drain-Source On-Resistance [<br>, Gate-Source Voltage [V]<br>Capacitances [pF]<br>GS<br>V<br>**----- End of picture text -----**<br>


www.onsemi.com 

**3** 

## **Typical Performance Characteristics** (Continued) 

**==> picture [424 x 21] intentionally omitted <==**

**----- Start of picture text -----**<br>
       Figure 7. Breakdown Voltage Variation                      Figure 8. On-Resistance Variation<br>                        vs. Temperature                                                            vs. Temperature<br>**----- End of picture text -----**<br>


**==> picture [209 x 383] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.2<br>*Notes:<br>   1. VGS = 0V<br>   2. ID = 10mA<br>1.1<br>1.0<br>0.9<br>0.8<br>-50 0 50 100 150<br>TJ, Junction Temperature [ [o] C]<br>200<br>100 30 μ s<br>100 μ s<br>1ms<br>10<br>10ms<br>DC<br>Operation in This Area<br>is Limited by R DS(on)<br>1<br>*Notes:<br>   1. TC = 25 [o] C<br>   2. T J = 150 [o] C<br>   3. Single Pulse<br>0.1<br>1 10 100 1000<br>VDS, Drain-Source Voltage [V]<br>, [Normalized]<br>DSS<br>BV<br>Drain-Source Breakdown Voltage<br>, Drain Current [A]<br>ID<br>**----- End of picture text -----**<br>


**==> picture [209 x 382] intentionally omitted <==**

**----- Start of picture text -----**<br>
3.0<br>*Notes:<br>   1. VGS = 10V<br>2.5    2. I D  = 20A<br>2.0<br>1.5<br>1.0<br>0.5<br>0.0<br>-50 0 50 100 150<br>TJ, Junction Temperature [ [o] C]<br>50<br>40<br>30<br>20<br>10<br>0<br>25 50 75 100 125 150<br>TC, Case Temperature [ [o] C]<br>, [Normalized]<br>DS(on)<br>R<br>Drain-Source On-Resistance<br>, Drain Current [A]<br>ID<br>**----- End of picture text -----**<br>


**Figure 9. Maximum Safe Operating Area                   Figure 10. Maximum Drain Current vs. Case Temperature** 

**Figure 11. Eoss vs. Drain to Source Voltage** 

**==> picture [205 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
20<br>16<br>12<br>8<br>4<br>0<br>0 130 260 390 520 650<br>VDS, Drain to Source Voltage [V]<br>J]<br>μ<br> [<br>OSS<br>E<br>**----- End of picture text -----**<br>


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**4** 

**==> picture [459 x 218] intentionally omitted <==**

**----- Start of picture text -----**<br>
Typical Performance Characteristics  (Continued)<br>                                                  Figure 12. Transient Thermal Response Curve<br>2<br>DUTY CYCLE-DESCENDING ORDER<br>1<br>D = 0.5<br>      0.2<br>0.1       0.1       0.05 P DM<br>      0.02<br>      0.01<br>t 1<br>t2<br>0.01 NOTES:<br>Z θ JC(t) = r(t) x R θ JC<br>R θ JC  = 0.4  [o] C/W<br>SINGLE PULSE Peak TJ = PDM x Z θ JC(t) + TC<br>Duty Cycle, D = t1 / t2<br>0.001<br>10-5 10-4 10-3 10-2 10-1 100 101 102<br>t, RECTANGULAR PULSE DURATION (sec)<br>THERMAL RESISTANCE<br>r(t), NORMALIZED EFFECTIVE TRANSIENT<br>**----- End of picture text -----**<br>


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**5** 

**==> picture [392 x 401] intentionally omitted <==**

**----- Start of picture text -----**<br>
IG = const.<br>F<br>Charge<br> Figure 13. Gate Charge Test Circuit & Waveform<br>VDS RL VDS 90%<br>VGS VDD<br>RG<br>10%<br>V 10V GS DUT VGS<br>td(on) tr td(off) tf<br>=n wa t on 4S t off<br> Figure 14. Resistive Switching Test Circuit & Waveforms<br>Vos oyL Eas= >4 Llas5<br>| D ~ dD BVpss = —_<br>of las |— _<br>: Rnr <r) FF Voo lo(t)<br>VGS TL DUT Vop<br>**----- End of picture text -----**<br>


**Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms** 

www.onsemi.com 

**6** 

**==> picture [352 x 542] intentionally omitted <==**

**----- Start of picture text -----**<br>
DUT +<br>VDS<br>_<br>I SD<br>L<br>Driver<br>RG<br>Same Type<br>as DUT VDD<br>VGS • dv/dt controlled by  RG<br>• ISD controlled by pulse period<br>Gate Pulse Width<br>VGS D = --------------------------<br>Gate Pulse Period 10V<br>( Driver )<br>IFM , Body Diode Forward Current<br>I SD<br>( DUT ) di/dt<br>IRM<br>Body Diode Reverse Current<br>VDS<br>( DUT ) Body Diode Recovery dv/dt<br>VSD VDD<br>Body Diode<br>Forward Voltage Drop<br>**----- End of picture text -----**<br>


**Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms** 

www.onsemi.com 

**7** 

## **Mechanical Dimensions** 

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**8** 



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