# Power MOSFET, N Channel, 20 V, 2.5 A, 0.045 ohm, TSOP, Surface Mount

![Product image](https://novapart.co/image/farnell:2533186/)

**URL**: https://novapart.co/products/NTGS3446T1G/power-mosfet-n-channel-20-v-25-a-0045-ohm-tsop
**SKU**: NTGS3446T1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.1770
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:2.5A; Drain Source Voltage Vds:20V; On Resistance Rds(on):0.036ohm; Rds(on) Test Voltage Vgs:4.5V; Threshold Voltage Vgs:850mV; Po

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 6Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 500mW |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 4.5V |
| Transistor Case Style | TSOP |
| Drain Source Voltage Vds | 20V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 2.5A |
| Drain Source On State Resistance | 0.045ohm |
| Gate Source Threshold Voltage Max | 850mV |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2533186/)

## NTGS3446 

**==> picture [190 x 188] intentionally omitted <==**

**----- Start of picture text -----**<br>
ON Semiconductor®<br>[@] http://onsemi.com<br>V(BR)DSS RDS(on) TYP ID MAX<br>20 V 36 m  @ 4.5 V 5.1 A<br>rra<br>**----- End of picture text -----**<br>


## Power MOSFET 20 V, 5.1 A Single N−Channel, TSOP6 

## **Features** 

- Ultra Low R DS(on) 

- Higher Efficiency Extending Battery Life 

- Logic Level Gate Drive 

- Diode Exhibits High Speed, Soft Recovery 

- Avalanche Energy Specified 

- IDSS Specified at Elevated Temperature 

- Pb−Free Package is Available 

**N−Channel Applications** Drain 1 2 5 6 • Power Management in portable and battery−powered products, i.e. computers, printers, PCMCIA cards, cellular and cordless • Lithium Ion Battery Applications • Notebook PC Gate 3 **MAXIMUM RATINGS** (TC = 25 ° C unless otherwise noted) **Rating Symbol Value Unit** ~~ee~~ Source : 4 Drain−to−Source Voltage VDSS 20 V ~~es~~ Gate−to−Source Voltage VGS ± 12 V **MARKING** ~~a~~ **DIAGRAM** Thermal Resistance Junction−to−Ambient (Note 1) R JA 244 ° C/W Total Power Dissipation @ TA = 25 ° C Pd 0.5 W **TSOP−6** Drain Current **CASE 318G** 446[W] − Continuous @ TA = 25 ° C ID 2.5 A 1 **STYLE 1** ~~Pile~~ − Pulsed Drain Current (tp 10 s) IDM 10 A 1 Ltt TT Thermal Resistance Junction−to−Ambient (Note 2) R JA 128 ° C/W 446 = Device Code Total Power Dissipation @ TA = 25 ° C Pd 1.0 W W = Work Week Drain Current − Continuous @ TA = 25 ° C ID 3.6 A − Pulsed Drain Current (tp 10 s) IDM 14 A **PIN ASSIGNMENT** ~~eae -~~ Thermal Resistance Drain Drain Source Junction−to−Ambient (Note 3) R JA 62.5 ° C/W 6 5 4 Total Power Dissipation @ TA = 25 ° C Pd 2.0 W Drain Current − Continuous @ TA = 25 ° C ID 5.1 A − Pulsed Drain Current (tp : 10 s) IDM 20 A ~~PEL)~~ gt Source Current (Body Diode) IS 5.1 A ~~ee~~ Operating and Storage Temperature Range TJ, Tstg −55 to ° C Drain JUU 1 Drain2 3Gate 150 ~~ee~~ Maximum Lead Temperature for Soldering ~~eee~~ TL 260 ° C Purposes for 10 seconds **ORDERING INFORMATION** ~~ee eee~~ 

## **Applications** 

- Power Management in portable and battery−powered products, i.e. computers, printers, PCMCIA cards, cellular and cordless 

- Lithium Ion Battery Applications 

- Notebook PC 

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 

|**Device**|**Package**|**Shipping**†|
|---|---|---|
|NTGS3446T1|TSOP−6|3000/Tape & Reel|
|NTGS3446T1G|TSOP−6<br>(Pb−Free)|3000/Tape & Reel|



1. Minimum FR−4 or G−10PCB, operating to steady state. 

   - †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 

2. Mounted onto a 2” square FR−4 board (1” sq. 2 oz. cu. 0.06” thick single−sided), operating to steady state. 

3. Mounted onto a 2” square FR−4 board (1” sq. 2 oz. cu. 0.06” thick single−sided), t < 5.0 seconds. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2006 **January, 2006 − Rev. 5** 

**NTGS3446/D** 

**NTGS3446** 

## **ELECTRICAL CHARACTERISTICS** (TC = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS **(TC= 25°C unless otherwise noted|**ELECTRICAL CHARACTERISTICS **(TC= 25°C unless otherwise noted|)|||||
|---|---|---|---|---|---|---|
|**Characteristic**||**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**|||||||
|Drain−to−Source Breakdown Voltage<br>(VGS= 0 Vdc, ID= 0.25 mAdc)<br>Temperature Coefficient (Positive)||V(BR)DSS|20<br>−|−<br>22|−<br>−|Vdc<br>mV/°C|
|Zero Gate Voltage Collector Current<br>(VDS= 20 Vdc, VGS= 0 Vdc)<br>(VDS= 20 Vdc, VGS= 0 Vdc, TJ= 85°C)||IDSS|−<br>−|−<br>−|1.0<br>25|�Adc|
|Gate−Body Leakage Current (VGS=±12 Vdc, VDS= 0)||IGSS(f)<br>IGSS(r)|−<br>−|−<br>−|100<br>−100|nAdc|
|**ON CHARACTERISTICS**(Note 4)|||||||
|Gate Threshold Voltage<br>ID= 0.25 mA, VDS= VGS<br>Temperature Coefficient (Negative)||VGS(th)|0.6<br>−|0.85<br>−2.5|1.2<br>−|Vdc<br>mV/°C|
|Static Drain−to−Source On−Resistance<br>(VGS= 4.5 Vdc, ID= 5.1 Adc)<br>(VGS= 2.5 Vdc, ID= 4.4 Adc)||RDS(on)|−<br>−|36<br>44|45<br>55|m�|
|Forward Transconductance (VDS= 10 Vdc, ID= 5.1 Adc)||gFS|−|12|−|mhos|
|**DYNAMIC CHARACTERISTICS**|||||||
|Input Capacitance|(VDS= 10 Vdc, VGS= 0 Vdc,<br>f = 1.0 MHz)|Ciss|−|510|750|pF|
|Output Capacitance||Coss|−|200|350||
|Transfer Capacitance||Crss|−|60|100||
|**SWITCHING CHARACTERISTICS**(Note 5)|||||||
|Turn−On Delay Time|(VDD= 10 Vdc, ID= 1.0 Adc,<br>VGS= 4.5 Vdc, RG= 6.0�)|td(on)|−|9.0|16|ns|
|Rise Time||tr|−|12|20||
|Turn−Off Delay Time||td(off)|−|35|60||
|Fall Time||tf|−|20|35||
|Gate Charge|(VDS= 10 Vdc, ID= 5.1 Adc,<br>VGS= 4.5 Vdc)|QT|−|8.0|15|nC|
|||Qgs|−|2.0|−||
|||Qgd|−|2.0|−||
|**SOURCE−DRAIN DIODE CHARACTERISTICS**|||||||
|Forward On−Voltage (Note 4)|(IS= 1.7 Adc, VGS= 0 Vdc)<br>(IS= 1.7 Adc, VGS= 0 Vdc, TJ= 85°C)|VSD|−<br>−|0.74<br>0.66|1.1<br>−|Vdc|
|Reverse Recovery Time|(IS= 1.7 Adc, VGS= 0 Vdc,<br>diS/dt = 100 A/�s)|trr|−|20|−|ns|
|||ta|−|11|−||
|||tb|−|9.0|−||
|Reverse Recovery Stored<br>Charge||QRR|−|0.01|−|�C|



4. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

5. Switching characteristics are independent of operating junction temperature. 

**http://onsemi.com** 

**2** 

**NTGS3446** 

**==> picture [254 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
14 VGS = 2.6 V VGS = 2.2 V TJ = 25 ° C<br>12<br>10 VGS = 5 V<br>VGS = 10 V VGS = 2 V<br>8<br>6<br>VGS = 1.8 V<br>4<br>2 VGS = 1.6 V<br>VGS = 1.4 V<br>0<br>0 1 2 3 4 5 6 7 8 9 10<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>**----- End of picture text -----**<br>


**Figure 1. On−Region Characteristics** 

**==> picture [222 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
14<br>VDS �  10 V<br>12<br>10<br>8<br>6<br>4<br>2 TJ = 125 ° C TJ = 25 ° C<br>TJ = −55 ° C<br>0<br>0 1 2 3 4 5<br>VGS, GATE−TO−SOURCE VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 2. Transfer Characteristics** 

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**----- Start of picture text -----**<br>
0.11 0.06<br>ID = 3.3 A TJ = 25 ° C<br>TJ = 25 ° C<br>0.05<br>0.085<br>VGS = 2.5 V<br>0.04<br>0.06 VGS = 5.5 V<br>0.03<br>0.035<br>0.02<br>0.01 0.01<br>1 2 3 4 5 6 2 3 4 5 6 7 8 9 10<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 3. On−Resistance versus Figure 4. On−Resistance versus Drain Current<br>Gate−To−Source Voltage and Gate Voltage<br>1.6 1000<br>ID = 3.25 A<br>VGS = 4.5 V TJ = 150 ° C<br>1.4 VGS = 0 V<br>1.2<br>100<br>1<br>0.8<br>TJ = 100 ° C<br>0.6 10<br>−50 −25 0 25 50 75 100 125 150 2 4 6 8 10 12 14 16 18 20<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current<br>Temperature versus Voltage<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>(NORMALIZED) IDSS<br>, DRAIN−TO−SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**http://onsemi.com** 

**3** 

**NTGS3446** 

**==> picture [492 x 181] intentionally omitted <==**

**----- Start of picture text -----**<br>
1400 5 15<br>VDS = 0 V VGS = 0 V TJ = 25 ° C QT<br>1200 Ciss<br>4 12<br>1000 −VDS<br>−VGS<br>3 9<br>800<br>600 Crss Ciss 2 Qgs Qgd TIDJ = 5.1 A = 25 ° C 6<br>400<br>1 3<br>200 Coss<br>Crss<br>0 0 0<br>−10 −5.0 0 5.0 10 15 20 0 1 2 3 4 5 6 7 8<br>VGS VDS<br>C, CAPACITANCE (pF)<br>, DRAIN−TO−SOURCE VOLTAGE<br>, GATE−TO−SOURCE VOLTAGE (V)<br>DS<br>GS V<br>V<br>**----- End of picture text -----**<br>


**==> picture [119 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Qg, TOTAL GATE CHARGE (nC)<br>**----- End of picture text -----**<br>


**==> picture [224 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge** 

**Figure 7. Capacitance Variation** 

**==> picture [471 x 178] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000<br>VDS = 10 V 6 VGS = 0 V<br>ID = 5.1 A TJ = 25 ° C<br>VGS = 4.5 V 5<br>100<br>4<br>Vf<br>3<br>10 Vr Vd(off) Vd(on)<br>2<br>1<br>1 0<br>1 10 100 0.2 0.4 0.6 0.8 1<br>RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>t, TIME (ns)<br>, SOURCE CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation versus Gate Resistance** 

**Figure 10. Diode Forward Voltage versus Current** 

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**4** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

**==> picture [479 x 542] intentionally omitted <==**

**----- Start of picture text -----**<br>
TSOP−6<br>CASE 318G−02<br>gd<br>ISSUE V<br>1<br>DATE 12 JUN 2012<br>SCALE 2:1<br>D NOTES:1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>H 2. CONTROLLING DIMENSION: MILLIMETERS.<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM<br>LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.<br>6 5 4 L2 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,<br>GAUGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR<br>E1 ÉÉ E PLANE GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D<br>AND E1 ARE DETERMINED AT DATUM H.<br>ÉÉ 1 2 3 L 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.<br>NOTE 5 b M C PLANESEATING DIM MIN MILLIMETERSNOM MAX<br>DETAIL Z A 0.90 1.00 1.10<br>i e A1 0.01 0.06 0.10<br>b 0.25 0.38 0.50<br>c 0.10 0.18 0.26<br>D 2.90 3.00 3.10<br>A c E 2.50 2.75 3.00<br>0.05 E1 1.30 1.50 1.70<br>e 0.85 0.95 1.05<br>A1 L 0.20 0.40 0.60<br>DETAIL Z L2M 0° 0.25 BSC− 1 0°<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: STYLE 6:<br>PIN 1. DRAIN PIN 1. EMITTER 2 PIN 1. ENABLE PIN 1. N/C PIN 1. EMITTER 2 PIN 1. COLLECTOR<br>2. DRAIN 2. BASE 1 2. N/C 2. V in 2. BASE 2 2. COLLECTOR<br>3. GATE 3. COLLECTOR 1 3. R BOOST 3. NOT USED 3. COLLECTOR 1 3. BASE<br>4. SOURCE 4. EMITTER 1 4. Vz 4. GROUND 4. EMITTER 1 4. EMITTER<br>5. DRAIN 5. BASE 2 5. V in 5. ENABLE 5. BASE 1 5. COLLECTOR<br>6. DRAIN 6. COLLECTOR 2 6. V out 6. LOAD 6. COLLECTOR 2 6. COLLECTOR<br>STYLE 7: STYLE 8: STYLE 9: STYLE 10: STYLE 11: STYLE 12:<br>PIN 1. COLLECTOR PIN 1. Vbus PIN 1. LOW VOLTAGE GATE PIN 1. D(OUT)+ PIN 1. SOURCE 1 PIN 1. I/O<br>2. COLLECTOR 2. D(in) 2. DRAIN 2. GND 2. DRAIN 2 2. GROUND<br>3. BASE 3. D(in)+ 3. SOURCE 3. D(OUT)− 3. DRAIN 2 3. I/O<br>4. N/C 4. D(out)+ 4. DRAIN 4. D(IN)− 4. SOURCE 2 4. I/O<br>5. COLLECTOR 5. D(out) 5. DRAIN 5. VBUS 5. GATE 1 5. VCC<br>6. EMITTER 6. GND 6. HIGH VOLTAGE GATE 6. D(IN)+ 6. DRAIN 1/GATE 2 6. I/O<br>STYLE 13: STYLE 14: STYLE 15: STYLE 16: STYLE 17:<br>PIN 1. GATE 1 PIN 1. ANODE PIN 1. ANODE PIN 1. ANODE/CATHODE PIN 1. EMITTER<br>2. SOURCE 2 2. SOURCE 2. SOURCE 2. BASE 2. BASE<br>3. GATE 2 3. GATE 3. GATE 3. EMITTER 3. ANODE/CATHODE<br>4. DRAIN 2 4. CATHODE/DRAIN 4. DRAIN 4. COLLECTOR 4. ANODE<br>5. SOURCE 1 5. CATHODE/DRAIN 5. N/C 5. ANODE 5. CATHODE<br>6. DRAIN 1 6. CATHODE/DRAIN 6. CATHODE 6. CATHODE 6. COLLECTOR<br>GENERIC<br>RECOMMENDED<br>MARKING DIAGRAM*<br>SOLDERING FOOTPRINT*<br>6X<br>0.60<br>XXXAYW XXX M<br>roo 1 1<br>3.20 6X<br>0.95 IC STANDARD<br>XXX = Specific Device Code XXX = Specific Device Code<br>A =Assembly Location M = Date Code<br>Loom Y = Year | = Pb−Free Package<br>0.95 W = Work Week<br>PITCH<br>= Pb−Free Package<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering *This information is generic. Please refer to device data sheet details, please download the ON Semiconductor Soldering and for actual part marking. Pb−Free indicator, “G” or microdot “ Mounting Techniques Reference Manual, SOLDERRM/D. ”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98ASB14888C** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: TSOP−6 PAGE 1 OF 1** ~~Be~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

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