# Power MOSFET, N Channel, 60 V, 155 A, 2100 µohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:3929791/)

**URL**: https://novapart.co/products/NTD5C632NLT4G/power-mosfet-n-channel-60-v-155-a-2100-ohm-to-252
**SKU**: NTD5C632NLT4G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5220
**Stock**: 1000+
**Lead Time**: 141 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 115W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 155A |
| Drain Source On State Resistance | 2100µohm |
| Gate Source Threshold Voltage Max | 2.1V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3929791/)

## NTD5C632NL MOSFET – Single, N-Channel ~~-~~ 60 V, 2.5 m 155 A 

## **Features** 

- Low R to Minimize Conduction Losses DS(on) 

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- Low QG and Capacitance to Minimize Driver Losses 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

~~ee~~ **V(BR)DSS RDS(on) ID** Compliant ~~ee~~ 2.5 m @ 10 V 60 V 155 A **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) 3.4 m @ 4.5 V **Parameter Symbol Value Unit** Drain−to−Source Voltage VDSS 60 V D Gate−to−Source Voltage VGS 20 V ~~ee~~ Continuous Drain CurTC = 25 ° C ~~ee~~ ID 155 A rent R JC (Notes 1 & 3) Steady TC = 100 ° C 110 G Power Dissipation R JC State TC = 25 ° C PD 115 W (Note 1) TC = 100 ° C 58 S ~~=e re~~ Continuous Drain TA = 25 ° C ID 29 A **N−CHANNEL MOSFET** Current R(Notes 1, 2 & 3)JA Steady TA = 100 ° C 21 4 Power Dissipation R JA State TA = 25 ° C PD 4 W (Notes 1 & 2) TA = 100 ° C 2 1[2] ~~ptET~~ tg 3 ~~ee~~ Pulsed Drain Current TA = 25 ° C, tp = 10 s IDM 900 A **DPAK** Operating Junction and Storage Temperature TJ, Tstg −55 to ° C **CASE 369C** ~~ee ee~~ 175 e **STYLE 2** ee ~~po~~ Source Current (Body Diode) IS 96 A ~~ee~~ Single Pulse Drain−to−Source Avalanche EAS 363 mJ **MARKING DIAGRAM** Energy (IL(pk) = 14.4 A) ~~po~~ **& PIN ASSIGNMENT** Lead Temperature for Soldering Purposes TL 260 ° C ~~po~~ (1/8 ″ from case for 10 s) Drain4 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. **THERMAL RESISTANCE MAXIMUM RATINGS** 2 **Parameter Symbol Value Unit** 1 Drain 3 ~~ee~~ Junction−to−Case (Drain) (Note 1) R JC 1.3 ° C/W Gate ' Source Junction−to−Ambient − Steady State (Note 2) R JA 37 A = Assembly Location Y = Year 1. The entire application environment impacts the thermal resistance values shown, WW = Work Week they are not constants and are only valid for the particular conditions noted. 5C632L = Device Code 2. Surface−mounted on FR4 board using a 650 mm[[2]] , 2 oz. Cu pad. G = Pb−Free Package 

2. Surface−mounted on FR4 board using a 650 mm[[2]] , 2 oz. Cu pad. 

3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. 

Publication Order Number: **NTD5C632NL/D** 

**1** 

© Semiconductor Components Industries, LLC, 2016 **May, 2019 − Rev. 1** 

**NTD5C632NL** 

## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS **(TJ|= 25°C unless|otherwise noted)|otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
|Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|60|||V|
|Drain−to−Source Breakdown Voltage<br>Temperature Coefficient|V(BR)DSS/TJ||||24||mV/°C|
|Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,<br>VDS= 60 V|TJ= 25°C|||10|�A|
||||TJ= 125°C|||250||
|Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS= 20 V||||100|nA|
|**ON CHARACTERISTICS**(Note 4)||||||||
|Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||1.2||2.1|V|
|Negative Threshold Temperature Coefficient|VGS(TH)/TJ||||5.8||mV/°C|
|Drain−to−Source On Resistance|RDS(on)|VGS= 10 V, ID= 50 A|||2.1|2.5|m�|
|||VGS= 4.5 V, ID= 50 A|||2.7|3.4||
|Forward Transconductance|gFS|VDS= 3 V, ID= 50 A|||185||S|
|**CHARGES, CAPACITANCES AND GATE RESISTANCES**||||||||
|Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,<br>VDS= 25 V|||5700||pF|
|Output Capacitance|Coss||||2800|||
|Reverse Transfer Capacitance|Crss||||36|||
|Total Gate Charge|QG(TOT)|VDS= 30 V,<br>ID= 50 A|VGS= 4.5 V||34||nC|
||||VGS= 10 V||78|||
|Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 30 V,<br>ID= 50 A|||34.0||nC|
|Threshold Gate Charge|QG(TH)||||9.5|||
|Gate−to−Source Charge|QGS||||16.8|||
|Gate−to−Drain Charge|QGD||||6.1|||
|Plateau Voltage|VGP||||3.1||V|
|Gate Resistance|RG||||0.7||�|
|**SWITCHING CHARACTERISTICS**(Note 5)||||||||
|Turn−On Delay Time|td(on)|VGS= 4.5 V, VDS= 30 V,<br>ID= 50 A, RG= 2.5�|||20||ns|
|Rise Time|tr||||126|||
|Turn−Off Delay Time|td(off)||||65|||
|Fall Time|tf||||121|||
|**DRAIN−SOURCE DIODE CHARACTERISTICS**||||||||
|Forward Diode Voltage|VSD|VGS= 0 V,<br>IS= 50 A|TJ= 25°C||0.8|1.2|V|
||||TJ= 125°C||0.7|||
|Reverse Recovery Time|tRR|VGS= 0 V, dIS/dt<br>IS= 50|= 100 A/�s,<br>A||71||ns|
|Charge Time|ta||||36|||
|Discharge Time|tb||||36|||
|Reverse Recovery Charge|QRR||||110||nC|



4. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

5. Switching characteristics are independent of operating junction temperatures. 

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**2** 

**NTD5C632NL** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [490 x 382] intentionally omitted <==**

**----- Start of picture text -----**<br>
280 280<br>10 V to4.5 V VGS = 3.6 V 3.4 V VDS = 3 V<br>240 240<br>3.2 V<br>200 200<br>160 3.0 V 160<br>120 120 TJ = 25 ° C<br>2.8 V<br>80 80<br>2.6 V<br>40 40<br>0 2.4 V2.2 V 0 TJ = 125 ° C TJ = −55 ° C<br>0 0.5 1.0 1.5 2.0 2.5 0 1 2 3 4<br>VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>8 3.5<br>7 ITDJ = 50 A = 25 ° C TJ = 25 ° C<br>6 3.0<br>VGS = 4.5 V<br>5<br>4 2.5<br>3 VGS = 10 V<br>2 2.0<br>1<br>0 1.5<br>1 2 3 4 5 6 7 8 9 10 10 20 30 40 50 60 70 80 90 100<br>VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>, DRAIN CURRENT (A) , DRAIN CURRENT (A)<br>ID ID<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE (m , DRAIN−TO−SOURCE RESISTANCE (m<br>DS(on) DS(on)<br>R R<br>**----- End of picture text -----**<br>


**Figure 3. On−Resistance vs. Gate−to−Source Voltage** 

**Figure 4. On−Resistance vs. Drain Current and Gate Voltage** 

**==> picture [487 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.0 100K<br>VGS = 10 V<br>1.8 ID = 50 A T J  = 150 ° C<br>1.6<br>10K TJ = 125 ° C<br>1.4<br>1.2<br>1.0 1K TJ = 85 ° C<br>0.8<br>0.6 100<br>−50 −25 0 25 50 75 100 125 150 175 5 15 25 35 45 55<br>TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>, LEAKAGE (nA)<br>, NORMALIZED DRAIN−TO− IDSS<br>SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

**www.onsemi.com** 

**3** 

**NTD5C632NL** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [241 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
10K<br>CISS<br>1K COSS<br>100<br>CRSS<br>10 VGS = 0 V<br>TJ = 25 ° C<br>f = 1 MHz<br>1<br>0 10 20 30 40 50 60<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**==> picture [150 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS, DRAIN−TO−SOURCE VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 7. Capacitance Variation** 

**==> picture [243 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000<br>t d(off)<br>t f<br>tr<br>100<br>td(on)<br>VGS = 4.5 V<br>V DS  = 30 V<br>ID = 50 A<br>10<br>1 10 100<br>t, TIME (ns)<br>**----- End of picture text -----**<br>


**==> picture [104 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
RG, GATE RESISTANCE ( � )<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** 

**==> picture [245 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000<br>100<br>10 VGS ≤  10 V<br>Single Pulse 10  � s<br>TC = 25 ° C 0.5 ms<br>1 ms<br>1 RDS(on) Limit 10 ms<br>Thermal Limit<br>Package Limit<br>0.1<br>0.1 1 10 100 1000<br>VDS, DRAIN−TO−SOURCE VOLTAGE(V)<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**==> picture [236 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
10<br>QT<br>9<br>8<br>7<br>6<br>5<br>4 QGS QGD<br>3<br>2 V DS  = 30 V<br>TJ = 25 ° C<br>1 I D  = 50 A<br>0<br>0 10 20 30 40 50 60 70 80<br>, GATE−TO−SOURCE VOLTAGE (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**==> picture [119 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
QG, TOTAL GATE CHARGE (nC)<br>**----- End of picture text -----**<br>


**Figure 8. Gate−to−Source Voltage vs. Total Charge** 

**==> picture [234 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>VGS = 0 V<br>10<br>1 TJ = 125 ° C TJ = 25 ° C TJ = −55 ° C<br>0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>VSD, SOURCE−TO−DRAIN VOLTAGE (V)<br>, SOURCE CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 10. Diode Forward Voltage vs. Current** 

**==> picture [238 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>10 TJ(initial) = 25 ° C<br>TJ(initial) = 100 ° C<br>1<br>1E−04 1E−03 1E−02<br>TIME IN AVALANCHE (s)<br>, DRAIN CURRENT (A)<br>IPEAK<br>**----- End of picture text -----**<br>


**Figure 12. Maximum Drain Current vs. Time in Avalanche** 

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**4** 

**NTD5C632NL** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [491 x 179] intentionally omitted <==**

**----- Start of picture text -----**<br>
100<br>50% Duty Cycle<br>10 20%<br>10%<br>5%<br>1 2%<br>1%<br>0.1<br>0.01 Single Pulse<br>0.001<br>0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>PULSE TIME (sec)<br>C/W)<br>°<br>RESISTANCE (<br>(t), EFFECTIVE TRANSIENT THERMAL<br>JA<br>�<br>R<br>**----- End of picture text -----**<br>


**Figure 13. Thermal Response** 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Order Number**|**Package**|**Shipping**†|
|NTD5C632NLT4G|DPAK<br>(Pb−Free)|2500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

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**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

**==> picture [486 x 546] intentionally omitted <==**

**----- Start of picture text -----**<br>
4 DPAK (SINGLE GAUGE)<br>CASE 369C<br>ISSUE F<br>1 ® [2]<br>DATE 21 JUL 2015<br>3<br>SCALE 1:1<br>NOTES:<br>A 1. DIMENSIONING AND TOLERANCING PER ASME<br>Y14.5M, 1994.<br>E C 2. CONTROLLING DIMENSION: INCHES.<br>A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-<br>b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.<br>FLASH, PROTRUSIONS, OR BURRS. MOLD<br>FLASH, PROTRUSIONS, OR GATE BURRS SHALL<br>4 NOT EXCEED 0.006 INCHES PER SIDE.<br>L3 Ele 4| Of Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE<br>D DETAIL A H OUTERMOST EXTREMES OF THE PLASTIC BODY.<br>6. DATUMS A AND B ARE DETERMINED AT DATUM<br>1 2 3 PLANE H.<br>7. OPTIONAL MOLD FEATURE.<br>L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX<br>b2 c BOTTOM VIEW A 0.086 0.094 2.18 2.38<br>e SIDE VIEW A1 0.000 0.005 0.00 0.13<br>b b 0.025 0.035 0.63 0.89<br>TOP VIEW 0.005 (0.13) M C b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46<br>c 0.018 0.024 0.46 0.61<br>c2 0.018 0.024 0.46 0.61<br>H Z Z D 0.235 0.245 5.97 6.22<br>E 0.250 0.265 6.35 6.73<br>e 0.090 BSC 2.29 BSC<br>L2 [GAUGE] PLANE C SEATINGPLANE H 0.370 0.410 9.40 10.41<br>L 0.055 0.070 1.40 1.78<br>L1 0.114 REF 2.90 REF<br>L2 0.020 BSC 0.51 BSC<br>L L3 0.035 0.050 0.89 1.27<br>A1 BOTTOM VIEW L4 −−− 0.040 −−− 1.01<br>wat L1 h GF CONSTRUCTIONSALTERNATE Z 0.155 −−− 3.93 −−−<br>DETAIL A<br>ROTATED 9  CW GENERIC<br>MARKING DIAGRAM*<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:<br>PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE<br>2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE<br>3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE<br>4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE XXXXXXG AYWW<br>ALYWW XXX<br>STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: XXXXXG<br>PIN 1. MT1 PIN 1. GATE PIN 1. N/C PIN 1. ANODE PIN 1. CATHODE<br>2. MT2 2. COLLECTOR 2. CATHODE 2. CATHODE 2. ANODE<br>3. GATE 3. EMITTER 3. ANODE 3. RESISTOR ADJUST 3. CATHODE a d<br>4. MT2 4. COLLECTOR 4. CATHODE 4. CATHODE 4. ANODE<br>IC Discrete<br>SOLDERING FOOTPRINT* XXXXXX = Device Code<br>A = Assembly Location<br>6.20 3.00<br>L = Wafer Lot<br>0.244 0.118<br>2.58 Y =  Year<br>0.102 WW = Work Week<br>G = Pb−Free Package<br>5.80 *This information is generic. Please refer<br>0.228 1.60 6.17 to device data sheet for actual part<br>0.063 0.243 marking.<br>Ts.<br>SCALE 3:1 mm<br>inches<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON10527D** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: DPAK (SINGLE GAUGE) PAGE 1 OF 1** ~~ee~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

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© Semiconductor Components Industries, LLC, 2018 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi** ’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

**LITERATURE FULFILLMENT** : **TECHNICAL SUPPORT Email Requests to:** orderlit@onsemi.com **North American Technical Support: Europe, Middle East and Africa Technical Support:** Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 00421 33 790 2910 **onsemi Website:** www.onsemi.com Phone: 011 421 33 790 2910 For additional information, please contact your local Sales Representative 

◊ 

**==> picture [232 x 43] intentionally omitted <==**



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