# Power MOSFET, N Channel, 40 V, 69 A, 5700 µohm, TO-252 (DPAK), Surface Mount ![Product image](https://novapart.co/image/farnell:2317609/) **URL**: https://novapart.co/products/NTD5804NT4G./power-mosfet-n-channel-40-v-69-a-5700-ohm-to-252 **SKU**: NTD5804NT4G. **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.1700 **Stock**: 10+ ## Description Transistor Polarity:N Channel; Continuous Drain Current Id:69A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0057ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2V; Pow ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | No. Of Pins | 4Pins | | Channel Type | N Channel | | Product Range | - | | Qualification | - | | Power Dissipation | 71W | | Transistor Mounting | Surface Mount | | Rds(On) Test Voltage | 10V | | Transistor Case Style | TO-252 (DPAK) | | Drain Source Voltage Vds | 40V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 69A | | Drain Source On State Resistance | 5700µohm | | Gate Source Threshold Voltage Max | 2V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2317609/) ## NTD5804N, NTDV5804N, SVD5804N ## Power MOSFET **40 V, 69 A, Single N−Channel, DPAK** ## **Features** - Low RDS(on) - High Current Capability - Avalanche Energy Specified - NTDV and SVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable - These Devices are Pb−Free and are RoHS Compliant ## **Applications** - CCFL Backlight - DC Motor Control - Class D Amplifier ## **www.onsemi.com** **==> picture [190 x 128] intentionally omitted <==** **----- Start of picture text -----**
ee V(BR)DSS RDS(on) ee MAX ID MAX ee
12 m @ 5.0 V
40 V 69 A
7.5 m @ 10 V
D
N−Channel
G
S
**----- End of picture text -----**
- Power Supply Secondary Side Synchronous Rectification **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) **Parameter Symbol Value Unit** ~~es Ge Gs~~ Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage − Continuous VGS ± 20 V ~~=th~~ Gate−to−Source Voltage VGS ± 30 V ~~Pa~~ − Non−Repetitive (tp < 10 S) Continuous Drain TC = 25 ° C ID 69 A (Note 1)Current (R JC) Steady TC = 100 ° C 49 State Power Dissipation TC = 25 ° C PD 71 W (R JC) (Note 1) ~~=ea ee eee es~~ Pulsed Drain Current tp = 10 s IDM 125 A Operating Junction and Storage Temperature TJ, Tstg −55 to ° C 175 Source Current (Body Diode) IS 60 A ~~pa~~ Single Pulse Drain−to−Source Avalanche ~~erOs ee~~ EAS 195 ~~es~~ mJ Energy (VDD = 50 V, VGS = 10 V, RG = 25 ~~ae~~ IL(pk) = 36 A, L = 0.3 mH, VDS = 40 V) Lead Temperature for Soldering Purposes TL 260 ° C (1/8 ″ from case for 10 s) ~~Po~~ Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ## **THERMAL RESISTANCE MAXIMUM RATINGS** |**Parameter**
~~ee~~|**Symbol**
~~ee~~
~~es ee~~|**Value**
~~ee~~
~~ee~~|**Unit**
~~ee~~| |---|---|---|---| |Junction−to−Case (Drain)|R JC
~~es ee~~|2.1
~~ee~~|°C/W| |Junction−to−Ambient − SteadyState(Note 1)|R JA|106|| **==> picture [108 x 297] intentionally omitted <==** **----- Start of picture text -----**
4
1 [2]
> 3
DPAK
CASE 369C
(Surface Mount)
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Drain
= 2
1 Drain 3
Gate Source
A = Assembly Location*
Y = Year
WW = Work Week
5804N = Device Code
G = Pb−Free Package
AYWW 58 04NG
**----- End of picture text -----**
* The Assembly Location code (A) is front side optional. In cases where the Assembly Location is stamped in the package, the front side assembly code may be blank. 1. Surface−mounted on FR4 board using the minimum recommended pad size. ## **ORDERING INFORMATION** See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Publication Order Number: **NTD5804N/D** **1** © Semiconductor Components Industries, LLC, 2015 **January, 2015 − Rev. 9** ## **NTD5804N, NTDV5804N, SVD5804N** ## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) |**ELECTRICAL CHARACTERISTIC**|**S **(TJ= 25°C un|less otherwise noted)|less otherwise noted)||||| |---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**|||||||| |Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|40|45||V| |Drain−to−Source Breakdown Voltage
Temperature Coefficient|V(BR)DSS/TJ||||41||mV/°C| |Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,
VDS= 40 V|TJ= 25°C|||1.0|�A| ||||TJ= 150°C|||100|| |Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS=±20 V||||±100|nA| |**ON CHARACTERISTICS**(Note 2)|||||||| |Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID= 250�A||2.0||3.5|V| |Negative Threshold Temperature Co-
efficient|VGS(TH)/TJ||||7.3||mV/°C| |Drain−to−Source On Resistance|RDS(on)|VGS= 10 V, ID= 30 A|||5.7|7.5|m�| |||VGS= 5 V, ID= 10 A|||7.9|12|| |Forward Transconductance|gFS|VDS= 15 V, ID= 15 A|||12||S| |**CHARGES, CAPACITANCES AND GATE RESISTANCES**|||||||| |Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,
VDS= 25 V|||2460|2850|pF| |Output Capacitance|Coss||||310|400|| |Reverse Transfer Capacitance|Crss||||215|280|| |Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 32 V,
ID= 30 A|||45||nC| |Threshold Gate Charge|QG(TH)||||2.8||| |Gate−to−Source Charge|QGS||||10||| |Gate−to−Drain Charge|QGD||||12.6||| |**SWITCHING CHARACTERISTICS**(Note 3)|||||||| |Turn−On Delay Time|td(on)|VGS= 10 V, VDD= 32 V,
ID= 30 A, RG= 2.5�|||11.8||ns| |Rise Time|tr||||18.7||| |Turn−Off Delay Time|td(off)||||26.8||| |Fall Time|tf||||5.9||| |**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||| |Forward Diode Voltage|VSD|VGS= 0 V,
IS= 10 A|TJ= 25°C||0.81|1.2|V| ||||TJ= 150°C||0.63||| |Reverse Recovery Time|tRR|VGS= 0 V, dIs/dt
IS= 30|= 100 A/�s,
A||21.7||ns| |Charge Time|ta||||11.9||| |Discharge Time|tb||||9.8||| |Reverse Recovery Charge|QRR||||11.8||nC| Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 3. Switching characteristics are independent of operating junction temperatures. **www.onsemi.com** **2** **NTD5804N, NTDV5804N, SVD5804N** ## **TYPICAL PERFORMANCE CHARACTERISTICS** **==> picture [491 x 620] intentionally omitted <==** **----- Start of picture text -----**
100 100
90 10 V TJ = 25 ° C VDS ≥ 10 V
VGS = 7, 6, 5.8, 5.5, 5.2, 5 V
80
4.5 V 75
70
60
50 50
40
30 4.0 V TJ = 100 ° C
25
20 TJ = 25 ° C
10 3.5 V TJ = −55 ° C
0 0
0 0.5 1 1.5 2 2.5 3 2 3 4 5 6
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
0.021 0.05
0.019 ID = 30 A TJ = 25 ° C
TJ = 25 ° C 0.04
0.017
0.015
0.03
0.013
VGS = 5 V
0.02
0.011
0.009
0.01
0.007 VGS = 10 V
0.005 0
4 5 6 7 8 9 10 10 20 30 40 50 60 70 80
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Drain Current Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.9 10,000
1.8 ID = 69 A VGS = 0 V
1.7 VGS = 10 V TJ = 150 ° C
1.6
1.5 1000
1.4
1.3
1.2 TJ = 100 ° C
1.1 100
1.0
0.9
0.8
0.7 10
−50 −25 0 25 50 75 100 125 150 175 2 12 22 32 42
TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current
Temperature vs. Voltage
, DRAIN CURRENT (A) , DRAIN CURRENT (A)
ID ID
) � ) �
, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (
DS(on) DS(on)
R R
, LEAKAGE (nA)
IDSS
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
DS(on)
R
**----- End of picture text -----**
**www.onsemi.com** **3** **NTD5804N, NTDV5804N, SVD5804N** ## **TYPICAL PERFORMANCE CHARACTERISTICS** **==> picture [493 x 604] intentionally omitted <==** **----- Start of picture text -----**
6000 15 45
VGS = 0 V
5000 TJ = 25 ° C
QT
4000 10 30
VDS
Ciss
3000 VGS
2000 5 Q gs Q gd 15
1000 Coss ID = 30 A
Crss TJ = 25 ° C
0 0 0
10 5 0 5 10 15 20 25 30 35 40 0 15 30 45
Vgs Vds Qg, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 8. Gate−to−Source and
Figure 7. Capacitance Variation Drain−to−Source Voltage vs. Total Charge
1000 30
VIDDD = 30 A = 32 V td(off) VTJGS = 25 = 0 V ° C
VGS = 10 V tf
100 tr 20
td(on)
10 10
1 0
1 10 100 0.4 0.5 0.6 0.7 0.8 0.9 1.0
RG, GATE RESISTANCE ( � ) VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current
vs. Gate Resistance
1000
100
10 � s
10 100 � s
VGS = 20 V 1 ms
SINGLE PULSE
TC = 25 ° C 10 ms
1 dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.1 1 10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
DS
C, CAPACITANCE (pF)
, GATE−TO−SOURCE VOLTAGE (V)
GS
V , DRAIN−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
, SOURCE CURRENT (A)
IS
ID, DRAIN CURRENT (AMPS)
**----- End of picture text -----**
**Figure 11. Maximum Rated Forward Biased Safe Operating Area** **www.onsemi.com** **4** **NTD5804N, NTDV5804N, SVD5804N** ## **TYPICAL PERFORMANCE CHARACTERISTICS** **==> picture [494 x 174] intentionally omitted <==** **----- Start of picture text -----**
10
D = 0.5
1
0.2
0.1
0.05
0.1
0.02
0.01
Single Pulse
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t, PULSE TIME (s)
C/W)
( °
r(t), Effective Transient Thermal Resistance
**----- End of picture text -----**
**Figure 12. Thermal Response** ## **ORDERING INFORMATION** |**ORDERING INFORMATION**||| |---|---|---| |**Order Number**|**Package**|**Shipping**†| |NTD5804NT4G|DPAK
(Pb−Free)|2500 / Tape & Reel| |NTDV5804NT4G*|DPAK
(Pb−Free)|2500 / Tape & Reel| |SVD5804NT4G*|DPAK
(Pb−Free)|2500 / Tape & Reel| - †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. - *NTDV and SVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable. **www.onsemi.com** **5** **NTD5804N, NTDV5804N, SVD5804N** ## **PACKAGE DIMENSIONS** **DPAK (SINGLE GAUGE)** CASE 369C ISSUE E **==> picture [484 x 418] intentionally omitted <==** **----- Start of picture text -----**
NOTES:
A 1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
E C 2. CONTROLLING DIMENSION: INCHES.
A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
4 NOT EXCEED 0.006 INCHES PER SIDE.
L3 bale ve Z Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE
D DETAIL A H 6. DATUMS A AND B ARE DETERMINED AT DATUMOUTERMOST EXTREMES OF THE PLASTIC BODY.
1 2 3 PLANE H.
7. OPTIONAL MOLD FEATURE.
L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX
b2 c BOTTOM VIEW BOTTOM VIEW A 0.086 0.094 2.18 2.38
e b SIDE VIEW CONSTRUCTIONALTERNATE A1b 0.0000.025 0.0050.035 0.000.63 0.130.89
TOP VIEW 0.005 (0.13) M C H b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46
c 0.018 0.024 0.46 0.61
L2 [GAUGE] PLANE C SEATINGPLANE c2D 0.0180.235 0.0240.245 0.465.97 0.616.22
E 0.250 0.265 6.35 6.73
e 0.090 BSC 2.29 BSC
L H 0.370 0.410 9.40 10.41
A1 L 0.055 0.070 1.40 1.78
L1 L1 0.114 REF 2.90 REF
DETAIL A L2 0.020 BSC 0.51 BSC
ROTATED 9 CW L3 0.035 0.050 0.89 1.27
L4 −−− 0.040 −−− 1.01
Z 0.155 −−− 3.93 −−−
STYLE 2:
SOLDERING FOOTPRINT* PIN 1. GATE
2. DRAIN
6.20 3.00 3.4. SOURCEDRAIN
0.244 0.118
2.58
PP
0.102
5.80
1.60 6.17
0.228
0.063 0.243
Ts"
SCALE 3:1 mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
**----- End of picture text -----**
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