# Power MOSFET, N Channel, 30 V, 79 A, 0.003 ohm, TO-252 (DPAK), Surface Mount ![Product image](https://novapart.co/image/farnell:2774824/) **URL**: https://novapart.co/products/NTD4904NT4G./power-mosfet-n-channel-30-v-79-a-0003-ohm-to-252 **SKU**: NTD4904NT4G. **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.1870 **Stock**: 10+ ## Specifications | Parameter | Value | |---|---| | No. Of Pins | 3Pins | | Channel Type | N Channel | | Power Dissipation | 52W | | Transistor Mounting | Surface Mount | | Transistor Polarity | N Channel | | Power Dissipation Pd | 52W | | Rds(On) Test Voltage | 10V | | On Resistance Rds(On) | 0.003ohm | | Transistor Case Style | TO-252 (DPAK) | | Drain Source Voltage Vds | 30V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 79A | | Drain Source On State Resistance | 0.003ohm | | Gate Source Threshold Voltage Max | 1.6V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2774824/) NTD4904N ## Power MOSFET ## **30 V, 79 A, Single N−Channel, DPAK/IPAK** ## **Features** - Low R to Minimize Conduction Losses DS(on) - Low Capacitance to Minimize Driver Losses **==> picture [176 x 315] intentionally omitted <==** **----- Start of picture text -----**
http://onsemi.com
V(BR)DSS RDS(on) MAX ID MAX
3.7 m @ 10 V
30 V 79 A
5.5 m @ 4.5 V
D
N−Channel
G
S
4 4
4
1 [[2]]
1
3 2 1
3 2 3
CASE 369AA CASE 369AD CASE 369D
DPAK IPAK IPAK
(Bent Lead) (Straight Lead) (Straight Lead
STYLE 2 DPAK)
MARKING DIAGRAMS& PIN ASSIGNMENTS
& PIN ASSIGNMENTS
**----- End of picture text -----**
- Optimized Gate Charge to Minimize Switching Losses - These are Pb−Free Devices ## **Applications** - CPU Power Delivery - DC−DC Converters ## **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) **==> picture [493 x 376] intentionally omitted <==** **----- Start of picture text -----**
Parameter Symbol Value Unit N−Channel
Drain−to−Source Voltage VDSS 30 V G
Gate−to−Source Voltage VGS 20 V
Continuous Drain TA = 25 ° C ID 17.8 A S
(Note 1)Current (R JA) TA = 100 ° C 12.6 4 4
Power Dissipation TA = 25 ° C PD 2.6 W 4
(R JA) (Note 1)
Continuous Drain TA = 25 ° C ID 13 A 1 [[2]]
2)Current (R JA) (Note Steady TA = 100 ° C 9.2 3 1 2 3 1 2 3
State
Power Dissipation TA = 25 ° C PD 1.4 W CASE 369AA CASE 369AD CASE 369D
(R JA) (Note 2) DPAK IPAK IPAK
Continuous Drain TC = 25 ° C ID 79 A (Bent Lead) (Straight Lead) (Straight Lead
(Note 1)Current (R JC) TC = 100 ° C 56 STYLE 2 DPAK)
Power Dissipation TC = 25 ° C PD 52 W MARKING DIAGRAMS& PIN ASSIGNMENTS
(R JC) (Note 1) 4
Ee Pulsed Drain Current tp=10 s TA = 25 ° C IDM 316 A 4 4 Drain
Current Limited by Package TA = 25 ° C IDmaxPkg 90 A Drain Drain
Operating Junction and Storage Temperature TJ, Tstg −55 to ° C
175
Source Current (Body Diode) IS 47 A
Drain to Source dV/dt dV/dt 6.0 V/ns
2
a Energy (TSingle Pulse Drain−to−Source AvalancheJ = 25 ° C, VDD = 50 V, VGS = 10 V, EAS 68.4 mJ Gate IG 1 DrainSource3 Gate1 Drain2 3Source I 1 2 3
L = 0.1 mH, IL(pk) = 37 A, RG = 25 ) Gate Drain Source
Lead Temperature for Soldering Purposes TL 260 ° C A = Assembly Location
re (1/8 ″ from case for 10 s) Y = Year
WW = Work Week
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be 4904N = Device Code
assumed, damage may occur and reliability may be affected. G = Pb−Free Package
AYWW 49 04NG
AYWW 49 04NG AYWW 49 04NG
**----- End of picture text -----**
## **ORDERING INFORMATION** See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Publication Order Number: **1** © Semiconductor Components Industries, LLC, 2014 **June, 2014 − Rev. 2** **NTD4904N/D** **NTD4904N** ## **THERMAL RESISTANCE MAXIMUM RATINGS** |**THERMAL RESISTANCE MAXIMUM RATINGS**|||| |---|---|---|---| |**Parameter**|**Symbol**|**Value**|**Unit**| |Junction−to−Case (Drain)|R�JC|2.9|°C/W| |Junction−to−Tab (Drain)|R�JC−TAB|4.3|| |Junction−to−Ambient − Steady State (Note 1)|R�JA|57|| |Junction−to−Ambient − SteadyState(Note 2)|R�JA|108|| 1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu. 2. Surface−mounted on FR4 board using the minimum recommended pad size. ## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) |**ELECTRICAL CHARACTERISTIC**|**S **(TJ= 25°C un|less otherwise noted)|less otherwise noted)||||| |---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**|||||||| |Drain−to−Source Breakdown Voltage|V(BR)DSS|VGS= 0 V, ID=|250�A|30|||V| |Drain−to−Source Breakdown Voltage
Temperature Coefficient|V(BR)DSS/TJ||||15||mV/°C| |Zero Gate Voltage Drain Current|IDSS|VGS= 0 V,
VDS= 24 V|TJ= 25°C|||1.0|�A| ||||TJ= 125°C|||10|| |Gate−to−Source Leakage Current|IGSS|VDS= 0 V, VGS|=�20 V|||�100|nA| |**ON CHARACTERISTICS**(Note 3)|||||||| |Gate Threshold Voltage|VGS(TH)|VGS= VDS, ID|= 250�A|1.0|1.6|2.2|V| |Negative Threshold Temperature
Coefficient|VGS(TH)/TJ||||4.0||mV/°C| |Drain−to−Source On Resistance|RDS(on)|VGS= 10 V|ID= 30 A||3.0|3.7|m�| ||||ID= 15 A||3.0||| |||VGS= 4.5 V|ID= 30 A||4.0|5.5|| ||||ID= 15 A||4.0||| |Forward Transconductance|gFS|VDS= 1.5 V, ID= 30 A|||76||S| |**CHARGES AND CAPACITANCES**|||||||| |Input Capacitance|Ciss|VGS= 0 V, f = 1.0 MHz,
VDS= 15 V|||3052||pF| |Output Capacitance|Coss||||976||| |Reverse Transfer Capacitance|Crss||||23||| |Total Gate Charge|QG(TOT)|VGS= 4.5 V, VDS= 15 V,
ID= 30 A|||16.8||nC| |Threshold Gate Charge|QG(TH)||||4.4||| |Gate−to−Source Charge|QGS||||8.2||| |Gate−to−Drain Charge|QGD||||3.0||| |Total Gate Charge|QG(TOT)|VGS= 10 V, VDS= 15 V,
ID= 30 A|||41||nC| |**SWITCHING CHARACTERISTICS**(Note 4)|||||||| |Turn−On Delay Time|td(on)|VGS= 4.5 V, VDS= 15 V,
ID= 15 A, RG= 3.0�|||15.3||ns| |Rise Time|tr||||19.8||| |Turn−Off Delay Time|td(off)||||23.4||| |Fall Time|tf||||7.5||| |Turn−On Delay Time|td(on)|VGS= 10 V, VDS= 15 V,
ID= 15 A, RG= 3.0�|||10.3||ns| |Rise Time|tr||||20||| |Turn−Off Delay Time|td(off)||||28.7||| |Fall Time|tf||||8.0||| 3. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures. **http://onsemi.com** **2** ## **NTD4904N** ## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) |**ELECTRICAL CHARACTERISTICS **(TJ|= 25°C unless|otherwise noted)|otherwise noted)||||| |---|---|---|---|---|---|---|---| |**Parameter**|**Symbol**|**Test Condition**||**Min**|**Typ**|**Max**|**Unit**| |**DRAIN−SOURCE DIODE CHARACTERISTICS**|||||||| |Forward Diode Voltage|VSD|VGS= 0 V,
IS= 30 A|TJ= 25°C||0.84|1.1|V| ||||TJ= 125°C||0.7||| |Reverse Recovery Time|tRR|VGS= 0 V, dIs/dt= 100 A/�s,
IS= 30 A|||40.4||ns| |Charge Time|ta||||20.5||| |Discharge Time|tb||||19.9||| |Reverse Recovery Time|QRR||||35||nC| |**PACKAGE PARASITIC VALUES**|||||||| |Source Inductance (Note 5)|LS|TA= 25°C|||2.48||nH| |Drain Inductance, DPAK|LD||||0.0164||| |Drain Inductance, IPAK (Note 5)|LD||||1.88||| |Gate Inductance (Note 5)|LG||||4.9||| |Gate Resistance|RG||||1.0|2.0|�| Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Assume terminal length of 110 mils. **http://onsemi.com** **3** **NTD4904N** ## **TYPICAL PERFORMANCE CURVES** **==> picture [489 x 632] intentionally omitted <==** **----- Start of picture text -----**
120130 10 V TJ = 25 ° C 3.6 V 120130 VDS ≥ 10 V
110 110
3.8 V to 6 V 3.4 V
100 100
90 90
3.2 V
80 80
70 70
3.0 V
60 60 TJ = 125 ° C
50 50
40 2.8 V 40 TJ = 25 ° C
30 30
2.6 V
20 20
10 2.4 V 10 TJ = −55 ° C
0 0
0 1 2 3 4 5 2 2.5 3 3.5 4
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
0.012 0.006
ID = 30 A TJ = 25 ° C
TJ = 25 ° C
0.010
0.005
VGS = 4.5 V
0.008
0.004
0.006
VGS = 10 V
0.003
0.004
0.002 0.002
3 4 5 6 7 8 9 10 20 40 60 80 100 120
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and
Voltage Gate Voltage
2.2 10,000
ID = 30 A VGS = 0 V
2.0 VGS = 10 V TJ = 150 ° C
1.8
1000
1.6 TJ = 125 ° C
1.4
1.2
100
1.0 TJ = 85 ° C
0.8
0.6 10
−50 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 30
TJ, JUNCTION TEMPERATURE ( ° C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current
Temperature vs. Drain Voltage
, DRAIN CURRENT (AMPS) , DRAIN CURRENT (AMPS)
ID ID
) � ) �
, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (
DS(on) DS(on)
R R
, LEAKAGE (nA)
(NORMALIZED) IDSS
, DRAIN−TO−SOURCE RESISTANCE
DS(on)
R
**----- End of picture text -----**
**http://onsemi.com** **4** **NTD4904N** ## **TYPICAL PERFORMANCE CURVES** **==> picture [243 x 389] intentionally omitted <==** **----- Start of picture text -----**
3600
TJ = 25 ° C
3200 Ciss VGS = 0 V
2800
2400
2000
1600
1200 Coss
800
400
Crss
0
0 5 10 15 20 25 30
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
V DD = 15 V
I D = 15 A td(off)
VGS = 10 V
100 tf
tr
td(on)
10
1
1 10 100
RG, GATE RESISTANCE (OHMS)
C, CAPACITANCE (pF)
t, TIME (ns)
**----- End of picture text -----**
**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** **==> picture [240 x 172] intentionally omitted <==** **----- Start of picture text -----**
1000
100
10 � s
100 � s
10 1 ms
VGS = 10 V
SINGLE PULSE 10 ms
TC = 25 ° C dc
1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.1 1 10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
**----- End of picture text -----**
**Figure 11. Maximum Rated Forward Biased Safe Operating Area** **==> picture [236 x 173] intentionally omitted <==** **----- Start of picture text -----**
12
11
10 Q T
9
8
7 VGS
6
5 QGD
QGS
4
3 VDD = 15 V
2 VGS = 10 V
ID = 30 A
1 TJ = 25 ° C
0
0 5 10 15 20 25 30 35 40 45
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) QG, TOTAL GATE CHARGE (nC)
**----- End of picture text -----**
**Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge** **==> picture [243 x 387] intentionally omitted <==** **----- Start of picture text -----**
30
VGS = 0 V
25
20
15
TJ = 125 ° C
10
5
TJ = 25 ° C
0
0.4 0.5 0.6 0.7 0.8 0.9 1.0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
70
ID = 37 A
60
50
40
30
20
10
0
25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE ( ° C)
IS, SOURCE CURRENT (AMPS)
AVALANCHE ENERGY (mJ)
EAS, SINGLE PULSE DRAIN−TO−SOURCE
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**Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature** **http://onsemi.com** **5** **NTD4904N** ## **TYPICAL PERFORMANCE CURVES** **==> picture [490 x 174] intentionally omitted <==** **----- Start of picture text -----**
100
50% (DUTY CYCLE)
20%
10 10%
5.0%
2.0%
1.0
1.0%
0.1
SINGLE PULSE
0.01
PSi TAB-A
0.001
0.000001 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000
PULSE TIME (s)
R(t) (C/W)
**----- End of picture text -----**
**Figure 13. FET Thermal Response** **==> picture [242 x 171] intentionally omitted <==** **----- Start of picture text -----**
110
100 V DS = 1.5 V
90
80
70
60
50
40
30
20
10
0
0 10 20 30 40 50 60 70 80 90 100
ID (A)
GFS (S)
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**Figure 14. GFS vs ID** ## **ORDERING INFORMATION** |**ORDERING INFORMATION**||| |---|---|---| |**Order Number**|**Package**|**Shipping**†| |NTD4904NT4G|DPAK
(Pb−Free)|2500 / Tape & Reel| |NTD4904N−1G|IPAK
(Pb−Free)|75 Units / Rail| |NTD4904N−35G|IPAK Trimmed Lead
(Pb−Free)|75 Units / Rail| †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. **http://onsemi.com** **6** **NTD4904N** ## **PACKAGE DIMENSIONS** **DPAK (SINGLE GUAGE)** CASE 369AA ISSUE B **==> picture [467 x 378] intentionally omitted <==** **----- Start of picture text -----**
NOTES:
C 1. DIMENSIONING AND TOLERANCING PER ASME
A Y14.5M, 1994.
E A 2.3. CONTROLLING DIMENSION: INCHES.THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
L3 4 Z 5. DIMENSIONS D AND E ARE DETERMINED AT THEOUTERMOST EXTREMES OF THE PLASTIC BODY.
1 2 3 D DETAIL A H 6. DATUMS A AND B ARE DETERMINED AT DATUMPLANE H.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
L4 A 0.086 0.094 2.18 2.38
b2 A1 0.000 0.005 0.00 0.13
b c b 0.025 0.035 0.63 0.89
b2 0.030 0.045 0.76 1.14
e 0.005 (0.13) M C H b3 0.180 0.215 4.57 5.46
c 0.018 0.024 0.46 0.61
L2 [GAUGE] PLANE C SEATINGPLANE c2D 0.0180.235 0.0240.245 0.465.97 0.616.22
E 0.250 0.265 6.35 6.73
e 0.090 BSC 2.29 BSC
H 0.370 0.410 9.40 10.41
L A1 L 0.055 0.070 1.40 1.78
L1 L1 0.108 REF 2.74 REF
L2 0.020 BSC 0.51 BSC
DETAIL A L3 0.035 0.050 0.89 1.27
ROTATED 90 CW � L4 −−− 0.040 −−− 1.01
Z 0.155 −−− 3.93 −−−
STYLE 2:
SOLDERING FOOTPRINT* PIN 1. GATE
2. DRAIN
3. SOURCE
6.20 3.00 4. DRAIN
0.244 0.118
2.58
0.102
5.80
1.60 6.17
0.228
0.063 0.243
SCALE 3:1
� inches [mm] �
**----- End of picture text -----**
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. **http://onsemi.com** **7** **NTD4904N** ## **PACKAGE DIMENSIONS** **==> picture [475 x 483] intentionally omitted <==** **----- Start of picture text -----**
IPAK (STRAIGHT LEAD DPAK)
CASE 369D
ISSUE C NOTES:1. DIMENSIONING AND TOLERANCING PER
B C ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
V R E
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.235 0.245 5.97 6.35
4
Z B 0.250 0.265 6.35 6.73
C 0.086 0.094 2.19 2.38
S A D 0.027 0.035 0.69 0.88
Boe 1 2 3 Oo ge E 0.018 0.023 0.46 0.58
F 0.037 0.045 0.94 1.14
G 0.090 BSC 2.29 BSC
−T− H 0.034 0.040 0.87 1.01
SEATING J 0.018 0.023 0.46 0.58
PLANE K K 0.350 0.380 8.89 9.65
R 0.180 0.215 4.45 5.45
S 0.025 0.040 0.63 1.01
V 0.035 0.050 0.89 1.27
F J Z 0.155 −−− 3.93 −−−
H
STYLE 2:
D 3 PL PIN 1. GATE
2. DRAIN
ie G 0.13 (0.005) M T 3. SOURCE
4. DRAIN
3.5 MM IPAK, STRAIGHT LEAD
CASE 369AD
ISSUE B
NOTES:
E A 1.. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
L2 E3 A1 E2 2.. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
a AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM TERMINAL TIP.
D2 4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD GATE OR MOLD FLASH.
D
L1 MILLIMETERS
DIM MIN MAX
A 2.19 2.38
L A1 0.46 0.60
T A2 0.87 1.10
SEATING b 0.69 0.89
PLANE b1 A1 b1 0.77 1.10
D 5.97 6.22
2X e A2 D2 4.80 −−−
E2 E 6.35 6.73
he 3X b | E2 4.57 5.45
0.13 M T E3 4.45 5.46
e 2.28 BSC
D2 L 3.40 3.60
L1 −−− 2.10
L2 0.89 1.27
OPTIONAL
CONSTRUCTION
**----- End of picture text -----**
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