# Power MOSFET, P Channel, 60 V, 12 A, 0.155 ohm, TO-251, Through Hole ![Product image](https://novapart.co/image/farnell:2535539/) **URL**: https://novapart.co/products/NTD2955-1G../power-mosfet-p-channel-60-v-12-a-0155-ohm-to-251 **SKU**: NTD2955-1G.. **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.3850 **Stock**: 10+ ## Specifications | Parameter | Value | |---|---| | No. Of Pins | 3Pins | | Channel Type | P Channel | | Power Dissipation | 55W | | Transistor Mounting | Through Hole | | Transistor Polarity | P Channel | | Power Dissipation Pd | 55W | | Rds(On) Test Voltage | 10V | | On Resistance Rds(On) | 0.155ohm | | Transistor Case Style | TO-251 | | Drain Source Voltage Vds | 60V | | Operating Temperature Max | 175°C | | Continuous Drain Current Id | 12A | | Drain Source On State Resistance | 0.155ohm | | Gate Source Threshold Voltage Max | 2.8V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2535539/) NTD2955, NVD2955 ## Power MOSFET ## **−60 V, −12 A, P−Channel DPAK** This Power MOSFET is designed to withstand high energy in the avalanche and commutation modes. Designed for low−voltage, high− speed switching applications in power supplies, converters, and power motor controls. These devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer an additional safety margin against unexpected voltage transients. ## **www.onsemi.com** **==> picture [171 x 116] intentionally omitted <==** **----- Start of picture text -----**
V(BR)DSS RDS(on) TYP ID MAX
−60 V 155 m @ −10 V, 6 A −12 A
D
P−Channel
G
S
**----- End of picture text -----**
## **Features** - Avalanche Energy Specified - IDSS and VDS(on) Specified at Elevated Temperature - Designed for Low−Voltage, High−Speed Switching Applications and to Withstand High Energy in the Avalanche and Commutation Modes - NVD and SVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable **==> picture [142 x 99] intentionally omitted <==** **----- Start of picture text -----**
4
4
1
1 [2]
3 2 3
DPAK IPAK
CASE 369C CASE 369D
STYLE 2 STYLE 2
**----- End of picture text -----**
- These Devices are Pb−Free and are RoHS Compliant **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) |**MAXIMUM RATINGS**(TJ = 25J = 25= 25°C unless otherwise noted)||1 [2]
1
2 3||| |---|---|---|---|---| |**Rating**
**Symbol**
**Value**|**Unit**|3
2 3||| |Drain−to−Source Voltage
VDSS
−60
Vdc
Gate−to−Source Voltage
− Continuous
− Non−repetitive (tp ≤10 ms)
VGS
VGSM
±20
±25
Vdc
Vpk
Drain Current
Dr− Continuous @ Ta= 25°C
Dr− Single Pulse (tp ≤10 ms)
ID
IDM
−12
−18
Adc
Apk
Total Power Dissipation @ Ta= 25°C
PD
55
W
Operating and Storage Temperature
Range
TJ, Tstg
−55 to
175
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ= 25°C
(VDD= 25 Vdc, VGS= 10 Vdc, Peak
IL= 12 Apk, L = 3.0 mH, RG= 25 )
EAS
216
mJ
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
R JC
R JA
R JA
2.73
71.4
100
°C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8 in. from case for
10 seconds
TL
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
~~ee~~
~~es~~
~~ee eee~~
~~pot Et~~
~~ee~~
~~ae~~
~~ae~~
~~ee~~
~~ee~~||A
= Assembly Location*
NT2955/NV2955
= Specific Device Code (DPAK)
NT2955
= Specific Device Code (IPAK)
Y
= Year
WW
= Work Week
G
= Pb−Free Package
1
Gate
3
Source
2
Drain
4
Drain
**DPAK**
**CASE 369C**
**STYLE 2**
**IPAK**
**CASE 369D**
**STYLE 2**
AYWW
NT
2955G
1
Gate
3
Source
2
Drain
4
Drain
AYWW
NT
2955G
**MARKING DIAGRAMS**
**& PIN ASSIGNMENTS**
on
Ln
ot||| |device. If any of these limits are exceeded, device functionality should not be||* The Assembly Location code (A) is front side||| |assumed, damage may occur and reliability may be affected.||optional. In cases where the Assembly Location is|optional. In cases where the Assembly Location is|optional. In cases where the Assembly Location is| * The Assembly Location code (A) is front side optional. In cases where the Assembly Location is stamped in the package, the front side assembly code may be blank. 1. When surface mounted to an FR4 board using 1 in pad size (Cu area = 1.127 in[2] ). 2. When surface mounted to an FR4 board using the minimum recommended pad size (Cu area = 0.412 in[2] ). ## **ORDERING INFORMATION** See detailed ordering and shipping information on page 5 of this data sheet. Publication Order Number: **NTD2955/D** **1** © Semiconductor Components Industries, LLC, 2017 **March, 2017 − Rev. 16** **NTD2955, NVD2955** ## **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) |**ELECTRICAL CHARACTERISTICS **(TJ= 25°C unless otherwise noted)|**ELECTRICAL CHARACTERISTICS **(TJ= 25°C unless otherwise noted)|||||| |---|---|---|---|---|---|---| |**Characteristic**||**Symbol**|**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**||||||| |Drain−to−Source Breakdown Voltage (Note 3)
(VGS= 0 Vdc, ID= −0.25 mA)
(Positive Temperature Coefficient)||V(BR)DSS|−60
−|−
67|−
−|Vdc
mV/°C| |Zero Gate Voltage Drain Current
(VGS= 0 Vdc, VDS= −60 Vdc, TJ= 25°C)
(VGS= 0 Vdc, VDS= −60 Vdc, TJ= 150°C)||IDSS|−
−|−
−|−10
−100|�Adc| |Gate−Body Leakage Current (VGS=±20 Vdc, VDS= 0 Vdc)||IGSS|−|−|−100|nAdc| |**ON CHARACTERISTICS**(Note 3)||||||| |Gate Threshold Voltage
(VDS= VGS, ID= −250�Adc)
(Negative Temperature Coefficient)||VGS(th)|−2.0
−|−2.8
4.5|−4.0
−|Vdc
mV/°C| |Static Drain−Source On−State Resistance
(VGS= −10 Vdc, ID= −6.0 Adc)||RDS(on)|−|0.155|0.180|�| |Drain−to−Source On−Voltage
(VGS= −10 Vdc, ID= −12 Adc)
(VGS= −10 Vdc, ID= −6.0 Adc,|TJ= 150°C)|VDS(on)||−1.86
−|−2.6
−2.0|Vdc| |Forward Transconductance (VDS|= 10 Vdc, ID= 6.0 Adc)|gFS||8.0|−|Mhos| |**DYNAMIC CHARACTERISTICS**||||||| |Input Capacitance|(VDS= −25 Vdc, VGS= 0 Vdc,
F = 1.0 MHz)|Ciss|−|500|750|pF| |Output Capacitance||Coss|−|150|250|| |Reverse Transfer Capacitance||Crss|−|50|100|| |**SWITCHING CHARACTERISTICS**(Notes 3 and 4)||||||| |Turn−On Delay Time|(VDD= −30 Vdc, ID= −12 A,
VGS= −10 V, RG= 9.1�)|td(on)|−|10|20|ns| |Rise Time||tr|−|45|85|| |Turn−Off Delay Time||td(off)|−|26|40|| |Fall Time||tf|−|48|90|| |Gate Charge|(VDS= −48 Vdc, VGS= −10 Vdc,
ID= −12 A)|QT|−|15|30|nC| |||QGS|−|4.0|−|| |||QGD|−|7.0|−|| |**DRAIN−SOURCE DIODE CHARACTERISTICS**(Note 3)||||||| |Diode Forward On−Voltage
(IS= 12 Adc, VGS= 0 V)
(IS= 12 Adc, VGS= 0 V, TJ= 150°C)||VSD|−
−|−1.6
−1.3|−2.5
−|Vdc| |Reverse Recovery Time
(IS= 12 A, dIS/dt = 100 A/�s ,VGS= 0 V)||trr|−|50||ns| |||ta|−|40|−|| |||tb|−|10|−|| |Reverse Recovery Stored Charge||QRR|−|0.10|−|�C| Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Indicates Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperature. **www.onsemi.com** **2** **NTD2955, NVD2955** ## **TYPICAL PERFORMANCE CURVES** (TJ = 25 ° C unless otherwise noted) **==> picture [241 x 171] intentionally omitted <==** **----- Start of picture text -----**
25
TJ = 25° C VGS = -10 V -9 V
-8 V
-9.5 V
20
-7 V
15 -6.5 V
-6 V
10
-5.5 V
-5 V
5
0
0 1 2 3 4 5 6 7 8 9 10
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DRAIN CURRENT (A)
D,
−I
**----- End of picture text -----**
**Figure 1. On−Region Characteristics** **==> picture [240 x 183] intentionally omitted <==** **----- Start of picture text -----**
0.50
0.45 V GS = −10 V
0.40
0.35
0.30 TJ = 125° C
0.25
0.20 25 ° C
0.15
-�55° C
0.10
0.05
0
0 3 6 9 12 15 18 21 24
−ID, DRAIN CURRENT (AMPS)
) Ω
DRAIN−TO−SOURCE RESISTANCE (
DS(on),
R
**----- End of picture text -----**
**Figure 3. On−Resistance versus Drain Current and Temperature** **==> picture [243 x 223] intentionally omitted <==** **----- Start of picture text -----**
2.0
1.8 VGS = −10 V
ID = −6 A
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-�50 -�25 0 25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE ( ° C)
Figure 5. On−Resistance Variation with
DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
DS(on),
R
**----- End of picture text -----**
**Figure 5. On−Resistance Variation with Temperature** **==> picture [243 x 612] intentionally omitted <==** **----- Start of picture text -----**
24
22 VDS ≥ −10 V TJ = -�55° C
20 25° C 125° C
18
16
14
12
10
8
6
4
2
0
2 3 4 5 6 7 8 9 10
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0.250
TJ = 25° C
0.225
0.200
0.175 V GS = −10 V
0.150
- 15 V
0.125
0.100
0.075
0.050
0 3 6 9 12 15 18 21 24
- ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1000
VGS = 0 V
100
TJ = 125° C
10
100° C
1
5 10 15 20 25 30 35 40 45 50 55 60
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DRAIN CURRENT (A)
D,
−I
) Ω
DRAIN−TO−SOURCE RESISTANCE (
DS(on),
R
, LEAKAGE (nA)
DSS
−I
**----- End of picture text -----**
**Figure 6. Drain−To−Source Leakage Current versus Voltage** **www.onsemi.com** **3** **NTD2955, NVD2955** **==> picture [491 x 188] intentionally omitted <==** **----- Start of picture text -----**
1200 15 60
VDS = 0 V VGS = 0 V T J = 25° C ID = 12 A
1000 Ciss 12.5 V DS TJ = 25°C 50
800 Crss 10 QT 40
VGS
600 7.5 30
Ciss QGS QGD
400 5 20
200 C oss 2.5 10
C rss
0 0 0
10 5 0 5 10 15 20 25 0 2 4 6 8 10 12 14 16
-VGS -VDS QT, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
−V
DS
C, CAPACITANCE (pF)
, GATE−TO−SOURCE VOLTAGE (V)
GS
−V
, DRAIN−TO−SOURCE VOLTAGE (V)
**----- End of picture text -----**
**Figure 7. Capacitance Variation** **Figure 8. Gate−To−Source and Drain−To−Source Voltage versus Total Charge** **==> picture [237 x 397] intentionally omitted <==** **----- Start of picture text -----**
1000
VDD = −30 V
ID = −12 A
V GS = −10 V
TJ = 25 ° C
100
tf
tr
td(off)
10 td(on)
1
1 10 100
RG, GATE RESISTANCE ( � )
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
100
VGS = −15 V
SINGLE PULSE
TC = 25 ° C
10
100 �s
1 ms
10 ms
1
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.1 1 10 100
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
, DRAIN CURRENT (AMPS)
ID
**----- End of picture text -----**
**Figure 11. Maximum Rated Forward Biased Safe Operating Area** **==> picture [9 x 122] intentionally omitted <==** **----- Start of picture text -----**
, SOURCE CURRENT (AMPS)
S
−I
**----- End of picture text -----**
**==> picture [222 x 173] intentionally omitted <==** **----- Start of picture text -----**
15
VGS = 0 V
TJ = 25 ° C
10
5
0
0 0.25 0.5 0.75 1 1.25 1.5 1.75
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
**----- End of picture text -----**
**Figure 10. Diode Forward Voltage versus Current** **==> picture [204 x 98] intentionally omitted <==** **----- Start of picture text -----**
di/dt
IS
t rr
ta t b
TIME
t p 0.25 IS
IS
**----- End of picture text -----**
**Figure 12. Diode Reverse Recovery Waveform** **www.onsemi.com** **4** **NTD2955, NVD2955** **==> picture [484 x 163] intentionally omitted <==** **----- Start of picture text -----**
1.0
D = 0.5
0.2
0.1
0.1 0.05 P(pk)
R�JC(t) = r(t) R�JC
D CURVES APPLY FOR POWER
0.02 PULSE TRAIN SHOWN
0.01 t1 READ TIME AT t 1
t 2 TJ(pk) - TC = P(pk) R�JC(t)
SINGLE PULSE
DUTY CYCLE, D = t1/t2
0.01
1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01
t, TIME (s)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
**----- End of picture text -----**
**Figure 13. Thermal Response** ## **ORDERING INFORMATION** |**ORDERING INFORMATION**||| |---|---|---| |**Device**|**Package**|**Shipping**†| |NTD2955G|DPAK
(Pb−Free)|75 Units / Rail| |NTD2955−1G|IPAK
(Pb−Free)|75 Units / Rail| |NTD2955T4G|DPAK
(Pb−Free)|2500 / Tape & Reel| |NVD2955T4G*|DPAK
(Pb−Free)|2500 / Tape & Reel| |SVD2955T4G*|DPAK
(Pb−Free)|2500 / Tape & Reel| †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NVD and SVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable. **www.onsemi.com** **5** **NTD2955, NVD2955** ## **PACKAGE DIMENSIONS** **DPAK (SINGLE GAUGE)** CASE 369C ISSUE F **==> picture [481 x 255] intentionally omitted <==** **----- Start of picture text -----**
NOTES:
A 1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
E C 2. CONTROLLING DIMENSION: INCHES.
A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
4 NOT EXCEED 0.006 INCHES PER SIDE.
L3 Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE
D DETAIL A H 6. DATUMS A AND B ARE DETERMINED AT DATUMOUTERMOST EXTREMES OF THE PLASTIC BODY.
1 2 3 PLANE H.
7. OPTIONAL MOLD FEATURE.
L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX
b2 c BOTTOM VIEW A 0.086 0.094 2.18 2.38
e SIDE VIEW A1 0.000 0.005 0.00 0.13
b b 0.025 0.035 0.63 0.89
TOP VIEW 0.005 (0.13) M C b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46
c 0.018 0.024 0.46 0.61
c2 0.018 0.024 0.46 0.61
H Z Z D 0.235 0.245 5.97 6.22
E 0.250 0.265 6.35 6.73
e 0.090 BSC 2.29 BSC
L2 [GAUGE] PLANE C SEATINGPLANE H 0.370 0.410 9.40 10.41
L 0.055 0.070 1.40 1.78
L1 0.114 REF 2.90 REF
L2 0.020 BSC 0.51 BSC
L L3 0.035 0.050 0.89 1.27
A1 BOTTOM VIEW L4 −−− 0.040 −−− 1.01
L1 CONSTRUCTIONSALTERNATE Z 0.155 −−− 3.93 −−−
DETAIL A
ROTATED 90 CW � STYLE 2:
**----- End of picture text -----**
**==> picture [237 x 157] intentionally omitted <==** **----- Start of picture text -----**
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
SOLDERING FOOTPRINT* 4. DRAIN
6.20 3.00
0.244 0.118
2.58
0.102
5.80
1.60 6.17
0.228
0.063 0.243
SCALE 3:1
� inches [mm] �
**----- End of picture text -----**
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. **www.onsemi.com** **6** **NTD2955, NVD2955** ## **PACKAGE DIMENSIONS** **IPAK** CASE 369D ISSUE C **==> picture [186 x 171] intentionally omitted <==** **----- Start of picture text -----**
B C
V R E
4
a
A
S
1 2 3
−T−
SEATING
PLANE K
J
F
H
D 3 PL
G 0.13 (0.005) M T
**----- End of picture text -----**
**==> picture [158 x 191] intentionally omitted <==** **----- Start of picture text -----**
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES MILLIMETERS
Z DIM MIN MAX MIN MAX
A 0.235 0.245 5.97 6.35
B 0.250 0.265 6.35 6.73
C 0.086 0.094 2.19 2.38
D 0.027 0.035 0.69 0.88
E 0.018 0.023 0.46 0.58
F 0.037 0.045 0.94 1.14
G 0.090 BSC 2.29 BSC
H 0.034 0.040 0.87 1.01
J 0.018 0.023 0.46 0.58
K 0.350 0.380 8.89 9.65
R 0.180 0.215 4.45 5.45
S 0.025 0.040 0.63 1.01
V 0.035 0.050 0.89 1.27
Z 0.155 −−− 3.93 −−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
**----- End of picture text -----**
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