# Power MOSFET, P Channel, 60 V, 27.5 A, 0.082 ohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2845365RL/)

**URL**: https://novapart.co/products/NTB25P06T4G/power-mosfet-p-channel-60-v-275-a-0082-ohm-to-263
**SKU**: NTB25P06T4G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.3400
**Stock**: 10+
**Lead Time**: 250 days (indicative)

## Description

Transistor Polarity:P Channel; Continuous Drain Current Id:-27.5A; Drain Source Voltage Vds:-60V; On Resistance Rds(on):0.07ohm; Rds(on) Test Voltage Vgs:-10V; Threshold Voltage Vgs:-2

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | P Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 120W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 27.5A |
| Drain Source On State Resistance | 0.082ohm |
| Gate Source Threshold Voltage Max | 2.8V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2845365RL/)

NTB25P06, NVB25P06 

## Power MOSFET 

## **−60 V, −27.5 A, P−Channel D[2] PAK** 

Designed for low voltage, high speed switching applications and to withstand high energy in the avalanche and commutation modes. 

## **Features** 

## **http://onsemi.com** 

- AEC Q101 Qualified − NVB25P06 

- These Devices are Pb−Free and are RoHS Compliant 

**==> picture [172 x 142] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS RDS(on) TYP ID MAX<br>−60 V 65 m  @ −10 V −27.5 A<br>a<br>P−Channel<br>D<br>G<br>6 3 S<br>**----- End of picture text -----**<br>


## **Typical Applications** 

- PWM Motor Controls 

- Power Supplies 

- Converters 

D • Bridge Circuits **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) G **Rating Symbol Value Unit** Drain−to−Source Voltage VDSS −60 V ~~**e** eeee~~ 6 ~~3~~ S ~~ee~~ Gate−to−Source Voltage − Continuous VGS 15 V **MARKING DIAGRAM** ~~po~~ − Non−Repetitive (tp 10 ms) VGSM 20 Vpk **& PIN ASSIGNMENT** Drain Current − Continuous @ TA = 25 ° C ID 27.5 A Drain − Single Pulse (tp 10 s) IDM 80 Apk Total Power Dissipation @ TA = 25 ° C PD 120 W 4 NTB Operating and Storage TJ, Tstg −55 to ° C 2 25P06G Temperature Range +175 1 AYWW 3 Single Pulse Drain−to−Source Avalanche EAS 600 mJ **D[2] PAK** Energy − Starting TJ = 25 ° C **CASE 418B** Drain ~~——~~ (VDD = 25 V, VGS = 10 V, Gate ~~a~~ Source IL(pk) = 20 A, L = 3 mH, RG = 25 ) Thermal Resistance ° C/W A = Assembly Location ~~Pp[eT]~~ Y = Year − Junction−to−Case R JC 1.25 WW = Work Week − Junction−to−Ambient (Note 1) R ~~8~~ JA 46.8 G = Pb−Free Package − Junction−to−Ambient (Note 2) R 8 JA 63.2 ~~Po~~ Maximum Lead Temperature for Soldering TL 260 ° C Purposes, (1/8 ″ from case for 10 s) **ORDERING INFORMATION** ~~a~~ Stresses exceeding Maximum Ratings may damage the device. Maximum **Device Package Shipping**[†] Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the NTB25P06T4G D[2] PAK 800 / Tape & Reel Recommended Operating Conditions may affect device reliability. 

|**Device**|**Package**|**Shipping**[†]|
|---|---|---|
|NTB25P06T4G|D[2]PAK<br>(Pb−Free)|800 / Tape & Reel|
|NVB25P06T4G|D2PAK<br>(Pb−Free)|800 / Tape & Reel|



1. When surface mounted to an FR4 board using 1 ″ pad size (Cu Area 1.127 in[2] ). 

2. When surface mounted to an FR4 board using the minimum recommended pad size (Cu Area 0.412 in[2] ). 

- †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2011 **October, 2011 − Rev. 4** 

**NTB25P06/D** 

## **NTB25P06, NVB25P06** 

## **ELECTRICAL CHARACTERISTICS** (TC = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS **(TC= 25°C unless otherwise no|**ELECTRICAL CHARACTERISTICS **(TC= 25°C unless otherwise no|ted)|||||
|---|---|---|---|---|---|---|
|**Characteristic**||**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**|||||||
|Drain−to−Source Breakdown Voltage (Note 3)<br>(VGS= 0 V, ID= −250�A)<br>(Positive Temperature Coefficient)||V(BR)DSS|−60<br>−|−<br>64|−<br>−|V<br>mV/°C|
|Zero Gate Voltage Drain Current<br>(VGS= 0 V, VDS= −60 V, TJ= 25°C)<br>(VGS= 0 V, VDS= −60 V, , TJ= 150°C)||IDSS|−<br>−|−<br>−|−10<br>−100|�A|
|Gate−Body Leakage Current (VGS=±15 V, VDS= 0 V)||IGSS|−|−|±100|nA|
|**ON CHARACTERISTICS**(Note 3)|||||||
|Gate Threshold Voltage<br>(VDS= VGS,ID= −250�A)<br>(Negative Threshold Temperature Coefficient)||VGS(th)|−2.0<br>−|−2.8<br>6.2|−4.0<br>−|V<br>mV/°C|
|Static Drain−Source On−State Resistance<br>(VGS= −10 V, ID= −12.5 A)<br>(VGS= −10 V, ID= −25 A)||RDS(on)|−<br>−|0.065<br>0.070|0.075<br>0.082|�|
|Forward Transconductance<br>(VDS= −10 V, ID= −12.5 A)||gFS|−|13|−|Mhos|
|**DYNAMIC CHARACTERISTICS**|||||||
|Input Capacitance|(VDS= −25 V, VGS= 0 V,<br>F = 1.0 MHz)|Ciss|−|1200|1680|pF|
|Output Capacitance||Coss|−|345|480||
|Reverse Transfer Capacitance||Crss|−|90|180||
|**SWITCHING CHARACTERISTICS**(Notes 3 & 4)|||||||
|Turn−On Delay Time|(VDD= −30 V, ID= −25 A,<br>VGS= −10 V RG= 9.1�)|td(on)|−|14|24|ns|
|Rise Time||tr|−|72|118|ns|
|Turn−Off Delay Time||td(off)|−|43|68|ns|
|Fall Time||tf|−|190|320|ns|
|Gate Charge|(VDS= −48 V, ID= −25 A,<br>VGS= −10 V)|QT|−|33|50|nC|
|||Q1|−|6.5|−||
|||Q2|−|15|−||
|**BODY−DRAIN DIODE RATINGS**(Note 3)|||||||
|Diode Forward On−Voltage|(IS= −25 A, VGS= 0 V)<br>(IS= −25 A, VGS= 0 V, TJ= 150°C)|VSD|−<br>−|−1.8<br>−1.4|−2.5<br>−|V|
|Reverse Recovery Time|(IS= −25 A, VGS= 0 V,<br>dIS/dt = 100 A/�s)|trr|−|70|−|ns|
|||ta|−|50|−||
|||tb|−|20|−||
|Reverse Recovery Stored Charge||QRR|−|0.2|−|�C|



3. Indicates Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 

4. Switching characteristics are independent of operating junction temperatures. 

**http://onsemi.com** 

**2** 

**NTB25P06, NVB25P06** 

**==> picture [489 x 600] intentionally omitted <==**

**----- Start of picture text -----**<br>
50 VGS = −10 V TJ = 25 ° C 50 VDS ≥  10 V<br>45 −9 V −8 V −7 V TJ = 25 ° C<br>40 40<br>35<br>30 30 T J  = −55 ° C<br>25 −6 V T J = 125 ° C<br>20 −5.5 V 20<br>15 −5 V<br>10 10<br>−4.5 V<br>5 −4.2 V<br>0 0<br>0 2 4 6 8 10 2 4 6 8<br>−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>0.2 0.095<br>VGS = −10 V TJ = 25 ° C<br>0.15<br>TJ = 125 ° C 0.085<br>0.1<br>TJ = 25 ° C VGS = −10 V<br>TJ = −55 ° C 0.075 VGS = −15 V<br>0.05<br>0 0.065<br>0 10 20 30 40 50 10 20 30 40 50<br>−ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS)<br>Figure 3. On−Resistance vs. Drain Current and Figure 4. On−Resistance vs. Drain Current and<br>Temperature Gate Voltage<br>1.75 10000<br>ID = −25 A VGS = 0 V<br>VGS = −10 V<br>1.5<br>1000 TJ = 150 ° C<br>1.25<br>1 100 TJ = 125 ° C<br>0.75<br>0.5 10<br>−50 −25 0 25 50 75 100 125 150 0 10 20 30 40 50 60<br>TJ, JUNCTION TEMPERATURE ( ° C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)<br>, DRAIN CURRENT (AMPS) , DRAIN CURRENT (AMPS)<br>D D<br>−I −I<br>) � ) �<br>, DRAIN−TO−SOURCE RESISTANCE ( , DRAIN−TO−SOURCE RESISTANCE (<br>DS(on) DS(on)<br>R R<br>, LEAKAGE (nA)<br>DSS<br>(NORMALIZED) −I<br>, DRAIN−TO−SOURCE RESISTANCE<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Figure 5. On−Resistance Variation with Temperature** 

**Figure 6. Drain−to−Source Leakage Current vs. Voltage** 

**http://onsemi.com** 

**3** 

**NTB25P06, NVB25P06** 

**==> picture [232 x 185] intentionally omitted <==**

**----- Start of picture text -----**<br>
10<br>Q T<br>VDSDS<br>8<br>Q11 Q22 VGSGS<br>6<br>4<br>2<br>ID = −25 AD = −25 A = −25 A<br>TJ = 25J = 25 = 25 ° C<br>0<br>0 4 10 15 20 25 30 35<br>Qg, TOTAL GATE CHARGE (nC)g, TOTAL GATE CHARGE (nC), TOTAL GATE CHARGE (nC)<br>, GATE−TO−SOURCE VOLTAGE (VOLTS)<br>GS<br>−V<br>**----- End of picture text -----**<br>


**==> picture [489 x 387] intentionally omitted <==**

**----- Start of picture text -----**<br>
3000 10<br>VDS = 0 V VGS = 0 V T J  = 25 ° C Q T<br>VDSDS<br>2500<br>Ciss 8<br>2000 Q11 Q22 VGSGS<br>6<br>Crss<br>1500<br>Ciss<br>4<br>1000<br>Coss 2<br>500 ID = −25 AD = −25 A = −25 A<br>Crss TJ = 25J = 25 = 25 ° C<br>0 0<br>10 5 −VGS 0 −VDS 5 10 15 20 25 0 4 10 15 20 25 30 35<br>GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE Qg, TOTAL GATE CHARGE (nC)g, TOTAL GATE CHARGE (nC), TOTAL GATE CHARGE (nC)<br>(VOLTS)<br>Figure 7. Capacitance Variation Figure 8. Gate−to−Source and<br>Drain−to−Source Voltage vs. Total Charge<br>1000 25<br>VGS = 0 V<br>TJ = 25 ° C<br>20<br>tr<br>100<br>tf 15<br>td(off)<br>10<br>10 td(on)<br>VDD = −30 V 5<br>ID = −25 A<br>VGS = −10 V<br>1 0<br>1 10 100 0 0.25 0.5 0.75 1 1.25 1.5 1.75<br>RG, GATE RESISTANCE (G, GATE RESISTANCE (, GATE RESISTANCE ( � ) −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)<br>C, CAPACITANCE (pF)<br>, GATE−TO−SOURCE VOLTAGE (VOLTS)<br>GS<br>−V<br>t, TIME (ns)<br>, SOURCE CURRENT (AMPS)<br>S<br>−I<br>**----- End of picture text -----**<br>


**==> picture [104 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
RG, GATE RESISTANCE (G, GATE RESISTANCE (, GATE RESISTANCE ( � )<br>**----- End of picture text -----**<br>


**Figure 9. Resistive Switching Time Variation vs. Gate Resistance** 

**Figure 10. Diode Forward Voltage vs. Current** 

**==> picture [489 x 177] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000 600<br>VGS = −20 V ID = −25 A<br>SINGLE PULSE<br>TC = 25 ° C 500<br>100<br>400<br>dc<br>10 300<br>10 ms<br>1 ms 200<br>1 100  � s<br>RDS(on) Limit 100<br>Thermal Limit<br>Package Limit<br>0.1 0<br>0.1 1 10 100 25 50 75 100 125 150<br>−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE ( ° C)<br>, DRAIN CURRENT (AMPS)<br>D AVALANCHE ENERGY (mJ)<br>−I<br>, SINGLE PULSE DRAIN−TO−SOURCE<br>AS<br>E<br>**----- End of picture text -----**<br>


**Figure 11. Maximum Rated Forward Biased Safe Operating Area** 

**Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature** 

**http://onsemi.com** 

**4** 

**NTB25P06, NVB25P06** 

## **PACKAGE DIMENSIONS** 

**D[2] PAK 3** CASE 418B−04 ISSUE K 

**==> picture [228 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
C<br>E<br>V<br>−B−<br>W<br>4<br>A<br>S<br>1 2 3<br>−T−<br>K<br>SEATING W<br>PLANE G J<br>H<br>D 3 PL<br>0.13 (0.005) M T B M<br>**----- End of picture text -----**<br>


|NO<br>1. <br>2. <br>3.|TES:<br> DIMENSIONING AND TOLERANCING<br>PER ANSI Y14.5M, 1982.<br> CONTROLLING DIMENSION: INCH.<br> 418B−01 THRU 418B−03 OBSOLETE,<br>NEW STANDARD 418B−04.|TES:<br> DIMENSIONING AND TOLERANCING<br>PER ANSI Y14.5M, 1982.<br> CONTROLLING DIMENSION: INCH.<br> 418B−01 THRU 418B−03 OBSOLETE,<br>NEW STANDARD 418B−04.|TES:<br> DIMENSIONING AND TOLERANCING<br>PER ANSI Y14.5M, 1982.<br> CONTROLLING DIMENSION: INCH.<br> 418B−01 THRU 418B−03 OBSOLETE,<br>NEW STANDARD 418B−04.|TES:<br> DIMENSIONING AND TOLERANCING<br>PER ANSI Y14.5M, 1982.<br> CONTROLLING DIMENSION: INCH.<br> 418B−01 THRU 418B−03 OBSOLETE,<br>NEW STANDARD 418B−04.|TES:<br> DIMENSIONING AND TOLERANCING<br>PER ANSI Y14.5M, 1982.<br> CONTROLLING DIMENSION: INCH.<br> 418B−01 THRU 418B−03 OBSOLETE,<br>NEW STANDARD 418B−04.|
|---|---|---|---|---|---|
||**DIM**|**INCHES**||**MILLIMETERS**||
|||**MIN**|**MAX**|**MIN**|**MAX**|
||**A**|0.340|0.380|8.64|9.65|
||**B**|0.380|0.405|9.65|10.29|
||**C**|0.160|0.190|4.06|4.83|
||**D**|0.020|0.035|0.51|0.89|
||**E**|0.045|0.055|1.14|1.40|
||**F**|0.310|0.350|7.87|8.89|
||**G**<br>|0.100 BSC<br><br>||2.54 BSC<br><br>||
||**H**|0.080|0.110|2.03|2.79|
||**J**|0.018|0.025|0.46|0.64|
||**K**|0.090|0.110|2.29|2.79|
||**L**|0.052|0.072|1.32|1.83|
||**M**|0.280|0.320|7.11|8.13|
||**N**|0.197 REF||5.00 REF||
||**P**|0.079 REF||2.00 REF||
||**R**|0.039 REF||0.99 REF||
||**S**|0.575|0.625|14.60|15.88|
||**V**|0.045|0.055|1.14|1.40|



**==> picture [328 x 159] intentionally omitted <==**

**----- Start of picture text -----**<br>
VARIABLE<br>CONFIGURATION<br>ZONE N P<br>R<br>U<br>L L L<br>M M M<br>F F F<br>VIEW W−W VIEW W−W VIEW W−W<br>1 2 3<br>**----- End of picture text -----**<br>


## **SOLDERING FOOTPRINT*** 

**==> picture [148 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
10.49<br>8.38<br>16.155<br>2X<br>3.504<br>2X<br>1.016<br>5.080<br>PITCH<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

**http://onsemi.com** 

**5** 

**NTB25P06, NVB25P06** 

**ON Semiconductor** and          are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

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**NTB25P06/D** 

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**6** 



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