# Bipolar Transistor Array, Dual PNP, -65 V, -100 mA, 380 mW, 0.9 hFE, SOT-363

![Product image](https://novapart.co/image/farnell:2508353RL/)

**URL**: https://novapart.co/products/NSVT65010MW6T1G/bipolar-transistor-array-dual-pnp-65-v-100-ma-380
**SKU**: NSVT65010MW6T1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Bipolar Junction Transistor Arrays - BJT
**Price**: €0.0580
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| Power Dissipation Pnp | 380mW |
| Transition Frequency Pnp | 100MHz |
| Dc Current Gain Hfe Min Pnp | 220hFE |
| Continuous Collector Current Pnp | 100mA |
| Collector Emitter Voltage Max Pnp | 65V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2508353RL/)

NST65010MW6 

## Dual Matched General Purpose Transistor 

## **PNP Matched Pair** 

These transistors are housed in an ultra−small SOT−363 package ideally suited for portable products. They are assembled to create a pair of devices highly matched in all parameters, eliminating the need for costly trimming. Applications are Current Mirrors; Differential, Sense and Balanced Amplifiers; Mixers; Detectors and Limiters. Complementary NPN equivalent NST65011MW6T1G is available. 

## **Features** 

- Current Gain Matching to 10% 

## **www.onsemi.com** 

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6<br>1<br>**----- End of picture text -----**<br>


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SOT−363<br>CASE 419B<br>STYLE 1<br>**----- End of picture text -----**<br>


- Base−Emitter Voltage Matched to ≤ 2 mV 

- Drop−In Replacement for Standard Device 

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(3) (2) (1)<br>Q1 Q2<br>as<br>(4) (5) (6)<br>MARKING DIAGRAMS<br>4G M<br>4G = Device Code<br>M = Date Code<br>= Pb−Free Package<br>**----- End of picture text -----**<br>


- NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

**MAXIMUM RATINGS** 

**Rating Symbol Value Unit** Collector−Emitter Voltage VCEO −65 V Collector−Base Voltage VCBO −80 V Emitter−Base Voltage VEBO −5.0 V Collector Current − Continuous IC −100 mAdc ~~———~~ Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

(Note: Microdot may be in either location) 

## **THERMAL CHARACTERISTICS** 

**Characteristic Symbol Max Unit** Total Device Dissipation PD 380 mW **ORDERING INFORMATION** Per Device 250 **Device Package Shipping**[†] FR−5 Board (Note 1) TA = 25 ° C NST65010MW6T1G SOT−363 3000 / Derate Above 25 ° C 3.0 mW/ ° C (Pb−Free) Tape & Reel Thermal Resistance, R JA 328 ° C/W NSVT65010MW6T1G SOT−363 3000 / Junction to Ambient (Pb−Free) Tape & Reel ~~n=~~ Junction and Storage TJ, Tstg −55 to +150 ° C †For information on tape and reel specifications, Temperature Range including part orientation and tape sizes, please 1. FR−5 = 1.0 x 0.75 x 0.062 in. refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ~~=~~ 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2015 **July, 2015 − Rev. 0** 

**NST65010MW6/D** 

## **NST65010MW6** 

## **ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS**(TA= 25°C unless otherwise noted)||||||
|---|---|---|---|---|---|
|**Characteristic**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||
|Collector−Emitter Breakdown Voltage, (IC= −10 mA)|V(BR)CEO|−65|−|−|V|
|Collector−Emitter Breakdown Voltage, (IC= −10�A, VEB= 0)|V(BR)CES|−80|−|−|V|
|Collector−Base Breakdown Voltage, (IC= −10�A)|V(BR)CBO|−80|−|−|V|
|Emitter−Base Breakdown Voltage, (IE= −1.0�A)|V(BR)EBO|−5.0|−|−|V|
|Collector Cutoff Current (VCB= −30 V)<br>Collector Cutoff Current(VCB= −30 V, TA= 150°C)|ICBO|−<br>−|−<br>−|−15<br>−5.0|nA<br>�A|
|**ON CHARACTERISTICS**||||||
|DC Current Gain<br>(IC= −10�A, VCE= −5.0 V)<br>(IC= −2.0 mA, VCE= −5.0 V)<br>(IC= −2.0 mA, VCE= −5.0 V) (Note 2)|hFE<br>hFE(1)/hFE(2)|−<br>220<br>0.9|150<br>290<br>1.0|−<br>475<br>1.1|−|
|Collector−Emitter Saturation Voltage<br>(IC= −10 mA, IB= −0.5 mA)<br>(IC= −100 mA, IB= −5.0 mA)|VCE(sat)|−<br>−|−<br>−|−300<br>−650|mV|
|Base−Emitter Saturation Voltage<br>(IC= −10 mA, IB= −0.5 mA)<br>(IC= −100 mA, IB= −5.0 mA)|VBE(sat)|−<br>−|−700<br>−900|−<br>−|mV|
|Base−Emitter On Voltage<br>(IC= −2.0 mA, VCE= −5.0 V)<br>(IC= −10 mA, VCE= −5.0 V)<br>(IC= −2.0 mA, VCE= −5.0 V) (Note 3)|VBE(on)<br>VBE(1) −VBE(2)|−600<br>−<br>−|−<br>−<br>−1.0|−750<br>−820<br>−2.0|mV|
|**SMALL−SIGNAL CHARACTERISTICS**||||||
|Current−Gain − Bandwidth Product, (IC= −10 mA, VCE= −5 Vdc, f = 100 MHz)|fT|100|−|−|MHz|
|Output Capacitance, (VCB= −10 V, f = 1.0 MHz)|Cob|−|−|4.5|pF|
|Noise Figure, (IC= −0.2 mA, VCE= −5 Vdc, RS= 2 k�, f = 1 kHz, BW = 200Hz)|NF|−|−|10|dB|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

2. hFE(1)/hFE(2) is the ratio of one transistor compared to the other transistor within the same package. The smaller hFE is used as numerator. 

3. VBE(1) − VBE(2) is the absolute difference of one transistor compared to the other transistor within the same package. 

**www.onsemi.com** 

**2** 

**NST65010MW6** 

## **TYPICAL CHARACTERISTICS** 

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2.0 -1.0<br>1.5 VCE = -10 V -0.9 TA = 25°C<br>TA = 25°C -0.8 VBE(sat) @ IC/IB = 10<br>1.0 -0.7<br>-0.6 VBE(on) @ VCE = -10 V<br>0.7<br>-0.5<br>0.5 -0.4<br>-0.3<br>-0.2<br>0.3<br>-0.1 VCE(sat) @ IC/IB = 10<br>0.2 0<br>-0.2 -0.5 -1.0 -2.0 -5.0 -10 -20 -50 -100 -200 -0.1 -0.2 -0.5 -1.0 -2.0 -5.0 -10 -20 -50 -100<br>IC, COLLECTOR CURRENT (mAdc) IC, COLLECTOR CURRENT (mAdc)<br>Figure 1. Normalized DC Current Gain Figure 2. “Saturation” and “On” Voltages<br>-2.0 1.0<br>TA = 25°C -55°C to +125°C<br>1.2<br>-1.6<br>1.6<br>-1.2<br>2.0<br>-0.8 IC = IC = -50 mA IC = -200 mA<br>-10 mA<br>2.4<br>IC = -100 mA<br>-0.4 IC = -20 mA<br>2.8<br>0<br>-0.02 -0.1 -1.0 -10 -20 -0.2 -1.0 -10 -100<br>IB, BASE CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 3. Collector Saturation Region Figure 4. Base−Emitter Temperature Coefficient<br>10 400<br>Cib 300<br>7.0<br>TA = 25°C 200<br>5.0<br>150 VCE = -10 V<br>TA = 25°C<br>3.0 Cob 100<br>80<br>60<br>2.0<br>40<br>30<br>1.0 20<br>-0.4 -0.6 -1.0 -2.0 -4.0 -6.0 -10 -20 -30 -40 -0.5 -1.0 -2.0 -3.0 -5.0 -10 -20 -30 -50<br>VR, REVERSE VOLTAGE (VOLTS) IC, COLLECTOR CURRENT (mAdc)<br>V, VOLTAGE (VOLTS)<br>hFE, NORMALIZED DC CURRENT GAIN<br>C)°<br>VCE, COLLECTOR-EMITTER VOLTAGE (V) VB, TEMPERATURE COEFFICIENT (mV/<br>θ<br>C, CAPACITANCE (pF)<br>f�, CURRENT-GAIN - BANDWIDTH PRODUCT (MHz)T<br>**----- End of picture text -----**<br>


**Figure 5. Capacitances** 

**Figure 6. Current−Gain − Bandwidth Product** 

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**NST65010MW6** 

## **TYPICAL CHARACTERISTICS** 

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200<br>1 s 3 ms<br>100<br>50 TA = 25°C TJ = 25°C<br>10<br>5.0 BONDING WIRE LIMIT<br>THERMAL LIMIT<br>SECOND BREAKDOWN LIMIT<br>2.0<br>1.0 5.0 10 30 45 65 100<br>VCE, COLLECTOR-EMITTER VOLTAGE (V)<br>IC, COLLECTOR CURRENT (mA)<br>**----- End of picture text -----**<br>


The safe operating area curves indicate IC−VCE limits of the transistor that must be observed for reliable operation. Collector load lines for specific circuits must fall below the limits indicated by the applicable curve. 

The data of Figure 7 is based upon TJ(pk) = 150°C; TC or TA is variable depending upon conditions. 

**Figure 7. Active Region Safe Operating Area** 

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**4** 

**NST65010MW6** 

## **PACKAGE DIMENSIONS** 

## **SC−88 (SOT−363)** 

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CASE 419B−02<br>ISSUE Y<br>**----- End of picture text -----**<br>


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2X<br>aaa H D<br>7 D H NOTES:1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>A 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,<br>D GAGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-<br>PLANE SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.<br>4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF<br>6 5 4 THE PLASTIC BODY AND DATUM H.<br>L2 L 5. DATUMS A AND B ARE DETERMINED AT DATUM H.<br>E E1 DETAIL A 6. LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE<br>7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.<br>1 2 3<br>ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN<br>EXCESS OF DIMENSION b AT MAXIMUM  MATERIAL CONDI-<br>2X aaa C TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER<br>bbb H D 2X 3 TIPS RADIUS OF THE FOOT.<br>e MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>B [= 6X b : A −−− −−− 1.10 −−− −−− 0.043<br>ddd M C A-B D A1 0.00 −−− 0.10 0.000 −−− 0.004<br>TOP VIEW A2 0.70 0.90 1.00 0.027 0.035 0.039<br>b 0.15 0.20 0.25 0.006 0.008 0.010<br>C 0.08 0.15 0.22 0.003 0.006 0.009<br>A2 DETAIL A D 1.80 2.00 2.20 0.070 0.078 0.086<br>A E 2.00 2.10 2.20 0.078 0.082 0.086<br>E1 1.15 1.25 1.35 0.045 0.049 0.053<br>e 0.65 BSC 0.026 BSC<br>L 0.26 0.36 0.46 0.010 0.014 0.018<br>L2 0.15 BSC 0.006 BSC<br>aaa 0.15 0.006<br>bbb 0.30 0.012<br>6X ccc C ccc 0.10 0.004<br>A1 C SEATINGPLANE c a ddd 0.10 a 0.004<br>SIDE VIEW END VIEW STYLE 1:<br>PIN 1. EMITTER 2<br> 2. BASE 2<br>RECOMMENDED  3. COLLECTOR 1<br>SOLDERING FOOTPRINT*  4. EMITTER 1<br> 5. BASE 1<br>6X 6X  6. COLLECTOR 2<br>0.30 0.66<br>Bo or 2.50<br>0.65 sto<br>PITCH<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

**ON Semiconductor** and          are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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## **LITERATURE FULFILLMENT** : 

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