# Bipolar Pre-Biased / Digital Transistor, NPN and PNP Complement, 50 V, 50 V, 100 mA, 4.7 kohm ![Product image](https://novapart.co/image/farnell:3617368/) **URL**: https://novapart.co/products/NSVMUN5316DW1T1G/bipolar-pre-biased-digital-transistor-npn-and-pnp **SKU**: NSVMUN5316DW1T1G **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Pre-Biased / Digital Bipolar Transistors **Price**: €0.0250 **Stock**: 10+ **Lead Time**: 99 days (indicative) ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | No SVHC (25-Jun-2025) | | No. Of Pins | 6 Pin | | Product Range | MUN5316DW1 Series | | Qualification | AEC-Q101 | | Power Dissipation | 385mW | | Transistor Mounting | Surface Mount | | Transistor Polarity | NPN and PNP Complement | | Transistor Case Style | SOT-363 | | Base Input Resistor R1 | 4.7kohm | | Dc Current Gain Hfe Min | 160hFE | | Base Emitter Resistor R2 | - | | Operating Temperature Max | 150°C | | Continuous Collector Current | 100mA | | Collector Emitter Voltage Max Npn | 50V | | Collector Emitter Voltage Max Pnp | 50V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:3617368/) **Share Feedback DATA SHEET** Your Opinion Matters **www.onsemi.com** ~~ee~~ ## Complementary Bias Resistor Transistors R1 = 4.7 k R2 = k **Bias Resistor Network** © co QO ## **NPN and PNP Transistors with Monolithic Bias Resistor Network** MUN5316DW1, NSBC143TPDXV6 This series of digital transistors is designed to replace a single device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. ## **Features** - S and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q101 Qualified and PPAP Capable* - Simplifies Circuit Design - Reduces Board Space - Reduces Component Count - These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant ## **MAXIMUM RATINGS** (TA = 25C both polarities Q1 (PNP) and Q2 (NPN), unless otherwise noted) ## **PIN CONNECTIONS** **==> picture [149 x 120] intentionally omitted <==** **----- Start of picture text -----**
(3) (2) (1)
R1 R2
Q1
7 Q2
R2
R1
(4) (5) (6)
**----- End of picture text -----**
## **MARKING DIAGRAMS** **==> picture [135 x 144] intentionally omitted <==** **----- Start of picture text -----**
6
SOT−363
16 M
CASE 419B
1
SOT−563
16 M CASE 463A
1
16 = Specific Device Code
M = Date Code*
= Pb−Free Package
**----- End of picture text -----**
(Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. |noted)|||| |---|---|---|---| |**Rating**|**Symbol**|**Max**|**Unit**| |Collector−Base Voltage|VCBO|50|Vdc| |Collector−Emitter Voltage|VCEO|50|Vdc| |Collector Current − Continuous|IC|100|mAdc| |Input Forward Voltage|VIN(fwd)|30|Vdc| |Input Reverse Voltage
−NPN
−PNP|VIN(rev)|6
5|Vdc| Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ## **ORDERING INFORMATION** |**Device**|**Package**|**Shipping**†| |---|---|---| |MUN5316DW1T1G
NSVMUN5316DW1T1G*|SOT−363|3,000 / Tape & Reel| |NSBC143TPDXV6T1G,
NSVBC143TPDXV6T1G*|SOT−563|4,000 / Tape & Reel| - †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: **1**  Semiconductor Components Industries, LLC, 2016 **June, 2024 − Rev. 4** **DTC143TP/D** **MUN5316DW1, NSBC143TPDXV6** ## **THERMAL CHARACTERISTICS** |**Characteristic**
**Symbol**
**Max**
**Unit**
**MUN5316DW1 (SOT−363) One Junction Heated**
~~a~~| |---| |Total Device Dissipation
TA= 25C
(Note 1)
(Note 2)
Derate above 25C
(Note 1)
(Note 2)
PD
187
256
1.5
2.0
mW
mW/C
Thermal Resistance,
(Note 1)
Junction to Ambient
(Note 2)
R JA
670
490
C/W
~~ee~~
~~ee~~
~~a~~| |**MUN5316DW1 (SOT−363) Both Junction Heated**(Note 3)| |Total Device Dissipation
TA= 25C
(Note 1)
(Note 2)
Derate above 25C
(Note 1)
(Note 2)
PD
250
385
2.0
3.0
mW
mW/C
Thermal Resistance,
(Note 1)
Junction to Ambient
(Note 2)
R JA
493
325
C/W
~~ee~~
~~ee~~
~~OO~~| |Thermal Resistance,
(Note 1)
Junction to Lead
(Note 2)
R JL
188
208
C/W
Junction and Storage Temperature Range
TJ, Tstg
−55 to +150
C
~~————————EE~~| |**NSBC143TPDXV6 (SOT−563) One Junction Heated**| |Total Device Dissipation
TA= 25C
(Note 1)
Derate above 25C
(Note 1)
PD
357
2.9
mW
mW/C
Thermal Resistance,
Junction to Ambient
(Note 1)
R JA
350
C/W
~~ee~~
~~ee~~
~~a~~| |**NSBC143TPDXV6 (SOT−563) Both Junction Heated**(Note 3)| |Total Device Dissipation
TA= 25C
(Note 1)
Derate above 25C
(Note 1)
PD
500
4.0
mW
mW/C
Thermal Resistance,
Junction to Ambient
(Note 1)
R JA
250
C/W
Junction and Storage Temperature Range
TJ, Tstg
−55 to +150
C
~~ee~~
~~ee~~
~~———————E~~| |1. FR−4 @ Minimum Pad.| 2. FR−4 @ 1.0 x 1.0 Inch Pad. 3. Both junction heated values assume total power is sum of two equally powered channels. > **www.onsemi.com Share Feedback** ~~Qe”~~ **2** Your Opinion Matters ## **MUN5316DW1, NSBC143TPDXV6** **ELECTRICAL CHARACTERISTICS** (TA = 25C both polarities Q1 (PNP) and Q2 (NPN), unless otherwise noted) **Characteristic Symbol Min Typ Max Unit** ~~a|~~ **OFF CHARACTERISTICS** Collector−Base Cutoff Current ICBO nAdc (VCB = 50 V, IE = 0) − − 100 ~~Po~~ Collector−Emitter Cutoff Current ICEO nAdc (VCE = 50 V, IB = 0) − − 500 ~~Po~~ Emitter−Base Cutoff Current IEBO mAdc (VEB = 6.0 V, IC = 0) − − 1.9 ~~Po~~ Collector−Base Breakdown Voltage V(BR)CBO Vdc (IC = 10 A, IE = 0) 50 − − ~~ee~~ Collector−Emitter Breakdown Voltage (Note 4) V(BR)CEO Vdc (IC = 2.0 mA, IB = 0) 50 − − ~~ee eeeeee~~ ~~**e e** e~~ **ON CHARACTERISTICS** DC Current Gain (Note 4) hFE (IC = 5.0 mA, VCE = 10 V) 160 350 − ~~eeee eee eee~~ Collector−Emitter Saturation Voltage (Note 4) VCE(sat) Vdc (IC = 10 mA, IB = 0.3 mA) − − 0.25 Input Voltage (off) Vi(off) Vdc (VCE = 5.0 V, IC = 100 A) (NPN) − 0.6 − (VCE = 5.0 V, IC = 100 A) (PNP) 0.58 ~~a~~ Input Voltage (on) Vi(on) Vdc (VCE = 0.2 V, IC = 10 mA) (NPN) − 0.9 − (VCE = 0.2 V, IC = 10 mA) (PNP) 1.0 Output Voltage (on) VOL Vdc (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 k ) − − 0.2 ~~aeee eee~~ Output Voltage (off) VOH Vdc (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 k ) 4.9 − − ~~eeee eee ee~~ Input Resistor R1 3.3 4.7 6.1 k ~~Pek nn~~ Resistor Ratio ~~(renner~~ R1/R2 ~~Rn~~ − ~~(ene~~ − − Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle  2%. **==> picture [243 x 173] intentionally omitted <==** **----- Start of picture text -----**
400350 pT | | | | ct
300 PtP | IAG
250 PT Ed KR
200 PTE fF ou INEN
(1) (2)
150100 PettPt fF | INNdtUIA
NN
500 Ff | fftL
−50 −25 0 25 50 75 100 125 150
AMBIENT TEMPERATURE (C)
, POWER DISSIPATION (mW)
D
P
**----- End of picture text -----**
**==> picture [115 x 19] intentionally omitted <==** **----- Start of picture text -----**
(1) SOT−363; 1.0 x 1.0 inch Pad
(2) SOT−563; Minimum Pad
**----- End of picture text -----**
**Figure 1. Derating Curve** **www.onsemi.com** ~~—~~ **www.onsemi.com** **Share Feedback** Your Opinion Matters **3** **MUN5316DW1, NSBC143TPDXV6** ## **TYPICAL CHARACTERISTICS − NPN TRANSISTORS MUN5316DW1, NSBC143TPDXV6** **==> picture [491 x 382] intentionally omitted <==** **----- Start of picture text -----**
1 1000
150C
IC/IB = 10 ee | nn nn
ee ——————_———a 25C
a OOes | rT TTT aesTN
PPP Pet 100 eee −55C
25C 150C
0.1 |_ —— i PCs ($ ST CT
—————————————es ee ee eeeeee
SSSs —_— eeee—_|eeeee ee eeeeee 10 ———ell| htee4}
−55  C r | [| | ff ff a Co
V CE = 10 V
0.01 ee 1 eee il
0 10 20 30 40 50 1 10 100
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) vs. IC Figure 3. DC Current Gain
3.2 100
2.8 a f I E = = 0 A 10 kHz oe 150C 25  C −55  C
2.4 ee|rr TA = 25  C 10 |fn=LY—_———— _—~__i=_ZAD====eel| | ||
2.0
1.6 A 1 Jif ff | | [| | [ |
1.2 eea a a ee ee ee ee eeee ee |eeSSSaf ifeeFuseaSStT esft|SS ee ee
0.8 C—Oa ee TT 0.1 |]——=iy =et;————SSSSS=SSSS| |TT
0.4 VO = 5 V
a O GG ———a
0 A 0.01 fr} | Tt; ft tT tT ft ft
0 10 20 30 40 50 0 1 2 3 4
VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V)
VOLTAGE (V)
, COLLECTOR−EMITTER , DC CURRENT GAIN
FE
h
CE(sat)
V
, OUTPUT CAPACITANCE (pF) , COLLECTOR CURRENT (mA)
Cob IC
**----- End of picture text -----**
**Figure 4. Output Capacitance** **Figure 5. Output Current vs. Input Voltage** **==> picture [241 x 172] intentionally omitted <==** **----- Start of picture text -----**
100
a ee
[_
a es es es ee
a ss ss
10 P| | | tT | | | TT
25C
ee
| {| −55  C rr a eee
a eee
1 BE sane— ea
iP. 150  C a
——_——— V O = 0.2 V
0.1 Oe
0 10 20 30 40 50
IC, COLLECTOR CURRENT (mA)
, INPUT VOLTAGE (V)
in
V
**----- End of picture text -----**
**Figure 6. Input Voltage vs. Output Current** **www.onsemi.com** **Share Feedback** Your Opinion Matters **4** **MUN5316DW1, NSBC143TPDXV6** ## **TYPICAL CHARACTERISTICS − PNP TRANSISTORS MUN5316DW1, NSBC143TPDXV6** **==> picture [491 x 170] intentionally omitted <==** **----- Start of picture text -----**
1 a ee 1000 ————
IC/IB = 10 150C
es —— SS
a OO i en eeeee
25C
PrFrprpyryy ty yo 100 pd −55C _| |Tn
PF ff SSS SES
0.1  = |—7_—— | aaee ee eeeee ee ee
150 C SS SS SS es es00
mncm™ |
oe 10 eel
|_— 25  C esee eeeeee eeeeee ee _———oOSEE
−55C ee ee VCE = 10 V |
0.01 1
0 10 20 30 40 50 1 10 100
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
AGE (V)
, DC CURRENT GAIN
FE
, COLLECTOR−EMITTER VOLT- h
CE(sat)
V
**----- End of picture text -----**
**Figure 7. VCE(sat) vs. IC** **Figure 8. DC Current Gain** **==> picture [487 x 172] intentionally omitted <==** **----- Start of picture text -----**
10 100
9 a ee ee ee ee ee f = 10 kHz = 150C 25C ———S= −55 SSS C
8 l E = 0 A  10 |
T A = 25 C
7 a OO fe foo
56 AA}A __+_|__+_____}__}__}ee ee |__| 1 YTSSeeJiff [| | | [|SS| SSS7[{ | |
4 r\Ta afT ee ee 0.1 |=Jie);=_——=_—=[| [| ===[| [| | SSSSSS=[Tf |
3 SS et
2 a OO 0.01 rf ft; [ | | [| [ [ | |
1 rTa[TTT|; | a| | SSee|; ee| ee| ee| eeJT ee SS—S——————————————(==eS SS SS—— SSSSee VO = 5 V
0 OC 0.001 0 ee ee ee
0 10 20 30 40 50 0 1 2 3 4 5
VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V)
, OUTPUT CAPACITANCE (pF)
ob , COLLECTOR CURRENT (mA)
C IC
**----- End of picture text -----**
**Figure 9. Output Capacitance** **Figure 10. Output Current vs. Input Voltage** **==> picture [235 x 169] intentionally omitted <==** **----- Start of picture text -----**
100 EEE Eo Eo
ES VO = 0.2 V SeSR |
a es es
a
10 25C
Pd
ee
ee
H −55  C ee ee eee eee
Saf
1 as
a |
eS cee
| A 150  C a SS
SS ————— SS
0.1 P| | | hE | ET
0 10 20 30 40 50
IC, COLLECTOR CURRENT (mA)
, INPUT VOLTAGE (V)
in
V
**----- End of picture text -----**
**Figure 11. Input Voltage vs. Output Current** **www.onsemi.com** **Share Feedback** Your Opinion Matters **5** MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** ## **SC−88 2.00x1.25x0.90, 0.65P** CASE 419B−02 ISSUE Z ## DATE 18 APR 2024 **==> picture [164 x 154] intentionally omitted <==** **----- Start of picture text -----**
GENERIC
MARKING DIAGRAM*
6
io o
XXXM
1 UU U
XXX = Specific Device Code
M = Date Code*
: = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
**----- End of picture text -----**
*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ : ”, may or may not be present. Some products may not follow the Generic Marking. ## **STYLES ON PAGE 2** Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. **==> picture [169 x 8] intentionally omitted <==** **----- Start of picture text -----**
DOCUMENT NUMBER: 98ASB42985B
**----- End of picture text -----**
## **SC−88 2.00x1.25x0.90, 0.65P** ## **PAGE 1 OF 2** ## ## **DESCRIPTION:** **onsemi** and are trademarks of Semiconductor Components Industries, LLC dba onsemi. **onsemi** or its subsidiaries in the United States and/or other countries. **onsemi** reserves the right to make changes without further notice to any products herein. **onsemi** makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. **onsemi** does not convey any license under its patent rights nor the rights of others. www.onsemi.com  Semiconductor Components Industries, LLC, 2019 ## **SC−88 2.00x1.25x0.90, 0.65P** CASE 419B−02 ISSUE Z ## DATE 18 APR 2024 |STYLE 1:|STYLE 2:|STYLE 3:|STYLE 4:|STYLE 5:|STYLE 6:| |---|---|---|---|---|---| |PIN 1. EMITTER 2|CANCELLED|CANCELLED|PIN 1. CATHODE|PIN 1. ANODE|PIN 1. ANODE 2| |2. BASE 2|||2. CATHODE|2. ANODE|2. N/C| |3. COLLECTOR 1|||3. COLLECTOR|3. COLLECTOR|3. CATHODE 1| |4. EMITTER 1|||4. EMITTER|4. EMITTER|4. ANODE 1| |5. BASE 1|||5. BASE|5. BASE|5. N/C| |6. COLLECTOR 2|||6. ANODE|6. CATHODE|6. CATHODE 2| |STYLE 7:|STYLE 8:|STYLE 9:|STYLE 10:|STYLE 11:|STYLE 12:| |PIN 1. SOURCE 2|CANCELLED|PIN 1. EMITTER 2|PIN 1. SOURCE 2|PIN 1. CATHODE 2|PIN 1. ANODE 2| |2. DRAIN 2||2. EMITTER 1|2. SOURCE 1|2. CATHODE 2|2. ANODE 2| |3. GATE 1||3. COLLECTOR 1|3. GATE 1|3. ANODE 1|3. CATHODE 1| |4. SOURCE 1||4. BASE 1|4. DRAIN 1|4. CATHODE 1|4. ANODE 1| |5. DRAIN 1||5. BASE 2|5. DRAIN 2|5. CATHODE 1|5. ANODE 1| |6. GATE 2||6. COLLECTOR 2|6. GATE 2|6. ANODE 2|6. CATHODE 2| |STYLE 13:|STYLE 14:|STYLE 15:|STYLE 16:|STYLE 17:|STYLE 18:| |PIN 1. ANODE|PIN 1. VREF|PIN 1. ANODE 1|PIN 1. BASE 1|PIN 1. BASE 1|PIN 1. VIN1| |2. N/C|2. GND|2. ANODE 2|2. EMITTER 2|2. EMITTER 1|2. VCC| |3. COLLECTOR|3. GND|3. ANODE 3|3. COLLECTOR 2|3. COLLECTOR 2|3. VOUT2| |4. EMITTER|4. IOUT|4. CATHODE 3|4. BASE 2|4. BASE 2|4. VIN2| |5. BASE|5. VEN|5. CATHODE 2|5. EMITTER 1|5. EMITTER 2|5. GND| |6. CATHODE|6. VCC|6. CATHODE 1|6. COLLECTOR 1|6. COLLECTOR 1|6. VOUT1| |STYLE 19:|STYLE 20:|STYLE 21:|STYLE 22:|STYLE 23:|STYLE 24:| |PIN 1. I OUT|PIN 1. COLLECTOR|PIN 1. ANODE 1|PIN 1. D1 (i)|PIN 1. Vn|PIN 1. CATHODE| |2. GND|2. COLLECTOR|2. N/C|2. GND|2. CH1|2. ANODE| |3. GND|3. BASE|3. ANODE 2|3. D2 (i)|3. Vp|3. CATHODE| |4. V CC|4. EMITTER|4. CATHODE 2|4. D2 (c)|4. N/C|4. CATHODE| |5. V EN|5. COLLECTOR|5. N/C|5. VBUS|5. CH2|5. CATHODE| |6. V REF|6. COLLECTOR|6. CATHODE 1|6. D1 (c)|6. N/C|6. CATHODE| |STYLE 25:|STYLE 26:|STYLE 27:|STYLE 28:|STYLE 29:|STYLE 30:| |PIN 1. BASE 1|PIN 1. SOURCE 1|PIN 1. BASE 2|PIN 1. DRAIN|PIN 1. ANODE|PIN 1. SOURCE 1| |2. CATHODE|2. GATE 1|2. BASE 1|2. DRAIN|2. ANODE|2. DRAIN 2| |3. COLLECTOR 2|3. DRAIN 2|3. COLLECTOR 1|3. GATE|3. COLLECTOR|3. DRAIN 2| |4. BASE 2|4. SOURCE 2|4. EMITTER 1|4. SOURCE|4. EMITTER|4. SOURCE 2| |5. EMITTER|5. GATE 2|5. EMITTER 2|5. DRAIN|5. BASE/ANODE|5. GATE 1| |6. COLLECTOR 1|6. DRAIN 1|6. COLLECTOR 2|6. DRAIN|6. CATHODE|6. DRAIN 1| Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment. **==> picture [492 x 37] intentionally omitted <==** **----- Start of picture text -----**
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42985B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: SC−88 2.00x1.25x0.90, 0.65P PAGE 2 OF 2
**----- End of picture text -----**
**onsemi** and are trademarks of Semiconductor Components Industries, LLC dba **onsemi** or its subsidiaries in the United States and/or other countries. **onsemi** reserves the right to make changes without further notice to any products herein. **onsemi** makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. **onsemi** does not convey any license under its patent rights nor the rights of others. **www.onsemi.com** ~~**2**~~ www.onsemi.com  Semiconductor Components Industries, LLC, 2019 MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** **==> picture [314 x 39] intentionally omitted <==** **----- Start of picture text -----**
SOT−563−6 1.60x1.20x0.55, 0.50P
CASE 463A
ISSUE J
DATE 15 FEB 2024
**----- End of picture text -----**
**==> picture [481 x 173] intentionally omitted <==** **----- Start of picture text -----**
GENERIC
MARKING DIAGRAM*
S T YL E 7: S T YL E 8 S T YL E 9:
P I N 1. C ATH OD E P I N 1 , DR AI N P I N 1 , SOURC E 1 O55
2, A NOD E 2, DR AI N 2, G ATE 1
XXM
3. C ATH OD E 3. G ATE 3, DR AI N 2
4. C ATH OD E 4. SOURC E 4. SOURC E 2 1
5, A NOD E 5, DR AI N 5, G ATE 2 —
6. C ATH OD E 6. DR AI N 6. DR AI N 1 XX = Specific Device Code
M = Month Code
. = Pb−Free Package
S T YL E 1 0: S T YL E 1
P I N 1 . C ATH OD E 1 P I N 1 . E M ITTE R 2 *This information is generic. Please refer to
2, N/C 2, B A S E 2 device data sheet for actual part marking.
3. C ATH OD E 2 3, COLL E C T OR 1 Pb−Free indicator, “G” or microdot “ . ”, may
5.4. N/C A NOD E 2 4.5. E BM AITTE S E 1 R 1 or may not be present. Some products may
6. A NOD E 1 6. COLL E C T OR 2 not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON11126D Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: SOT−563−6 1.60x1.20x0.55, 0.50P PAGE 1 OF 1
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