# Bipolar Transistor Array, Dual NPN, 45 V, 100 mA, 380 mW

![Product image](https://novapart.co/image/farnell:2533341/)

**URL**: https://novapart.co/products/NST45011MW6T1G/bipolar-transistor-array-dual-npn-45-v-100-ma-380
**SKU**: NST45011MW6T1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Bipolar Junction Transistor Arrays - BJT
**Price**: €0.1130
**Stock**: 200+
**Lead Time**: 92 days (indicative)

## Description

Transistor Polarity:Dual NPN; Collector Emitter Voltage V(br)ceo:45V; Transition Frequency ft:100MHz; Power Dissipation Pd:380mW; DC Collector Current:100mA; DC Current Gain hFE:150hFE; Trans

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 6Pins |
| Product Range | - |
| Qualification | - |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | Dual NPN |
| Power Dissipation Npn | 380mW |
| Power Dissipation Pnp | - |
| Transistor Case Style | SOT-363 |
| Transition Frequency Npn | 100MHz |
| Transition Frequency Pnp | - |
| Operating Temperature Max | 150°C |
| Dc Current Gain Hfe Min Npn | 150hFE |
| Dc Current Gain Hfe Min Pnp | - |
| Continuous Collector Current Npn | 100mA |
| Continuous Collector Current Pnp | - |
| Collector Emitter Voltage Max Npn | 45V |
| Collector Emitter Voltage Max Pnp | - |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2533341/)

## NST45011MW6T1G, NSVT45011MW6T3G 

## Dual Matched General Purpose Transistor 

## **NPN Matched Pair** 

**http://onsemi.com** 

These transistors are housed in an ultra−small SOT−363 package ideally suited for portable products. They are assembled to create a pair of devices highly matched in all parameters, eliminating the need for costly trimming. Applications are Current Mirrors; Differential, Sense and Balanced Amplifiers; Mixers; Detectors and Limiters. 

## **Features** 

- Current Gain Matching to 10% 

- Base−Emitter Voltage Matched to 2 mV 

- Drop−In Replacement for Standard Device 

- NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant* 

**==> picture [122 x 125] intentionally omitted <==**

**----- Start of picture text -----**<br>
SOT−363<br>CASE 419B<br>STYLE 1<br>(3) (2) (1)<br>Q1 Q2<br>t e<br>(4) (5) (6)<br>**----- End of picture text -----**<br>


**MAXIMUM RATINGS MARKING DIAGRAMS Rating Symbol Value Unit** Collector−Emitter Voltage VCEO 45 V 2F M Collector−Base Voltage VCBO 50 V Emitter−Base Voltage VEBO 6.0 V Collector Current − Continuous IC 100 mAdc 2F = Device Code Stresses exceeding Maximum Ratings may damage the device. Maximum M = Date Code ~~==~~ Ratings are stress ratings only. Functional operation above the Recommended ~~«~~ = Pb−Free Package Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. (Note: Microdot may be in either location) 

2F M 2F = Device Code M = Date Code = Pb−Free Package (Note: Microdot may be in either location) 

**THERMAL CHARACTERISTICS ORDERING INFORMATION Characteristic Symbol Max Unit Device Package Shipping**[†] Total Device Dissipation PD 380 mW NST45011MW6T1G SOT−363 3,000 / Per Device 250 (Pb−Free) Tape & Reel FR−5 Board (Note 1) TA = 25 ° C NSVT45011MW6T3G SOT−363 10,000 / Derate Above 25 ° C 3.0 mW/ ° C (Pb−Free) Tape & Reel Thermal Resistance, R JA 328 ° C/W †For information on tape and reel specifications, Junction to Ambient including part orientation and tape sizes, please ~~Soe~~ Junction and Storage TJ, Tstg −55 to +150 ° C refer to our Tape and Reel Packaging SpecificationsBrochure, BRD8011/D. Temperature Range 

1. FR−5 = 1.0 x 0.75 x 0.062 in 

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

Publication Order Number: **NST45011MW6/D** 

**1** 

© Semiconductor Components Industries, LLC, 2013 **February, 2013 − Rev. 4** 

## **NST45011MW6T1G, NSVT45011MW6T3G** 

## **ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS**(TA= 25°C unless otherwise noted)||||||
|---|---|---|---|---|---|
|**Characteristic**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||
|Collector−Emitter Breakdown Voltage, (IC= 10 mA)|V(BR)CEO|45|−|−|V|
|Collector−Emitter Breakdown Voltage, (IC= 10�A, VEB= 0)|V(BR)CES|50|−|−|V|
|Collector−Base Breakdown Voltage, (IC= 10�A)|V(BR)CBO|50|−|−|V|
|Emitter−Base Breakdown Voltage, (IE= 1.0�A)|V(BR)EBO|6.0|−|−|V|
|Collector Cutoff Current<br>(VCB= 30 V)<br>(VCB= 30 V, TA= 150°C)|ICBO|−<br>−|−<br>−|15<br>5.0|nA<br>�A|
|**ON CHARACTERISTICS**||||||
|DC Current Gain<br>(IC= 10�A, VCE= 5.0 V)<br>(IC= 2.0 mA, VCE= 5.0 V)<br>(IC= 2.0 mA, VCE= 5.0 V) (Note 2)|hFE<br>hFE(1)/hFE(2)|150<br>200<br>0.9|−<br>300<br>1.0|−<br>500<br>1.1|−|
|Collector−Emitter Saturation Voltage<br>(IC= 10 mA, IB= 0.5 mA)<br>(IC= 100 mA, IB= 5.0 mA)|VCE(sat)|−<br>−|−<br>−|250<br>600|mV|
|Base−Emitter Saturation Voltage<br>(IC= 10 mA, IB= 0.5 mA)<br>(IC= 100 mA, IB= 5.0 mA)|VBE(sat)|700<br>850|750<br>890|800<br>950|mV|
|Base−Emitter On Voltage<br>(IC= 2.0 mA, VCE= 5.0 V)<br>(IC= 10 mA, VCE= 5.0 V)<br>(IC= 2.0 mA, VCE= 5.0 V) (Note 3)|VBE(on)<br>VBE(1) −VBE(2)|580<br>−<br>−|660<br>−<br>1.0|700<br>770<br>2.0|mV|
|**SMALL−SIGNAL CHARACTERISTICS**||||||
|Current−Gain − Bandwidth Product, (IC= 10 mA, VCE= 5 Vdc, f = 100 MHz)|fT|100|−|−|MHz|
|Output Capacitance, (VCB= 10 V, f = 1.0 MHz)|Cob|−|−|4.5|pF|
|Noise Figure, (IC= 0.2 mA, VCE= 5 Vdc, RS= 2 k�, f = 1 kHz, BW = 200Hz)|NF|−|−|10|dB|
|Noise Figure, (IC= 0.1 mA, VCE= 10 Vdc, RS= 1 k�, f = 1 kHz, BW = 200Hz)|NF|−|1.0|−|dB|



2. hFE(1)/hFE(2) is the ratio of one transistor compared to the other transistor within the same package. The smaller hFE is used as numerator. 

3. VBE(1) − VBE(2) is the absolute difference of one transistor compared to the other transistor within the same package. 

**http://onsemi.com** 

**2** 

**NST45011MW6T1G, NSVT45011MW6T3G** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [490 x 589] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.0 1.0<br>1.5 VTACE = 25 = 10 V°C 0.90.8 TA = 25°C<br>VBE(sat) @ IC/IB = 10<br>1.0 0.7<br>0.8 0.6 VBE(on) @ VCE = 10 V<br>0.5<br>0.6<br>0.4<br>0.4 0.3<br>0.3 0.2<br>0.1 VCE(sat) @ IC/IB = 10<br>0.2 0<br>0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100<br>IC, COLLECTOR CURRENT (mAdc) IC, COLLECTOR CURRENT (mAdc)<br>Figure 1. Normalized DC Current Gain Figure 2. “Saturation” and “On” Voltages<br>2.0 1.0<br>TA = 25°C -55°C to +125°C<br>1.2<br>1.6<br>IC = 200 mA 1.6<br>1.2<br>IC = IC = IC = 50 mA IC = 100 mA<br>2.0<br>10 mA 20 mA<br>0.8<br>2.4<br>0.4<br>2.8<br>0<br>0.02 0.1 1.0 10 20 0.2 1.0 10 100<br>IB, BASE CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 3. Collector Saturation Region Figure 4. Base−Emitter Temperature Coefficient<br>10 400<br>300<br>7.0 T A  = 25°C<br>200<br>5.0 C ib<br>3.0 10080 VTACE = 25 = 10 V°C<br>Cob<br>60<br>2.0<br>40<br>30<br>1.0 20<br>0.4 0.6 0.8 1.0 2.0 4.0 6.0 8.0 10 20 40 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50<br>VR, REVERSE VOLTAGE (VOLTS) IC, COLLECTOR CURRENT (mAdc)<br>V, VOLTAGE (VOLTS)<br>hFE, NORMALIZED DC CURRENT GAIN<br>C)°<br>VCE, COLLECTOR-EMITTER VOLTAGE (V) VB, TEMPERATURE COEFFICIENT (mV/<br>θ<br>C, CAPACITANCE (pF)<br>f�, CURRENT-GAIN - BANDWIDTH PRODUCT (MHz)T<br>**----- End of picture text -----**<br>


**Figure 5. Capacitances** 

**Figure 6. Current−Gain − Bandwidth Product** 

**http://onsemi.com** 

**3** 

**NST45011MW6T1G, NSVT45011MW6T3G** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [241 x 168] intentionally omitted <==**

**----- Start of picture text -----**<br>
200<br>1 s 3 ms<br>100<br>50 TA = 25°C TJ = 25°C<br>10<br>5.0 BONDING WIRE LIMIT<br>THERMAL LIMIT<br>SECOND BREAKDOWN LIMIT<br>2.0<br>1.0 5.0 10 30 45 65 100<br>VCE, COLLECTOR-EMITTER VOLTAGE (V)<br>IC, COLLECTOR CURRENT (mA)<br>**----- End of picture text -----**<br>


The safe operating area curves indicate IC−VCE limits of the transistor that must be observed for reliable operation. Collector load lines for specific circuits must fall below the limits indicated by the applicable curve. 

The data of Figure 7 is based upon TJ(pk) = 150°C; TC or TA is variable depending upon conditions. 

**Figure 7. Active Region Safe Operating Area** 

**http://onsemi.com** 

**4** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

**SC−88/SC70−6/SOT−363** CASE 419B−02 ISSUE Y 

**==> picture [479 x 420] intentionally omitted <==**

**----- Start of picture text -----**<br>
1<br>SCALE 2:1 2X DATE 11 DEC 2012<br>aaa H D<br>- D H NOTES:1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>A 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,<br>D GAGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-<br>PLANE SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.<br>4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF<br>6 5 4 THE PLASTIC BODY AND DATUM H.<br>L2 L 5. DATUMS A AND B ARE DETERMINED AT DATUM H.<br>E E1 DETAIL A 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THELEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.<br>7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.<br>1 2 3<br>ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN<br>EXCESS OF DIMENSION b AT MAXIMUM  MATERIAL CONDI-<br>2X aaa C TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER<br>bbb H D 2X 3 TIPS RADIUS OF THE FOOT.<br>e MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>B l= 6X b : A −−− −−− 1.10 −−− −−− 0.043<br>ddd M C A-B D A1 0.00 −−− 0.10 0.000 −−− 0.004<br>TOP VIEW A2 0.70 0.90 1.00 0.027 0.035 0.039<br>b 0.15 0.20 0.25 0.006 0.008 0.010<br>C 0.08 0.15 0.22 0.003 0.006 0.009<br>A2 DETAIL A D 1.80 2.00 2.20 0.070 0.078 0.086<br>A E 2.00 2.10 2.20 0.078 0.082 0.086<br>E1 1.15 1.25 1.35 0.045 0.049 0.053<br>e 0.65 BSC 0.026 BSC<br>L 0.26 0.36 0.46 0.010 0.014 0.018<br>L2 0.15 BSC 0.006 BSC<br>aaa 0.15 0.006<br>bbb 0.30 0.012<br>6X ccc C ccc 0.10 0.004<br>(tll, A1 C  A SEATINGPLANE Ma c === ddd 0.10 0.004<br>SIDE VIEW END VIEW GENERIC<br>MARKING DIAGRAM*<br>RECOMMENDED 6<br>SOLDERING FOOTPRINT*<br>6X 6X XXXM<br>0.30 0.66<br>1<br>Ta os 2.50 XXX = Specific Device Code<br>M = Date Code*<br>= Pb−Free Package<br>0.65 yo (Note: Microdot may be in either location)<br>PITCH<br>**----- End of picture text -----**<br>


## DATE 11 DEC 2012 

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 

   - *Date Code orientation and/or position may vary depending upon manufacturing location. 

**==> picture [83 x 5] intentionally omitted <==**

**----- Start of picture text -----**<br>
DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


- *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

- *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ ”, may or may not be present. Some products may not follow the Generic Marking. 

## **STYLES ON PAGE 2** 

**DOCUMENT NUMBER: 98ASB42985B** 

**DESCRIPTION: SC−88/SC70−6/SOT−363** 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

**PAGE 1 OF 2** 

ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2019 

## **SC−88/SC70−6/SOT−363** CASE 419B−02 ISSUE Y 

## DATE 11 DEC 2012 

|STYLE 1:|STYLE 2:|STYLE 3:|STYLE 4:|STYLE 5:|STYLE 6:|
|---|---|---|---|---|---|
|PIN 1. EMITTER 2|CANCELLED|CANCELLED|PIN 1. CATHODE|PIN 1. ANODE|PIN 1. ANODE 2|
|2. BASE 2|||2. CATHODE|2. ANODE|2. N/C|
|3. COLLECTOR 1|||3. COLLECTOR|3. COLLECTOR|3. CATHODE 1|
|4. EMITTER 1|||4. EMITTER|4. EMITTER|4. ANODE 1|
|5. BASE 1|||5. BASE|5. BASE|5. N/C|
|6. COLLECTOR 2|||6. ANODE|6. CATHODE|6. CATHODE 2|
|STYLE 7:|STYLE 8:|STYLE 9:|STYLE 10:|STYLE 11:|STYLE 12:|
|PIN 1. SOURCE 2|CANCELLED|PIN 1. EMITTER 2|PIN 1. SOURCE 2|PIN 1. CATHODE 2|PIN 1. ANODE 2|
|2. DRAIN 2||2. EMITTER 1|2. SOURCE 1|2. CATHODE 2|2. ANODE 2|
|3. GATE 1||3. COLLECTOR 1|3. GATE 1|3. ANODE 1|3. CATHODE 1|
|4. SOURCE 1||4. BASE 1|4. DRAIN 1|4. CATHODE 1|4. ANODE 1|
|5. DRAIN 1||5. BASE 2|5. DRAIN 2|5. CATHODE 1|5. ANODE 1|
|6. GATE 2||6. COLLECTOR 2|6. GATE 2|6. ANODE 2|6. CATHODE 2|
|STYLE 13:|STYLE 14:|STYLE 15:|STYLE 16:|STYLE 17:|STYLE 18:|
|PIN 1. ANODE|PIN 1. VREF|PIN 1. ANODE 1|PIN 1. BASE 1|PIN 1. BASE 1|PIN 1. VIN1|
|2. N/C|2. GND|2. ANODE 2|2. EMITTER 2|2. EMITTER 1|2. VCC|
|3. COLLECTOR|3. GND|3. ANODE 3|3. COLLECTOR 2|3. COLLECTOR 2|3. VOUT2|
|4. EMITTER|4. IOUT|4. CATHODE 3|4. BASE 2|4. BASE 2|4. VIN2|
|5. BASE|5. VEN|5. CATHODE 2|5. EMITTER 1|5. EMITTER 2|5. GND|
|6. CATHODE|6. VCC|6. CATHODE 1|6. COLLECTOR 1|6. COLLECTOR 1|6. VOUT1|
|STYLE 19:|STYLE 20:|STYLE 21:|STYLE 22:|STYLE 23:|STYLE 24:|
|PIN 1. I OUT|PIN 1. COLLECTOR|PIN 1. ANODE 1|PIN 1. D1 (i)|PIN 1. Vn|PIN 1. CATHODE|
|2. GND|2. COLLECTOR|2. N/C|2. GND|2. CH1|2. ANODE|
|3. GND|3. BASE|3. ANODE 2|3. D2 (i)|3. Vp|3. CATHODE|
|4. V CC|4. EMITTER|4. CATHODE 2|4. D2 (c)|4. N/C|4. CATHODE|
|5. V EN|5. COLLECTOR|5. N/C|5. VBUS|5. CH2|5. CATHODE|
|6. V REF|6. COLLECTOR|6. CATHODE 1|6. D1 (c)|6. N/C|6. CATHODE|
|STYLE 25:|STYLE 26:|STYLE 27:|STYLE 28:|STYLE 29:|STYLE 30:|
|PIN 1. BASE 1|PIN 1. SOURCE 1|PIN 1. BASE 2|PIN 1. DRAIN|PIN 1. ANODE|PIN 1. SOURCE 1|
|2. CATHODE|2. GATE 1|2. BASE 1|2. DRAIN|2. ANODE|2. DRAIN 2|
|3. COLLECTOR 2|3. DRAIN 2|3. COLLECTOR 1|3. GATE|3. COLLECTOR|3. DRAIN 2|
|4. BASE 2|4. SOURCE 2|4. EMITTER 1|4. SOURCE|4. EMITTER|4. SOURCE 2|
|5. EMITTER|5. GATE 2|5. EMITTER 2|5. DRAIN|5. BASE/ANODE|5. GATE 1|
|6. COLLECTOR 1|6. DRAIN 1|6. COLLECTOR 2|6. DRAIN|6. CATHODE|6. DRAIN 1|



Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment. 

|**DOCUMENT NUMBER:**|**98ASB42985B**|Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.|Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.|
|---|---|---|---|
|**DESCRIPTION:**|**SC−88/SC70−6/SOT−363**||**PAGE 2 OF 2**|



ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2019 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi’s** product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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◊ 

**==> picture [232 x 43] intentionally omitted <==**



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