# Bipolar Pre-Biased / Digital Transistor, NPN and PNP Complement, 50 V, 50 V, 100 mA ![Product image](https://novapart.co/image/farnell:3617280/) **URL**: https://novapart.co/products/NSBC144WPDP6T5G/bipolar-pre-biased-digital-transistor-npn-and-pnp **SKU**: NSBC144WPDP6T5G **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Pre-Biased / Digital Bipolar Transistors **Price**: €0.0440 **Stock**: 10+ ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | No SVHC (15-Jan-2018) | | No. Of Pins | 6 Pin | | Product Range | - | | Qualification | - | | Power Dissipation | 408mW | | Transistor Mounting | Surface Mount | | Transistor Polarity | NPN and PNP Complement | | Transistor Case Style | SOT-963 | | Base Input Resistor R1 | - | | Dc Current Gain Hfe Min | 80hFE | | Base Emitter Resistor R2 | - | | Operating Temperature Max | 150°C | | Continuous Collector Current | 100mA | | Collector Emitter Voltage Max Npn | 50V | | Collector Emitter Voltage Max Pnp | 50V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:3617280/) NSBC144WPDP6 ## Complementary Bias Resistor Transistors R1 = 47 k R2 = 22 k ## **NPN and PNP Transistors with Monolithic Bias Resistor Network** This series of digital transistors is designed to replace a single device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. ## **Features** - Simplifies Circuit Design - Reduces Board Space - Reduces Component Count - S and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q101 Qualified and PPAP Capable - This Device is Pb-Free, Halogen Free/BFR Free and is RoHS Compliant ## **MAXIMUM RATINGS** (TA = 25 ° C both polarities Q1 (PNP) & Q2 (NPN), unless otherwise noted) |**Rating**|**Symbol**|**Max**|**Unit**| |---|---|---|---| |Collector-Base Voltage|VCBO|50|Vdc| |Collector-Emitter Voltage|VCEO|50|Vdc| |Collector Current − Continuous|IC|100|mAdc| |Input Forward Voltage|VIN(fwd)|40|Vdc| |Input Reverse Voltage|VIN(rev)|10|Vdc| **www.onsemi.com** **==> picture [144 x 144] intentionally omitted <==** **----- Start of picture text -----**
PIN CONNECTIONS
(3) (2) (1)
R1 R2
Q1
Q2
R2 R1
(4) (5) (6)
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## **MARKING DIAGRAMS** **==> picture [135 x 61] intentionally omitted <==** **----- Start of picture text -----**
SOT−963 M
CASE 527AD
1
T = Specific Device Code
M = Date Code*
T
**----- End of picture text -----**
*Date Code orientation may vary depending upon manufacturing location. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. **ORDERING INFORMATION** **Device Package Shipping**[†] ~~—~~ NSBC144WPDP6T5G SOT−963 8,000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: **1** © Semiconductor Components Industries, LLC, 2012 **June, 2017 − Rev. 1** **DTC144WP/D** **NSBC144WPDP6** ## **THERMAL CHARACTERISTICS** |**THERMAL CHARACTERISTICS**|||| |---|---|---|---| |**Characteristic**|**Symbol**|**Max**|**Unit**| |**NSBC144WPDP6 (SOT−963) ONE JUNCTION HEATED**|||| |Total Device Dissipation
TA= 25°C
(Note 1)
(Note 2)
Derate above 25°C
(Note 1)
(Note 2)|PD|231
269
1.9
2.2|MW
mW/°C| |Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)|R�JA|540
464|°C/W| |**NSBC144WPDP6 (SOT−963) BOTH JUNCTION HEATED**(Note 3)|||| |Total Device Dissipation
TA= 25°C
(Note 1)
(Note 2)
Derate above 25°C
(Note 1)
(Note 2)|PD|339
408
2.7
3.3|MW
mW/°C| |Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)|R�JA|369
306|°C/W| |Junction and Storage Temperature Range|TJ, Tstg|−55 to +150|°C| 1. FR−4 @ 100 mm[2] , 1 oz. copper traces, still air. 2. FR−4 @ 500 mm[2] , 1 oz. copper traces, still air. 3. Both junction heated values assume total power is sum of two equally powered channels. **www.onsemi.com** **2** ## **NSBC144WPDP6** ## **ELECTRICAL CHARACTERISTICS** (TA = 25 ° C both polarities Q1 (PNP) & Q2 (NPN), unless otherwise noted) |**Characteristic**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**| |---|---|---|---|---|---| |**OFF CHARACTERISTICS**|||||| |Collector-Base Cutoff Current
(VCB= 50 V, IE= 0)|ICBO|−|−|100|nAdc| |Collector-Emitter Cutoff Current
(VCE= 50 V, IB= 0)|ICEO|−|−|500|nAdc| |Emitter-Base Cutoff Current
(VEB= 6.0 V, IC= 0)|IEBO|−|−|0.13|mAdc| |Collector-Base Breakdown Voltage
(IC= 10�A, IE= 0)|V(BR)CBO|50|−|−|Vdc| |Collector-Emitter Breakdown Voltage (Note 4)
(IC= 2.0 mA, IB= 0)|V(BR)CEO|50|−|−|Vdc| |**ON CHARACTERISTICS**|||||| |DC Current Gain (Note 4)
(IC= 5.0 mA, VCE= 10 V)|hFE|80|140|−|| |Collector-Emitter Saturation Voltage (Note 4)
(IC= 10 mA, IB= 0.3 mA)|VCE(sat)|−|−|0.25|V| |Input Voltage (Off)
(VCE= 5.0 V, IC= 100�A) (NPN)
(VCE= 5.0 V, IC= 100�A) (PNP)|Vi(off)|−
−|1.7
1.7|−
−|Vdc| |Input Voltage (On)
(VCE= 0.2 V, IC= 3.0 mA) (NPN)
(VCE= 0.2 V, IC= 3.0 mA) (PNP)|Vi(on)|−
−|2.6
2.7|−
−|Vdc| |Output Voltage (On)
(VCC= 5.0 V, VB= 4.0 V, RL= 1.0 k�)|VOL|−|−|0.2|Vdc| |Output Voltage (Off)
(VCC= 5.0 V, VB= 0.5 V, RL= 1.0 k�)|VOH|4.9|−|−|Vdc| |Input Resistor|R1|32.9|47|61.1|k�| |Resistor Ratio|R1/R2|1.7|2.1|2.6|| 4. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle ≤ 2%. **==> picture [415 x 173] intentionally omitted <==** **----- Start of picture text -----**
250
200
(1)
150
(1) SOT−963; 100 mm [2] , 1 oz. Copper Trace
100
50
0
−50 −25 0 25 50 75 100 125 150
AMBIENT TEMPERATURE ( ° C)
, POWER DISSIPATION (mW)
D
P
**----- End of picture text -----**
**Figure 1. Derating Curve** **www.onsemi.com** **3** **NSBC144WPDP6** ## **TYPICAL CHARACTERISTICS − NPN TRANSISTOR NSBC144WPDP6** **==> picture [491 x 614] intentionally omitted <==** **----- Start of picture text -----**
1
1000
IC/IB = 10 25 ° C VCE = 10 V 25 ° C 150 ° C
100
−55 ° C
0.1 150 ° C
−55 ° C 10
0.01 1
0 10 20 30 40 50 0.1 1 10 100
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) vs. IC Figure 3. DC Current Gain
2.4 100
f = 10 kHz
2 IE = 0 A
TA = 25 ° C 10 −55 ° C
1.6
25 ° C
1.2 1
150 ° C
0.8
0.1
0.4
VO = 5 V
0 0.01
0 10 20 30 40 50 0 4 8 12 16 20 24 28
VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V)
Figure 4. Output Capacitance Figure 5. Output Current vs. Input Voltage
100
25 ° C −55 ° C
10
150 ° C
1
VO = 0.2 V
0.1
0 10 20 30 40 50
IC, COLLECTOR CURRENT (mA)
, DC CURRENT GAIN
FE
h
, COLLECTOR−EMITTER VOLTAGE (V)
CE(sat)
V
, OUTPUT CAPACITANCE (pF)Cob , COLLECTOR CURRENT (mA)IC
, INPUT VOLTAGE (V)
in
V
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**Figure 6. Input Voltage vs. Output Current** **www.onsemi.com** **4** **NSBC144WPDP6** ## **TYPICAL CHARACTERISTICS − PNP TRANSISTOR NSBC144WPDP6** **==> picture [491 x 410] intentionally omitted <==** **----- Start of picture text -----**
10
1000
IC/IB = 10 VCE = 10 V
25 ° C 150 ° C
1 100
−55 ° C
150 ° C
0.1 10
25 ° C
−55 ° C
0.01 1
0 10 20 30 40 50 0.1 1 10 100
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
Figure 7. VCE(sat) vs. IC Figure 8. DC Current Gain
7 100
f = 10 kHz
6 IE = 0 A −55 ° C
TA = 25 ° C 10
5
1
4
25 ° C
3
0.1
2 150 ° C
0.01
1
VO = 5 V
0 0.001
0 10 20 30 40 50 0 4 8 12 16 20 24 28
VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V)
Figure 9. Output Capacitance Figure 10. Output Current vs. Input Voltage
, DC CURRENT GAIN
FE
h
, COLLECTOR−EMITTER VOLTAGE (V)
CE(sat)
V
, OUTPUT CAPACITANCE (pF)Cob , COLLECTOR CURRENT (mA)IC
**----- End of picture text -----**
**==> picture [235 x 171] intentionally omitted <==** **----- Start of picture text -----**
100
25 ° C −55 ° C
10
150 ° C
1
VO = 0.2 V
0.1
0 10 20 30 40 50
IC, COLLECTOR CURRENT (mA)
, INPUT VOLTAGE (V)
in
V
**----- End of picture text -----**
**Figure 11. Input Voltage vs. Output Current** **www.onsemi.com** **5** MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** **SOT−963** CASE 527AD−01 ISSUE E ## DATE 09 FEB 2010 **SCALE 4:1** NOTES: **==> picture [407 x 204] intentionally omitted <==** **----- Start of picture text -----**
D X A 1.
Y Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3.
6 5 4 FINISH THICKNESS. MINIMUM LEAD
E HE BASE MATERIAL.
4.
1 2 3 FLASH, PROTRUSIONS, OR GATE BURRS.
a||4 MILLIMETERS
DIM MIN NOM MAX
TOP VIEW C —> | A 0.34 0.37 0.40
SIDE VIEW b 0.10 0.15 0.20
C 0.07 0.12 0.17
D 0.95 1.00 1.05
e 6X L E 0.75 0.80 0.85
e 0.35 BSC
H E 0.95 1.00 1.05
L 0.19 REF
L2 0.05 0.10 0.15
GENERIC
Et MARKING DIAGRAM*
6X L2 6X b
0.08 X Y
t BOTTOM VIEW o ec o XM
**----- End of picture text -----**
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS |2.|Y14.5M, 1994.
CONTROLLING DIMENSION: MILLIMETERS|Y14.5M, 1994.
CONTROLLING DIMENSION: MILLIMETERS| |---|---|---| |3.
4.
~~|4~~
~~a||44~~|**DIM**
**MIN**
**NOM**
**MAX**
**MILLIMETERS**
MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
~~|4~~
~~a||44~~|| ||**A**
0.34
0.37
0.40|| ||**b**
0.10
0.15
0.20|| ||**C**
0.07
0.12
0.17|| ||**D**
0.95
1.00
1.05|| ||**E**
0.75
0.80
0.85|| ||**e**
0.35 BSC
0.95
1.00
1.05
**HE**
**L**
0.19 REF
**L2**
0.05
0.10
0.15|| - XM - 1 - X = Specific Device Code M = Month Code - STYLE 1: STYLE 2: STYLE 3: PIN 1. EMITTER 1 PIN 1. EMITTER 1 PIN 1. CATHODE 1 2. BASE 1 2. EMITTER2 2. CATHODE 1 3. COLLECTOR 2 3. BASE 2 3. ANODE/ANODE 2 4. EMITTER 2 4. COLLECTOR 2 4. CATHODE 2 5. BASE 2 5. BASE 1 5. CATHODE 2 6. COLLECTOR 1 6. COLLECTOR 1 6. ANODE/ANODE 1 - STYLE 4: STYLE 5: STYLE 6: PIN 1. COLLECTOR PIN 1. CATHODE PIN 1. CATHODE 2. COLLECTOR 2. CATHODE 2. ANODE 3. BASE 3. ANODE 3. CATHODE 4. EMITTER 4. ANODE 4. CATHODE 5. COLLECTOR 5. CATHODE 5. CATHODE 6. COLLECTOR 6. CATHODE 6. CATHODE - STYLE 7: STYLE 8: STYLE 9: PIN 1. CATHODE PIN 1. DRAIN PIN 1. SOURCE 1 2. ANODE 2. DRAIN 2. GATE 1 3. CATHODE 3. GATE 3. DRAIN 2 4. CATHODE 4. SOURCE 4. SOURCE 2 5. ANODE 5. DRAIN 5. GATE 2 6. CATHODE 6. DRAIN 6. DRAIN 1 - *This information is generic. Please refer to device data sheet for actual part marking. - Pb−Free indicator, “G” or microdot “ ”, may or may not be present. **==> picture [124 x 123] intentionally omitted <==** **----- Start of picture text -----**
RECOMMENDED
MOUNTING FOOTPRINT
6X 6X
0.20 “ ie 0.35
PACKAGE
OUTLINE
Oo 1.20
0.35 oe
PITCH
DIMENSIONS: MILLIMETERS
**----- End of picture text -----**
STYLE 10: PIN 1. CATHODE 1 2. N/C 3. CATHODE 2 4. ANODE 2 5. N/C 6. ANODE 1 **DOCUMENT NUMBER: 98AON26456D DESCRIPTION: SOT−963, 1X1, 0.35P** Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. **PAGE 1 OF 1** ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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