# Bipolar (BJT) Single Transistor, PNP, 80 V, 8 A, 20 W, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2724366/)

**URL**: https://novapart.co/products/NJVMJD45H11T4G/bipolar-bjt-single-transistor-pnp-80-v-8-a-20-w-to
**SKU**: NJVMJD45H11T4G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Single Bipolar Junction Transistors - BJT
**Price**: €0.3320
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:PNP; Collector Emitter Voltage V(br)ceo:-80V; Transition Frequency ft:90MHz; Power Dissipation Pd:20W; DC Collector Current:-8A; DC Current Gain hFE:40hFE; Tra

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | Lead (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Product Range | - |
| Qualification | AEC-Q101 |
| Power Dissipation | 20W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | PNP |
| Transition Frequency | 90MHz |
| Transistor Case Style | TO-252 (DPAK) |
| Dc Current Gain Hfe Min | 40hFE |
| Operating Temperature Max | 150°C |
| Continuous Collector Current | 8A |
| Collector Emitter Voltage Max | 80V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2724366/)

**DATA SHEET www.onsemi.com** 

## Complementary Power Transistors 

## **DPAK for Surface Mount Applications** 

## MJD44H11�(NPN), MJD45H11�(PNP) 

Designed for general purpose power and switching such as output or driver stages in applications such as switching regulators, converters, and power amplifiers. 

## **Features** 

- Lead Formed for Surface Mount Application in Plastic Sleeves (No Suffix) 

- Straight Lead Version in Plastic Sleeves (“−1” Suffix) 

- Electrically Similar to Popular D44H/D45H Series 

- Low Collector Emitter Saturation Voltage 

- Fast Switching Speeds 

- Complementary Pairs Simplifies Designs 

- Epoxy Meets UL 94 V−0 @ 0.125 in 

- NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

**MAXIMUM RATINGS** (TA = 25 � C, common for NPN and PNP, minus sign, “−”, for PNP omitted, unless otherwise noted) 

|**Rating**|**Symbol**|**Max**|**Unit**|
|---|---|---|---|
|Collector−Emitter Voltage|VCEO|80|Vdc|
|Emitter−Base Voltage|VEB|5|Vdc|
|Collector Current − Continuous|IC|8|Adc|
|Collector Current − Peak|ICM|16|Adc|
|Total Power Dissipation<br>@ TC= 25°C<br>Derate above 25°C|PD|20<br>0.16|W<br>W/°C|
|Total Power Dissipation (Note 1)<br>@ TA= 25°C<br>Derate above 25°C|PD|1.75<br>0.014|W<br>W/°C|
|Operating and Storage Junction<br>Temperature Range|TJ, Tstg|−55 to +150|°C|
|ESD − Human Body Model|HBM|3B|V|
|ESD − Machine Model|MM|C|V|



## **SILICON POWER TRANSISTORS 8 AMPERES 80 VOLTS, 20 WATTS** 

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**----- Start of picture text -----**<br>
COMPLEMENTARY<br>COLLECTOR COLLECTOR<br>2, 4 2, 4<br>1 1<br>BASE BASE<br>3 3<br>EMITTER EMITTER<br>**----- End of picture text -----**<br>


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4<br>4 4<br>1<br>1 [2] 3 1 2 3 2 3<br>DPAK DPAK IPAK<br>CASE 369C CASE 369G CASE 369D<br>STYLE 1 STYLE 1 STYLE 1<br>**----- End of picture text -----**<br>


## **MARKING DIAGRAMS** 

AYWW AYWW J4 J4 xH11G xH11G DPAK IPAK A = Assembly Location Y = Year WW = Work Week J4xH11 = Device Code x = 4 or 5 G = Pb−Free Package 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. 

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

1. These ratings are applicable when surface mounted on the minimum pad sizes recommended. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2016 **August, 2021 − Rev. 21** 

**MJD44H11/D** 

**MJD44H11 (NPN), MJD45H11 (PNP)** 

## **THERMAL CHARACTERISTICS** 

|**THERMAL CHARACTERISTICS**||||
|---|---|---|---|
|**Characteristic**|**Symbol**|**Max**|**Unit**|
|Thermal Resistance, Junction−to−Case|R�JC|6.25|°C/W|
|Thermal Resistance, Junction−to−Ambient (Note 2)|R�JA|71.4|°C/W|
|Lead Temperature for Soldering|TL|260|°C|



2. These ratings are applicable when surface mounted on the minimum pad sizes recommended. 

## **ELECTRICAL CHARACTERISTICS** 

(TA = 25 � C, common for NPN and PNP, minus sign, “−”, for PNP omitted, unless otherwise noted) 

|**Characteristic**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|
|**OFF CHARACTERISTICS**||||||
|Collector−Emitter Sustaining Voltage<br>(IC= 30 mA, IB= 0)|VCEO(sus)|80|−|−|Vdc|
|Collector Cutoff Current<br>(VCE= Rated VCEO, VBE= 0)|ICES|−|−|1.0|�A|
|Emitter Cutoff Current<br>(VEB= 5 Vdc)|IEBO|−|−|1.0|�A|
|**ON CHARACTERISTICS**||||||
|Collector−Emitter Saturation Voltage<br>(IC= 8 Adc, IB= 0.4 Adc)|VCE(sat)|−|−|1|Vdc|
|Base−Emitter Saturation Voltage<br>(IC= 8 Adc, IB= 0.8 Adc)|VBE(sat)|−|−|1.5|Vdc|
|DC Current Gain<br>(VCE= 1 Vdc, IC= 2 Adc)<br>(VCE= 1 Vdc, IC= 4 Adc)|hFE|60<br>40|−<br>−|−<br>−|−|
|**DYNAMIC CHARACTERISTICS**||||||
|Collector Capacitance<br>(VCB= 10 Vdc, ftest= 1 Mhz)<br>MJD44H11<br>MJD45H11|Ccb|−<br>−|45<br>130|−<br>−|pF|
|Gain Bandwidth Product<br>(IC= 0.5 Adc, VCE= 10 Vdc, f = 20 Mhz)<br>MJD44H11<br>MJD45H11|fT|−<br>−|85<br>90|−<br>−|MHz|
|**SWITCHING TIMES**||||||
|Delay and Rise Times<br>(IC= 5 Adc, IB1= 0.5 Adc)<br>MJD44H11<br>MJD45H11|td+ tr|−<br>−|300<br>135|−<br>−|ns|
|Storage Time<br>(IC= 5 Adc, IB1= IB2= 0.5 Adc)<br>MJD44H11<br>MJD45H11|ts|−<br>−|500<br>500|−<br>−|ns|
|Fall Time<br>(IC= 5 Adc, IB1= IB2= 0.5 Adc)<br>MJD44H11<br>MJD45H11|tf|−<br>−|140<br>100|−<br>−|ns|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

**www.onsemi.com** 

**2** 

**MJD44H11 (NPN), MJD45H11 (PNP)** 

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**----- Start of picture text -----**<br>
1<br>0.7<br>D = 0.5<br>0.5<br>0.3<br>0.2<br>0.2 0.1 R�JC(t) = r(t) R�JC P(pk)<br>0.1 R�JC = 6.25°C/W MAX<br>0.05 D CURVES APPLY FOR POWER<br>0.07<br>0.05 0.02 PULSE TRAIN SHOWN READ TIME AT t 1 t 1 t2<br>0.03 0.01 T J(pk) - T C  = P (pk) � JC(t) DUTY CYCLE, D = t1/t2<br>0.02 SINGLE PULSE<br>0.01<br>0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10 20 30 50 100 200 300 500 1 k<br>t, TIME (ms)<br>RESISTANCE (NORMALIZED)<br>r(t), EFFECTIVE TRANSIENT THERMAL<br>**----- End of picture text -----**<br>


**Figure 1. Thermal Response** 

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20<br>10 500��s 100��s<br>5<br>3 dc 5�ms 1�ms<br>2<br>1<br>0.5 THERMAL LIMIT @ TC = 25°C<br>0.3 WIRE BOND LIMIT<br>0.1<br>0.05<br>0.02<br>1 3 5 7 10 20 30 50 70 100<br>VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)<br>IC, COLLECTOR CURRENT (AMP)<br>**----- End of picture text -----**<br>


There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. 

The data of Figure 2 is based on TJ(pk) = 150�C; TC is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided TJ(pk) ≤ 150�C.  TJ(pk) may be calculated from the data in Figure 1. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 

**Figure 2. Maximum Forward Bias Safe Operating Area** 

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TA TC<br>2.5 25<br>2 20<br>TC<br>1.5 15<br>1 10 TA<br>SURFACE<br>MOUNT<br>0.5 5<br>0 0<br>25 50 75 100 125 150<br>T, TEMPERATURE (°C)<br>PD, POWER DISSIPATION (WATTS)<br>**----- End of picture text -----**<br>


**Figure 3. Power Derating** 

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**3** 

**MJD44H11 (NPN), MJD45H11 (PNP)** 

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1000<br>VCE = 1 V<br>150 ° C<br>25 ° C<br>−55 ° C<br>100<br>10<br>0.01 0.1 1 10<br>IC, COLLECTOR CURRENT (A)<br>, DC CURRENT GAIN<br>FE<br>h<br>**----- End of picture text -----**<br>


**Figure 4. MJD44H11 DC Current Gain** 

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**----- Start of picture text -----**<br>
1000<br>VCE = 4 V<br>150 ° C<br>25 ° C<br>−55 ° C<br>100<br>10<br>0.01 0.1 1 10<br>IC, COLLECTOR CURRENT (A)<br>Figure 6. MJD44H11 DC Current Gain<br>0.8<br>0.7 IC/IB = 20<br>150 ° C<br>0.6<br>0.5<br>0.4<br>0.3 25 ° C<br>0.2<br>−55 ° C<br>0.1<br>0<br>0.01 0.1 1 10<br>IC, COLLECTOR CURRENT (A)<br>, DC CURRENT GAIN<br>FE<br>h<br>, COLL−EMIT SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>**----- End of picture text -----**<br>


**Figure 8. MJD44H11 Saturation Voltage V CE(sat)** 

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1000<br>VCE = 1 V<br>150 ° C<br>25 ° C<br>−55 ° C<br>100<br>10<br>0.01 0.1 1 10<br>IC, COLLECTOR CURRENT (A)<br>, DC CURRENT GAIN<br>FE<br>h<br>**----- End of picture text -----**<br>


**Figure 5. MJD45H11 DC Current Gain** 

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1000<br>VCE = 4 V<br>150 ° C<br>25 ° C<br>−55 ° C<br>100<br>10<br>0.01 0.1 1 10<br>IC, COLLECTOR CURRENT (A)<br>Figure 7. MJD45H11 DC Current Gain<br>0.8<br>0.7 IC/IB = 20<br>−55 ° C<br>0.6<br>0.5<br>0.4<br>25 ° C<br>0.3<br>150 ° C<br>0.2<br>0.1<br>0<br>0.01 0.1 1 10<br>IC, COLLECTOR CURRENT (A)<br>, DC CURRENT GAIN<br>FE<br>h<br>, COLL−EMIT SATURATION VOLTAGE (V)<br>CE(sat)<br>V<br>**----- End of picture text -----**<br>


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Figure 9. MJD45H11 Saturation Voltage<br>V<br>CE(sat)<br>**----- End of picture text -----**<br>


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**4** 

**MJD44H11 (NPN), MJD45H11 (PNP)** 

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**----- Start of picture text -----**<br>
1.4 1.4<br>1.2 1.2<br>1.0 1.0<br>−55 ° C −55 ° C<br>0.8 0.8<br>25 ° C 25 ° C<br>0.6 0.6<br>150 ° C 150 ° C<br>0.4 0.4<br>0.2 IC/IB = 20 0.2 IC/IB = 20<br>0 0<br>0.01 0.1 1 10 0.01 0.1 1 10<br>IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A)<br>Figure 10. MJD44H11 Saturation Voltage Figure 11. MJD45H11 Saturation Voltage<br>V V<br>BE(sat) BE(sat)<br>2.0 2.0<br>1.8 TA = 25 ° C 1.8 TA = 25 ° C<br>1.6 1.6<br>1.4 1.4<br>1.2 1.2<br>1.0 1.0<br>0.8 0.8<br>IC = 8 A<br>0.6 0.6<br>IC = 8 A<br>0.4 0.4 IC = 3 A<br>0.2 IC = 0.1 A 0.5 A 1 A IC = 3 A 0.2 IC = 0.1 A 0.5 A 1 A<br>0 0<br>0.1 1 10 100 1000 10,000 0.1 1 10 100 1000 10,000<br>IB, BASE CURRENT (mA) IB, BASE CURRENT (mA)<br>VOLTAGE (V) VOLTAGE (V)<br>, BASE−EMIT SATURATION , BASE−EMIT SATURATION<br>BE(sat) BE(sat)<br>V V<br>, COLLECTOR−EMITTER VOLTAGE (V) , COLLECTOR−EMITTER VOLTAGE (V)<br>CE CE<br>V V<br>**----- End of picture text -----**<br>


**Figure 12. MJD44H11 Collector Saturation Region** 

**Figure 13. MJD45H11 Collector Saturation Region** 

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1000 1000<br>Cob<br>Cob<br>100 100<br>10 10<br>0.1 1 10 100 0.1 1 10 100<br>VR, REVERSE VOLTAGE (V) VR, REVERSE VOLTAGE (V)<br>C, CAPACITANCE (pF) C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**Figure 14. MJD44H11 Capacitance** 

**Figure 15. MJD45H11 Capacitance** 

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**5** 

## **MJD44H11 (NPN), MJD45H11 (PNP)** 

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**----- Start of picture text -----**<br>
100 100<br>VCE = 2 V VCE = 2 V<br>10 10<br>0.01 0.1 1 10 0.01 0.1 1 10<br>IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A)<br>Figure 16. MJD44H11 Figure 17. MJD45H11<br>Current−Gain−Bandwidth Product Current−Gain−Bandwidth Product<br>PRODUCT PRODUCT<br>, CURRENT−GAIN−BANDWIDTH , CURRENT−GAIN−BANDWIDTH<br>fTau fTau<br>**----- End of picture text -----**<br>


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**6** 

**MJD44H11 (NPN), MJD45H11 (PNP)** 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**||||
|---|---|---|---|
|**Device**|**Package Type**|**Package**|**Shipping**†|
|MJD44H11G|DPAK<br>(Pb−Free)|369C|75 Units / Rail|
|NJVMJD44H11G|DPAK<br>(Pb−Free)|369C|75 Units / Rail|
|MJD44H11−1G|DPAK−3<br>(Pb−Free)|369D|75 Units / Rail|
|MJD44H11RLG|DPAK<br>(Pb−Free)|369C|1,800 / Tape & Reel|
|NJVMJD44H11RLG*|DPAK<br>(Pb−Free)|369C|1,800 / Tape & Reel|
|MJD44H11T4G|DPAK<br>(Pb−Free)|369C|2,500 / Tape & Reel|
|NJVMJD44H11T4G*|DPAK<br>(Pb−Free)|369C|2,500 / Tape & Reel|
|MJD44H11T5G|DPAK<br>(Pb−Free)|369C|2,500 / Tape & Reel|
|MJD45H11G|DPAK<br>(Pb−Free)|369C|75 Units / Rail|
|NJVMJD45H11G*|DPAK<br>(Pb−Free)|369C|75 Units / Rail|
|MJD45H11−1G|DPAK−3<br>(Pb−Free)|369D|75 Units / Rail|
|MJD45H11RLG|DPAK<br>(Pb−Free)|369C|1,800 / Tape & Reel|
|NJVMJD45H11RLG*|DPAK<br>(Pb−Free)|369C|1,800 / Tape & Reel|
|MJD45H11T4G|DPAK<br>(Pb−Free)|369C|2,500 / Tape & Reel|
|NJVMJD45H11T4G*|DPAK<br>(Pb−Free)|369C|2,500 / Tape & Reel|
|NJVMJD44H11D3T4G*|DPAK<br>(Pb−Free)|369G|2,500 / Tape & Reel|
|NJVMJD45H11D3T4G*|DPAK<br>(Pb−Free)|369G|2,500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

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**7** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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**----- Start of picture text -----**<br>
IPAK<br>CASE 369D−01<br>ISSUE C<br>,<br>B C NOTES:<br>SCALE 1:1 1. DIMENSIONING AND TOLERANCING PER<br>V R E ANSI Y14.5M, 1982.<br>2. CONTROLLING DIMENSION: INCH.<br>INCHES MILLIMETERS<br>4 Z DIM MIN MAX MIN MAX<br>A 0.235 0.245 5.97 6.35<br>S i s A q leo B 0.250 0.265 6.35 6.73<br>1 2 3 C 0.086 0.094 2.19 2.38<br>D 0.027 0.035 0.69 0.88<br>E 0.018 0.023 0.46 0.58<br>−T− F 0.037 0.045 0.94 1.14<br>SEATING G 0.090 BSC 2.29 BSC<br>PLANE K H 0.034 0.040 0.87 1.01<br>J 0.018 0.023 0.46 0.58<br>K 0.350 0.380 8.89 9.65<br>R 0.180 0.215 4.45 5.45<br>J S 0.025 0.040 0.63 1.01<br>F<br>H V 0.035 0.050 0.89 1.27<br>Z 0.155 −−− 3.93 −−−<br>D 3 PL<br>aE G 0.13 (0.005) M 1 T<br>MARKING<br>DIAGRAMS<br>STYLE 1:PIN 1. BASE STYLE 2:PIN 1. GATE STYLE 3:PIN 1. ANODE STYLE 4:PIN 1. CATHODE Integrated<br>2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE Discrete Circuits<br>3. EMITTER 3. SOURCE 3. ANODE 3. GATE<br>4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE<br>YWW xxxxx<br>STYLE 5: STYLE 6: STYLE 7: xxxxxxxx ALYWW<br>PIN 1. GATE PIN 1. MT1 PIN 1. GATE<br>2. ANODE 2. MT2 2. COLLECTOR x<br>3. CATHODE 3. GATE 3. EMITTER<br>4. ANODE 4. MT2 4. COLLECTOR<br>4 00<br>xxxxxxxxx = Device Code<br>A = Assembly Location<br>lL = Wafer Lot<br>Y =  Year<br>WW = Work Week<br>**----- End of picture text -----**<br>


DATE 15 DEC 2010 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON10528D** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: IPAK (DPAK INSERTION MOUNT) PAGE 1 OF 1** ~~—~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ~~ee~~ ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2019 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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**----- Start of picture text -----**<br>
4 DPAK (SINGLE GAUGE)<br>CASE 369C<br>ISSUE F<br>1 [2]<br>DATE 21 JUL 2015<br>3<br>SCALE 1:1<br>NOTES:<br>A 1. DIMENSIONING AND TOLERANCING PER ASME<br>Y14.5M, 1994.<br>E C 2. CONTROLLING DIMENSION: INCHES.<br>A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-<br>b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.<br>FLASH, PROTRUSIONS, OR BURRS. MOLD<br>FLASH, PROTRUSIONS, OR GATE BURRS SHALL<br>4 NOT EXCEED 0.006 INCHES PER SIDE.<br>L3 Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE<br>D DETAIL A H OUTERMOST EXTREMES OF THE PLASTIC BODY.<br>6. DATUMS A AND B ARE DETERMINED AT DATUM<br>1 2 3 PLANE H.<br>7. OPTIONAL MOLD FEATURE.<br>L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX<br>b2 c BOTTOM VIEW A 0.086 0.094 2.18 2.38<br>e SIDE VIEW A1 0.000 0.005 0.00 0.13<br>b b 0.025 0.035 0.63 0.89<br>TOP VIEW 0.005 (0.13) M C b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46<br>c 0.018 0.024 0.46 0.61<br>c2 0.018 0.024 0.46 0.61<br>H Z Z D 0.235 0.245 5.97 6.22<br>E 0.250 0.265 6.35 6.73<br>e 0.090 BSC 2.29 BSC<br>L2 [GAUGE] PLANE C SEATINGPLANE H 0.370 0.410 9.40 10.41<br>L 0.055 0.070 1.40 1.78<br>L1 0.114 REF 2.90 REF<br>L2 0.020 BSC 0.51 BSC<br>L L3 0.035 0.050 0.89 1.27<br>A1 BOTTOM VIEW L4 −−− 0.040 −−− 1.01<br>L1 CONSTRUCTIONSALTERNATE Z 0.155 −−− 3.93 −−−<br>DETAIL A<br>ROTATED 90  CW � GENERIC<br>MARKING DIAGRAM*<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:<br>PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE<br>2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE<br>3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE<br>4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE XXXXXXG AYWW<br>ALYWW XXX<br>STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: XXXXXG<br>PIN 1. MT1 PIN 1. GATE PIN 1. N/C PIN 1. ANODE PIN 1. CATHODE<br>2. MT2 2. COLLECTOR 2. CATHODE 2. CATHODE 2. ANODE<br>3. GATE 3. EMITTER 3. ANODE 3. RESISTOR ADJUST 3. CATHODE<br>4. MT2 4. COLLECTOR 4. CATHODE 4. CATHODE 4. ANODE<br>IC Discrete<br>SOLDERING FOOTPRINT* XXXXXX = Device Code<br>6.20 3.00 A = Assembly Location<br>0.244 0.118 L = Wafer Lot<br>2.58 Y =  Year<br>0.102 WW = Work Week<br>G = Pb−Free Package<br>5.80<br>1.60 6.17 *This information is generic. Please refer to<br>0.228<br>0.063 0.243 device data sheet for actual part marking.<br>Pb−Free indicator, “G” or microdot “ � ”, may<br>or may not be present. Some products may<br>not follow the Generic Marking.<br>SCALE 3:1<br>� inches [mm] �<br>**----- End of picture text -----**<br>


- *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

## **DOCUMENT NUMBER: 98AON10527D** 

**DESCRIPTION: DPAK (SINGLE GAUGE)** 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

**PAGE 1 OF 1** 

**onsemi** and                     are trademarks of Semiconductor Components Industries, LLC dba **onsemi** or its subsidiaries in the United States and/or other countries. **onsemi** reserves the right to make changes without further notice to any products herein. **onsemi** makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. **onsemi** does not convey any license under its patent rights nor the rights of others. 

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© Semiconductor Components Industries, LLC, 2018 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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4<br>1 ><br>2<br>3<br>SCALE 1:1<br>**----- End of picture text -----**<br>


**DPAK−3, SURFACE MOUNT** CASE 369G−01 ISSUE O DATE 23 DEC 2003 

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−T− SEATING<br>PLANE<br>B C<br>V R E<br>4<br>i= Z<br>A<br>1 2 3<br>U<br>K<br>F<br>L J<br>G H<br>ni D 2 PL e<br>0.13 (0.005) T<br>**----- End of picture text -----**<br>


|**DIM**|**INCHES**|**INCHES**|**MILLIMETERS**|**MILLIMETERS**|
|---|---|---|---|---|
||**MIN**<br>**INCHES**|**MAX**<br>**INCHES**|**MIN**<br>**MILLIMETERS**|**MAX**<br>**MILLIMETERS**|
|**DIM**<br>**A**|**MIN**<br>0.235|**MAX**<br>0.245|**MIN**<br>5.97|**MAX**<br>6.22|
|**B**|0.250|0.265|6.35|6.73|
|**C**|0.086|0.094|2.19|2.38|
|**C**<br>**D**|0.086<br>0.027|0.094<br>0.035|2.19<br>0.69|2.38<br>0.88|
|**E**|0.018|0.023|0.46|0.58|
|**E**<br>**F**|0.018<br>0.037|0.023<br>0.045|0.46<br>0.94|0.58<br>1.14|
|**G**|0.180 BSC||4.58 BSC||
|**G**<br>**H**|0.180 BSC<br>0.034|0.180 BSC<br>0.040|4.58 BSC<br>0.87|4.58 BSC<br>1.01|
|**J**|0.018|0.023|0.46|0.58|
|**K**<br>**L**|0.102<br>0.114<br>0.090 BSC||2.60<br>2.89<br>2.29 BSC||
|**R**<br>**L**|0.180<br>0.215<br>0.090 BSC||4.57<br>5.45<br>2.29 BSC||
|**U**|0.020|−−−|0.51|−−−|
|**V**|0.035|0.050|0.89|1.27|
|**Z**|0.155|−−−|3.93|−−−|



- STYLE 1: STYLE 2: STYLE 3: STYLE 4: PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE 2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 3. EMITTER 3. SOURCE 3. ANODE 3. GATE 4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 

- STYLE 5: STYLE 6: STYLE 7: PIN 1. GATE PIN 1. MT1 PIN 1. GATE 2. ANODE 2. MT2 2. COLLECTOR 3. CATHODE 3. GATE 3. EMITTER 4. ANODE 4. MT2 4. COLLECTOR 

**GENERIC MARKING DIAGRAM*** YWW xxxxxxxx ~~|~~ xxxxxxxxx = Device Code Y =  Year WW = Work Week 

*This information is generic. Please refer to device data sheet for actual part marking. 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON13702D** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: DPAK−3, SURFACE MOUNT PAGE 1 OF 1** ~~SS~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

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---

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