# Power MOSFET, P Channel, 30 V, 5.9 A, 0.05 ohm, SOT-223, Surface Mount

![Product image](https://novapart.co/image/farnell:1467998/)

**URL**: https://novapart.co/products/NDT454P/power-mosfet-p-channel-30-v-59-a-005-ohm-sot-223
**SKU**: NDT454P
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5880
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 4Pins |
| Channel Type | P Channel |
| Power Dissipation | 3W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | P Channel |
| Power Dissipation Pd | 3W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.05ohm |
| Transistor Case Style | SOT-223 |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 5.9A |
| Drain Source On State Resistance | 0.05ohm |
| Gate Source Threshold Voltage Max | 2.7V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1467998/)

## **Is Now Part of** 

**To learn more about ON Semiconductor, please visit our website at www.onsemi.com** 

ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

June 1996 

## **NDT454P P-Channel Enhancement Mode Field Effect Transistor** 

## **General Description** 

## **Features** 

- -5.9A,  -30V. RDS(ON) = 0.05Ω @ VGS = -10V RDS(ON) = 0.07Ω @ VGS = -6V RDS(ON) = 0.09Ω @ VGS = -4.5V. 

Power SOT P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. 

- High density cell design for extremely low RDS(ON). 

- High power and current handling capability in a widely used surface mount package. 

## ____________________________________________________________________________________________ 

**==> picture [65 x 69] intentionally omitted <==**

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D<br>G D S<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
D<br>G S<br>**----- End of picture text -----**<br>


## **Absolute Maximum Ratings** TA = 25°C unless otherwise noted 

|**Absolute Maximum Ratings**|**Absolute Maximum Ratingsgss**TA = 25°C unless otherwise notedA = 25°C unless otherwise noted= 25°C unless otherwise noted|TA = 25°C unless otherwise notedA = 25°C unless otherwise noted= 25°C unless otherwise noted|
|---|---|---|
|**Symbol**|**Parameter**|**NDT454P**|
|VDSS|Drain-Source Voltage|-30|
|VGSS|Gate-Source Voltage|±20|
|ID|Drain Current - Continuous(Note 1a)<br>-  Pulsed|±5.9|
|||±15|
|PD|Maximum Power Dissipation(Note 1a)<br>(Note 1b)<br>(Note 1c)|3|
|||1.3|
|||1.1|
|TJ,TSTG|Operating and Storage Temperature Range|-65 to 150|



- Order option J23Z  for cropped center drain lead. 

NDT454P Rev. D2 

© 1997 Fairchild Semiconductor Corporation 

**Electrical Characteristics** (TA = 25°C unless otherwise noted) 

|**Electrica**|**l Characteristics **(TA= 25°C unles|s otherwise noted)||||||
|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Units**|
|**OFF CHARACTERISTICS**||||||||
|BVDSS|Drain-Source Breakdown Voltage|VGS=  0 V, ID=  -250 µA||-30|||V|
|IDSS|Zero Gate Voltage  Drain Current|VDS=  -24 V, VGS=  0 V||||-1|µA|
|||VDS=  -15 V, VGS=  0 V|TJ= 70°C|||-5|µA|
|IGSSF|Gate - Body Leakage, Forward|VGS=  20 V, VDS=  0 V||||100|nA|
|IGSSR|Gate - Body Leakage, Reverse|VGS=  -20 V, VDS=  0 V||||-100|nA|
|**ON CHARACTERISTICS**(Note 2)||||||||
|VGS(th)|Gate Threshold Voltage|VDS=  VGS,  ID=  -250 µA||-1|-2.7||V|
|RDS(ON)|Static Drain-Source On-Resistance|VGS=  -10 V,  ID= -5.9 A|||0.038|0.05|Ω|
|||VGS=  -6 V,  ID= -5.2 A|||0.046|0.07||
|||VGS=  -4.5 V,  ID=  -4.6 A|||0.064|0.09||
|ID(on)|On-State Drain Current|VGS=  -10 V, VDS=  -5 V||-15|||A|
|||VGS= -4.5, VDS= -5V||-5||||
|gFS|Forward Transconductance|VDS= 15 V, ID=  5.9 A|||10||S|
|**DYNAMIC CHARACTERISTICS**||||||||
|Ciss|Input Capacitance|VDS= 15 V,  VGS= 0 V,|||950||pF|
|Coss|Output Capacitance|f = 1.0 MHz|||610||pF|
|Crss|Reverse Transfer Capacitance||||220||pF|
|**SWITCHING CHARACTERISTICS**(Note 2)||||||||
|tD(on)|Turn - On Delay Time|VDD=  -15 V,  ID=  -1 A,|||10|30|ns|
|tr|Turn - On Rise Time|VGEN=  -10 V, RGEN=  6Ω|||18|60|ns|
|tD(off)|Turn - Off Delay Time||||80|120|ns|
|tf|Turn - Off Fall Time||||45|100|ns|
|Qg|Total Gate Charge|VDS= -15 V,|||29|40|nC|
|Qgs|Gate-Source Charge|ID=  -5.9 A,  VGS= -10 V|||3|||
|Qgd|Gate-Drain Charge||||11|||



NDT454P Rev. D2 

**Electrical Characteristics** (TA = 25°C unless otherwise noted) 

|**Electrica**|**Electrica**|**l Characteristics **(TA= 25°C unless o|**l Characteristics **(TA= 25°C unless o|**l Characteristics **(TA= 25°C unless o|**l Characteristics **(TA= 25°C unless o|therwise noted)|||||
|---|---|---|---|---|---|---|---|---|---|---|
|**Symbol**||**Parameter**||||**Conditions**|**Min**|**Typ**|**Max**|**Units**|
|**DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS**|||||||||||
|IS||Maximum Continuous Drain-Source Diode Forward Current|||||||-1.9|A|
|VSD||Drain-Source Diode Forward Voltage||||VGS= 0 V,  IS= -5.9 A (Note 2)||-0.8|5<br>-1.3|V|
|trr||Reverse Recovery Time||||VGS= 0V, IF= -5.9 A, dIF/dt = 100 A/µs|||100|ns|
|Notes:<br>1. RθJAis the sum of the<br>design while RθCAis d<br>_PD_(_t_) =<br>_TJ_−_TA_<br>_R_θ_JA_(_t_)<br>=<br>Typical RθJAusing th<br>a. 42<br>oC/W<br>b. 95<br>oC/W<br>c. 110<br>oC/W<br>Scale 1 : 1<br>2. Pulse Test: Pulse Wid<br>1a||||junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJCis guaranteed by<br>etermined by the user's board design.<br>_TJ_−_TA_<br>_R_θ_JC_+_R_θ_CA_(_t_)<br>=_I D_<br>2 (_t_) ×_RDS_(_ON_ ) _TJ_<br>e board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:<br>when mounted on a 1 in<br>2pad of 2oz copper.<br>when mounted on a 0.066 in<br>2pad of 2oz copper.<br>when mounted on a 0.0123 in<br>2pad of 2oz copper.<br>on letter size paper<br>th<<br> 300µs, Duty Cycle<<br> 2.0%.<br>1b<br>1c|||||||
|||||e board layouts s<br>when mounted o<br>when mounted o<br>when mounted|||||||
||1a||||||||||
||||||||||||
||||||||||||
||||1<br>id||||||||



NDT454P Rev. D2 

## **Typical Electrical Characteristics** 

**==> picture [432 x 526] intentionally omitted <==**

**----- Start of picture text -----**<br>
-30 3<br>V    =-10VGS -6.0<br> -5.0<br>-25  -4.5 2.5 V      = -3.5VGS<br>-20  -4.0 2 -4.0V<br> -4.5V<br>-15<br> -5.0V<br> -3.5<br>1.5<br>-10 -6.0V<br> -3.0<br>1  -10V<br>-5<br>0 0.5<br>0 -1 -2 -3 -4 -5 0 -4 -8 -12 -16 -20<br>V     , DRAIN-SOURCE VOLTAGE (V)DS I    , DRAIN CURRENT (A)D<br>Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation<br>with Drain Current and Gate Voltage.<br>1.6 2<br>I   = -5.9AD V     = -10VGS<br>1.4 V     = -10V GS<br>1.5 T  = 125°CJ<br>1.2<br>1  25°C<br>1<br>0.8   -55°C<br>0.6 0.5<br>-50 -25 0 25 50 75 100 125 150 0 -5 -10 -15 -20<br>T  , JUNCTION TEMPERATURE (°C) J I    , DRAIN CURRENT (A)D<br>Figure 3. On-Resistance Variation  Figure 4. On-Resistance Variation<br>with Temperature. with Drain Current and Temperature.<br>-20 1.2<br>V     = -10VDS T  = -55°CJ 25 125 1.1 V    = VDS GS<br>-16 I    = -250µAD<br>1<br>-12<br>0.9<br>-8<br>0.8<br>-4<br>0.7<br>0 0.6<br>-1 -2 -3 -4 -5 -50 -25 0 25 50 75 100 125 150<br>-V     , GATE TO SOURCE VOLTAGE (V)GS T  , JUNCTION TEMPERATURE (°C)J<br>DS(on)<br>R           , NORMALIZED<br>I    , DRAIN-SOURCE CURRENT (A)D DRAIN-SOURCE ON-RESISTANCE<br>R            , NORMALIZEDDS(ON) R           , NORMALIZEDDS(on)<br>DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE ON-RESISTANCE<br>th<br>V    , NORMALIZED<br>-I   , DRAIN CURRENT (A)<br>GATE-SOURCE THRESHOLD VOLTAGE<br>D<br>**----- End of picture text -----**<br>


**Figure 5. Transfer Characteristics.** 

**Figure 6. Gate Threshold Variation with Temperature.** 

NDT454P Rev. D2 

## **Typical Electrical Characteristics (continued)** 

**==> picture [217 x 343] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.1<br>I    = -250µAD<br>1.08<br>1.06<br>1.04<br>1.02<br>1<br>0.98<br>0.96<br>0.94<br>-50 -25 0 25 50 75 100 125 150<br>T    , JUNCTION TEMPERATURE (°C)J<br>Figure 7. Breakdown Voltage<br>Variation with Temperature.<br>3000<br>2000<br>C  iss<br>1000<br>C  oss<br>500<br>300<br>f = 1 MHz C  rss<br>200<br>V     = 0VGS<br>100<br>0.1 0.3 1 3 10 30<br>-V     , DRAIN TO SOURCE VOLTAGE (V)DS<br>BV        , NORMALIZED<br>DRAIN-SOURCE BREAKDOWN VOLTAGE<br>CAPACITANCE (pF)<br>DSS<br>**----- End of picture text -----**<br>


**Figure 9. Capacitance Characteristics.** 

**==> picture [225 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
-VDD<br>R<br>VIN  L<br>D V<br>OUT<br>V<br>GS<br>R<br>GEN DUT<br>G<br>S<br>**----- End of picture text -----**<br>


**Figure 11. Switching Test Circuit.** 

**==> picture [192 x 125] intentionally omitted <==**

**----- Start of picture text -----**<br>
20<br>10 V     GS = 0V<br>5<br>1<br>T  = 125J °C<br>25°C<br>0.1 -55°C<br>0.01<br>0.001<br>0 0.3 0.6 0.9 1.2 1.5<br>-V     , BODY DIODE FORWARD VOLTAGE (V)SD<br>-I    , REVERSE DRAIN CURRENT (A)<br>S<br>**----- End of picture text -----**<br>


**Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature.** 

**==> picture [212 x 343] intentionally omitted <==**

**----- Start of picture text -----**<br>
10<br>I    = -5.9AD V    = -10VDS -15V<br>-20V<br>8<br>6<br>4<br>2<br>0<br>0 10 20 30 40<br>Q    , GATE CHARGE (nC)g<br>Figure 10. Gate Charge Characteristics.<br>t t<br>on off<br>t d(on) t r td(off) t f<br>90% 90%<br>V<br>OUT<br>10% 10%<br>90%<br>V IN 50% 50%<br>10%<br> PULSE WIDTH  INVERTED<br>GS<br>-V      , GATE-SOURCE VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 12. Switching Waveforms.** 

NDT454P Rev. D2 

## **Typical Electrical and ThermalCharacteristics (continued)** 

**==> picture [430 x 342] intentionally omitted <==**

**----- Start of picture text -----**<br>
20 3.5<br>V     = -15VDS T  = -55°CJ 3 1a<br>16<br> 25°C<br>2.5<br>12<br> 125°C 2<br>8<br>1.5<br>1b<br>4 1 1c 4.5T   = 25  CA "x5" FRo -4 Board<br>Still Air<br>0 0 -5 -10 -15 -20 0.5 0 0.22oz COPPER MOUNTING PAD AREA (in   )0.4 0.6 20.8 1<br>I   , DRAIN CURRENT (A)D<br>Figure 13. Transconductance Variation with Drain Figure 14. SOT-223 Maximum Steady-State Power<br>Current and Temperature. Dissipation versus Copper Mounting Pad<br>Area.<br>7 30<br>10<br>6 1a<br>3<br>5<br>1<br>4 1b 0.3<br>1c V     = -10V GS<br>0.1 SINGLE PULSE<br>3 4.5"x5" FR-4 BoardT   = 25  CStill AirA o 0.03 R      = See Note 1cθ [JA] T    = 25°C A<br>2 V    = -10VGS 0.01<br>0 0.2 0.4 0.6 0.8 1 0.1 0.2 0.5 1 2 5 10 30 50<br>2oz COPPER MOUNTING PAD AREA (in   )2 - V     , DRAIN-SOURCE VOLTAGE (V)DS<br>100us<br>1ms<br>10ms<br>100ms<br> 1s<br>10s<br> DC<br>RDS(ON) LIMIT<br>g    , TRANSCONDUCTANCE (SIEMENS) FS STEADY-STATE POWER DISSIPATION (W)<br>D<br>-I   , DRAIN CURRENT (A)<br>I    , STEADY-STATE DRAIN CURRENT (A)D<br>**----- End of picture text -----**<br>


**Figure 13. Transconductance Variation with Drain Current and Temperature.** 

**Figure 15. Maximum Steady-State Drain Current versus Copper Mounting Pad Area.** 

**Figure 16. Maximum Safe Operating Area.** 

**==> picture [451 x 139] intentionally omitted <==**

**----- Start of picture text -----**<br>
1<br>0.5  D = 0.5<br>0.2   0.2   R       (t) = r(t)  *  R          θ [JA] θ [JA]<br>0.1  0.1     R        = See Note 1 c<br>θ [JA]<br>0.05  0.05<br>0.02  0.02  P(pk)<br>0.01  0.01   t  1  t   2<br>0.005  Single Pulse  T  J - T    = P  A *  R       (t)θ [JA]<br>0.002 Duty Cycle, D = t   / t 1 2<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 300<br>t  , TIME (sec)1<br>r(t), NORMALIZED EFFECTIVE<br>TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 15. Transient Thermal Response Curve** . 

**==> picture [294 x 13] intentionally omitted <==**

**----- Start of picture text -----**<br>
Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change<br>depending on the circuit board design.<br>**----- End of picture text -----**<br>


NDT454P Rev. D2 

## **TRADEMARKS** 

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 

**==> picture [433 x 130] intentionally omitted <==**

**----- Start of picture text -----**<br>
||||||||
|---|---|---|---|---|---|---|
|ACEx™|FAST||OPTOLOGIC™|SMART START™|VCX™|
|Bottomless™|FASTr™|OPTOPLANAR™|STAR*POWER™|
|CoolFET™|FRFET™|PACMAN™|Stealth™|
|CROSSVOLT|™|GlobalOptoisolator™|POP™|SuperSOT™-3|
|DenseTrench™|GTO™|Power247™|SuperSOT™-6|
|DOME™|HiSeC™|PowerTrench||SuperSOT™-8|
|EcoSPARK™|ISOPLANAR™|QFET™|SyncFET™|
|E|[2]|CMOS|[TM]|LittleFET™|QS™|TinyLogic™|
|EnSigna|[TM]|MicroFET™|QT Optoelectronics™|TruTranslation™|
|FACT™|MicroPak™|Quiet Series™|UHC™|
|FACT Quiet Series™|MICROWIRE™|SILENT SWITCHER||UltraFET||

**----- End of picture text -----**<br>


STAR*POWER is used under license 

## **DISCLAIMER** 

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 

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## **PRODUCT STATUS DEFINITIONS** 

## **Definition of Terms** 

**==> picture [433 x 208] intentionally omitted <==**

**----- Start of picture text -----**<br>
Datasheet Identification Product Status Definition<br>Advance Information Formative or This datasheet contains the design specifications for<br>In Design product development. Specifications may change in<br>any manner without notice.<br>Preliminary First Production This datasheet contains preliminary data, and<br>supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make<br>changes at any time without notice in order to improve<br>design.<br>No Identification Needed Full Production This datasheet contains final specifications. Fairchild<br>Semiconductor reserves the right to make changes at<br>any time without notice in order to improve design.<br>Obsolete Not In Production This datasheet contains specifications on a product<br>that has been discontinued by Fairchild semiconductor.<br>The datasheet is printed for reference information only.<br>**----- End of picture text -----**<br>


Rev. H4 

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