# Power MOSFET, N Channel, 30 V, 1.1 A, 0.135 ohm, SuperSOT, Surface Mount

![Product image](https://novapart.co/image/farnell:2825200/)

**URL**: https://novapart.co/products/NDS351N/power-mosfet-n-channel-30-v-11-a-0135-ohm-supersot
**SKU**: NDS351N
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.1560
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Power Dissipation | 500mW |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 500mW |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.135ohm |
| Transistor Case Style | SuperSOT |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 1.1A |
| Drain Source On State Resistance | 0.135ohm |
| Gate Source Threshold Voltage Max | 1.6V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2825200/)

## **NDS351N** 

## **N-Channel Logic Level Enhancement Mode Field Effect Transistor** 

## **General Description** 

These  N-Channel logic level enhancement mode power field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. 

## **Features** 

- 1.1A,  30V.  RDS(ON) = 0.25Ω  @ VGS = 4.5V. 

- Proprietary package design using copper lead frame for superior thermal and electrical capabilities. 

- High density cell design for extremely low RDS(ON). 

- Exceptional on-resistance and maximum DC current capability. 

- Compact industry standard SOT-23 surface mount package. 

## ________________________________________________________________________________ 

**==> picture [68 x 78] intentionally omitted <==**

**----- Start of picture text -----**<br>
D<br>G S<br>**----- End of picture text -----**<br>


|**Absolute Maximum Ratings**<br> TA= 25°C unless otherwise noted|**Absolute Maximum Ratings**<br> TA= 25°C unless otherwise noted|= 25°C unless otherwise noted|= 25°C unless otherwise noted|||
|---|---|---|---|---|---|
|**Symbol**|**Parameter**|||**NDS351N**|**Units**|
|VDSS|Drain-Source Voltage|||30|V|
|VGSS|Gate-Source Voltage - Continuous|||20|V|
|ID|Maximum Drain Current - Continuous|(Note 1a)||± 1.1|A|
||- Pulsed|||± 10||
|PD|Maximum Power Dissipation|(Note 1a)||0.5|W|
|||(Note 1b)||0.46||
|TJ,TSTG|Operating and Storage Temperature Range|||-55 to 150|°C|
|**THERMAL CHARACTERISTICS**||||||
|RθJA|Thermal Resistance, Junction-to-Ambient|(Note 1a)||250|°C/W|
|RθJC|Thermal Resistance, Junction-to-Case|(Note 1)||75|°C/W|



Publication Order Number: NDS351N/D 

© 1997 Semiconductor Components Industries, LLC. September-2017, Rev. 5 

**Electrical Characteristics** (TA = 25°C unless otherwise noted) 

|**Electrica**|**l Characteristics **(TA= 25°C unless other|wise noted)||||||
|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Units**|
|**OFF CHARACTERISTICS**||||||||
|BVDSS|Drain-Source Breakdown Voltage|VGS= 0 V, ID = 250 µA||30|||V|
|IDSS|Zero Gate Voltage  Drain Current|VDS= 24 V, VGS = 0 V||||1|µA|
||||TJ =125°C|||10|µA|
|IGSSF|Gate - Body Leakage, Forward|VGS= 12 V, VDS= 0 V||||100|nA|
|IGSSR|Gate - Body Leakage, Reverse|VGS= -12 V, VDS= 0 V||||-100|nA|
|**ON CHARACTERISTICS**(Note 2)||||||||
|VGS(th)|Gate Threshold Voltage|VDS = VGS, ID = 250 µA||0.8|1.6|2|V|
||||TJ =125°C|0.5|1.3|1.5||
|RDS(ON)|Static Drain-Source On-Resistance|VGS= 4.5 V, ID= 1.1 A|||0.185|0.25|Ω|
||||TJ=125°C||0.26|0.37||
|||VGS= 10 V, ID= 1.4 A|||0.135|0.16||
|ID(ON)|On-State Drain Current|VGS= 4.5 V,  VDS= 5 V||5|||A|
|gFS|Forward Transconductance|VDS= 5 V, ID= 1.1 A|||2.5||S|
|**DYNAMIC CHARACTERISTICS**||||||||
|Ciss|Input Capacitance|VDS= 10 V,  VGS= 0 V,<br>f  = 1.0 MHz|||140||pF|
|Coss|Output Capacitance||||80||pF|
|Crss|Reverse Transfer Capacitance||||18||pF|
|**SWITCHING CHARACTERISTICS**(Note 2)||||||||
|td(on)|Turn - On Delay Time|VDD= 10 V,  ID= 1 A,<br>VGS= 10 V, RGEN= 50Ω|||9|15|ns|
|tr|Turn - On Rise Time||||16|30|ns|
|td(off)|Turn - Off Delay Time||||26|50|ns|
|tf|Turn - Off Fall Time||||19|40|ns|
|Qg|Total Gate Charge|VDS= 10 V, ID= 1.1 A,<br>VGS= 5 V|||2|3.5|nC|
|Qgs|Gate-Source Charge|||||1|nC|
|Qgd|Gate-Drain Charge|||||2|nC|



www.onsemi.com 

2 

**Electrical Characteristics** (TA = 25°C unless otherwise noted) 

|**Electrica**|**Electrica**|**l Characteristics **(TA= 25°C unless other|**l Characteristics **(TA= 25°C unless other|wise noted)|||||
|---|---|---|---|---|---|---|---|---|
|**Symbol**||**Parameter**||**Conditions**|**Min**|**Typ**|**Max**|**Units**|
|**DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS**|||||||||
|IS||Maximum Continuous Drain-Source Diode Forward Current|||||0.6|A|
|ISM||Maximum Pulsed Drain-Source Diode Forward Current|||||5|A|
|VSD||Drain-Source Diode Forward Voltage||VGS= 0 V,  IS = 1.1 A(Note 2)||0.8|1.2|V|
|Notes:<br>1. RθJAis the sum of th<br>design while RθCAis<br>_PD_(_t_) =<br>_TJ_ −_TA_<br>_R_θ_J A_(_t_)<br>=<br><br>Typical RθJAusing th<br>a. 250<br>oC/W when m<br>b. 270<br>oC/<br>Scale 1 : 1<br>**1a**|||e junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJCis guaranteed by<br>determined by the user's board design.<br>_TJ_ −_TA_<br>_R_θ_J C_+_R_θ_CA_(_t_)<br>=_I D_<br>2(_t_) ×_RDS_ (_ON_ ) _TJ_<br>e board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:<br>ounted on a 0.02 in<br>2pad of 2oz cpper.<br>W when mounted on a 0.001 in<br>2pad of 2oz cpper.<br>on letter size paper<br>**1b**||||||
||||_TJ_ −_TA_<br>_R_θ_J C_+_R_θ_CA_(_t_)<br>=_I D_<br>2||||||
||||e board layouts s<br>ounted on a 0.02 i<br>W when mounted<br>on letter size pa||||||
||**1a**||||||||
||Scale 1 : 1||||||||



2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. 

www.onsemi.com 

3 

## **Typical Electrical Characteristics** 

**==> picture [456 x 536] intentionally omitted <==**

**----- Start of picture text -----**<br>
8 2.5<br> V    = 10VGS 6.0 5.0 4.5  V    = 3.0VGS<br>3.5<br>6 2<br> 4.0<br>4.0<br>4 1.5<br> 3.5 4.5<br> 5.0<br>2  3.0 1  6.0<br> 10<br>2.5<br>0 0.5<br>0 1 2 3 4 0 2 4 6 8<br>V     , DRAIN-SOURCE VOLTAGE (V)DS I    , DRAIN CURRENT (A)D<br>Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Gate Voltage<br>and Drain Current<br>1.6 2.5<br>I   = 1.1AD  V     = 4.5 V GS<br>1.4 V     = 4.5V GS 2<br>1.2<br>T  = 125°CJ<br>1.5<br>1<br> 25°C<br>1<br>0.8<br>-55°C<br>0.6 0.5<br>-50 -25 0 25 50 75 100 125 150 0 2 4 6 8<br>T  , JUNCTION TEMPERATURE (°C)J I   , DRAIN CURRENT (A)D<br>Figure 3. On-Resistance Variation Figure 4. On-Resistance Variation with Drain<br>with Temperature Current and Temperature<br>5 1.2<br>V     = 10VDS T   = -55°CJ  25  125°C V    = VDS GS<br>4 1.1 I    = -250µA D<br>3 1<br>2 0.9<br>1 0.8<br>0 0.7<br>1 2 3 4 5 -50 -25 0 25 50 75 100 125 150<br>V     , GATE TO SOURCE VOLTAGE (V)GS T  , JUNCTION TEMPERATURE (°C)J<br>DS(on)<br>R           , NORMALIZED<br>I    , DRAIN-SOURCE CURRENT (A)D DRAIN-SOURCE ON-RESISTANCE<br>DS(ON)<br>R            , NORMALIZED DS(on)<br>R           , NORMALIZED<br>DRAIN-SOURCE ON-RESISTANCE<br>DRAIN-SOURCE ON-RESISTANCE<br>th<br>V    , NORMALIZED<br>I   , DRAIN CURRENT (A)<br>GATE-SOURCE THRESHOLD VOLTAGE<br>D<br>**----- End of picture text -----**<br>


**Figure 2. On-Resistance Variation with Gate Voltage and Drain Current** 

**==> picture [154 x 20] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6. Gate Threshold Variation with<br>Temperature<br>**----- End of picture text -----**<br>


**Figure 5. Transfer Characteristics** 

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## **Typical Electrical Characteristics (continued)** 

**==> picture [210 x 334] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.15<br>I    = 250µAD<br>1.1<br>1.05<br>1<br>0.95<br>0.9<br>-50 -25 0 25 50 75 100 125 150<br>T    , JUNCTION TEMPERATURE (°C)J<br>Figure 7. Breakdown Voltage Variation with<br>Temperature<br>300<br>200<br>C  iss<br>100 C  oss<br>50<br>30<br>20 f = 1 MHzV     = 0VGS C  rss<br>10<br>0.1 0.2 0.5 1 2 5 10 20 30<br>V     , DRAIN TO SOURCE VOLTAGE (V)DS<br>BV        , NORMALIZED<br>DRAIN-SOURCE BREAKDOWN VOLTAGE<br>CAPACITANCE (pF)<br>DSS<br>**----- End of picture text -----**<br>


**==> picture [207 x 331] intentionally omitted <==**

**----- Start of picture text -----**<br>
5<br>2 V     = 0VGS<br>1<br>0.5<br>0.2 T  = 125 J °C<br>25°C<br>0.1<br>-55°C<br>0.01<br>0.001<br>0.3 0.6 0.9 1.2<br>V     , BODY DIODE FORWARD VOLTAGE (V)SD<br>Figure 8.  Body Diode Forward Voltage Variation<br>with Current and Temperature<br>10<br>I    = 1.1ADS V   = 5VDS 10V<br>8<br>6<br>4<br>2<br>0<br>0 1 2 3 4<br>Q    , GATE CHARGE (nC)g<br>I   , REVERSE DRAIN CURRENT (A)<br>GS<br>V      , GATE-SOURCE VOLTAGE (V)<br>S<br>**----- End of picture text -----**<br>


**Figure 9. Capacitance Characteristics** 

**Figure 10. Gate Charge Characteristics** 

**==> picture [444 x 127] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD t on toff<br>t d(on) t [r] t d(off) t f<br>VIN R L 90% 90%<br>D V OUT Output, Vout<br>10% 10%<br>V<br>GS Inverted<br>R 90%<br>GEN G DUT<br>Input, Vin 50% 50%<br>10%<br>S<br>Pulse Width<br>**----- End of picture text -----**<br>


**Figure 11. Switching Test Circuit** 

**Figure 12. Switching Waveforms** 

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## **Typical Electrical Characteristics (continued)** 

**==> picture [451 x 352] intentionally omitted <==**

**----- Start of picture text -----**<br>
6 20<br>V     = 5VDS 10<br>T  = -55°CJ 5<br>4  25°C 2<br>1<br>0.5<br> 125°C<br>2<br>0.1 V     = 10V GS<br>SINGLE PULSE<br>0.05<br>T    = 25 A °C<br>0 0 2 4 6 8 0.010.1 0.2 0.5 1 2 5 10 30 50<br>I   , DRAIN CURRENT (A)D  V     , DRAIN-SOURCE VOLTAGE (V)DS<br>Figure 13. Transconductance Variation with Drain Figure 14. Maximum Safe Operating Area<br>Current and Temperature<br>1<br>0.5  D = 0.5<br>0.2   0.2<br>0.1  0.1  R        θJA (t) = r(t)  *   R      θJA<br>   R        = 250 °C/WθJA<br>0.05  0.05<br> 0.02<br>0.02 P(pk)<br> 0.01<br>0.01  t  1<br>0.005  Single Pulse   t   2<br>T  - T    = PJ A * R       (t)θJA<br>0.002 Duty Cycle, D = t   /t1 2<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 300<br>t  , TIME (sec)1<br>100us<br>1ms<br>10ms<br>100ms<br>RDS(ON) LIMIT<br>1s<br>10s<br>I   , DRAIN CURRENT (A)D DC<br>FS<br>g    , TRANSCONDUCTANCE (SIEMENS)<br>r(t), NORMALIZED EFFECTIVE<br>TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


## **Figure 15. Transient Thermal Response Curve** 

Note : Characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. 

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