# Power MOSFET, N Channel, 20 V, 1.3 A, 0.16 ohm, SuperSOT, Surface Mount

![Product image](https://novapart.co/image/farnell:2336833/)

**URL**: https://novapart.co/products/NDS331N/power-mosfet-n-channel-20-v-13-a-016-ohm-supersot
**SKU**: NDS331N
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.1560
**Stock**: 1000+
**Lead Time**: 99 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:1.3A; Drain Source Voltage Vds:20V; On Resistance Rds(on):0.11ohm; Rds(on) Test Voltage Vgs:4.5V; Threshold Voltage Vgs:700mV; Po

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 500mW |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 4.5V |
| Transistor Case Style | SuperSOT |
| Drain Source Voltage Vds | 20V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 1.3A |
| Drain Source On State Resistance | 0.16ohm |
| Gate Source Threshold Voltage Max | 700mV |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2336833/)

## **Is Now Part of** 

**To learn more about ON Semiconductor, please visit our website at www.onsemi.com** 

ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **www.onsemi.com** 

## **NDS331N** 

## **N-Channel Logic Level Enhancement Mode Field Effect Transistor** 

## **General Description** 

## **Features** 

These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other   battery powered circuits where  fast switching, and low in-line power loss  are needed in a very small outline surface mount package. 

- 1.3 A, 20 V. RDS(ON) = 0.21 Ω  @ VGS= 2.7 V RDS(ON) = 0.16 Ω  @ VGS= 4.5 V. 

- Industry  standard outline SOT-23 surface mount package using  poprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. 

- High density cell design for extremely low RDS(ON). 

- Exceptional on-resistance and maximum DC current capability. 

## _______________________________________________________________________________ 

**==> picture [69 x 78] intentionally omitted <==**

**----- Start of picture text -----**<br>
D<br>G S<br>**----- End of picture text -----**<br>


## **Absolute Maximum Ratings** TA = 25°C unless otherwise noted 

|**Symbol**|**Parameter**|**NDS331N**|
|---|---|---|
|VDSS|Drain-Source Voltage|20|
|VGSS|Gate-Source Voltage - Continuous|8|
|ID|Maximum Drain Current - Continuous(Note 1a)<br>- Pulsed|1.3|
|||10|
|PD|Maximum Power Dissipation(Note 1a)<br>(Note 1b)|0.5|
|||0.46|
|TJ,TSTG|Operating and Storage Temperature Range|-55 to 150|



Semiconductor Components Industries, LLC, 2017                                                                                      Publication Order Number: January, 2017, Rev. E NDS331N 

**1** 

|**ELECTRICAL CHARACTERISTICS **(TA= 25°C unless otherwise noted)|**ELECTRICAL CHARACTERISTICS **(TA= 25°C unless otherwise noted)|**ELECTRICAL CHARACTERISTICS **(TA= 25°C unless otherwise noted)||**Min**<br>**Typ**<br>**Max**<br>**Units**<br>20<br>V<br>1<br>µA<br>10<br>µA<br>100<br>nA<br>-100<br>nA<br>0.5<br>0.7<br>1<br>V<br>0.3<br>0.53<br>0.8<br>0.15<br>0.21<br>Ω<br>0.24<br>0.4<br>0.11<br>0.16<br>3<br>A<br>4<br>3.5<br>S<br>162<br>pF<br>85<br>pF<br>28<br>pF<br>5<br>20<br>ns<br>25<br>40<br>ns<br>10<br>20<br>ns<br>5<br>20<br>ns<br>3.5<br>5<br>nC<br>0.3<br>nC<br>1<br>nC|**Min**<br>**Typ**<br>**Max**<br>**Units**<br>20<br>V<br>1<br>µA<br>10<br>µA<br>100<br>nA<br>-100<br>nA<br>0.5<br>0.7<br>1<br>V<br>0.3<br>0.53<br>0.8<br>0.15<br>0.21<br>Ω<br>0.24<br>0.4<br>0.11<br>0.16<br>3<br>A<br>4<br>3.5<br>S<br>162<br>pF<br>85<br>pF<br>28<br>pF<br>5<br>20<br>ns<br>25<br>40<br>ns<br>10<br>20<br>ns<br>5<br>20<br>ns<br>3.5<br>5<br>nC<br>0.3<br>nC<br>1<br>nC|**Min**<br>**Typ**<br>**Max**<br>**Units**<br>20<br>V<br>1<br>µA<br>10<br>µA<br>100<br>nA<br>-100<br>nA<br>0.5<br>0.7<br>1<br>V<br>0.3<br>0.53<br>0.8<br>0.15<br>0.21<br>Ω<br>0.24<br>0.4<br>0.11<br>0.16<br>3<br>A<br>4<br>3.5<br>S<br>162<br>pF<br>85<br>pF<br>28<br>pF<br>5<br>20<br>ns<br>25<br>40<br>ns<br>10<br>20<br>ns<br>5<br>20<br>ns<br>3.5<br>5<br>nC<br>0.3<br>nC<br>1<br>nC|
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|
|**OFF CHARACTERISTICS**|||||||
|BVDSS|Drain-Source Breakdown Voltage|VGS= 0 V, ID = 250 µA||20|||
|IDSS|Zero Gate Voltage  Drain Current|VDS= 16 V, VGS= 0 V||||1|
||||TJ =125°C|||10|
|IGSSF|Gate - Body Leakage, Forward|VGS= 8 V, VDS= 0 V||||100|
|IGSSR|Gate - Body Leakage, Reverse|VGS= -8 V, VDS= 0 V||||-100|
|**ON CHARACTERISTICS**(Note 2)|||||||
|VGS(th)|Gate Threshold Voltage|VDS = VGS, ID = 250 µA||0.5|0.7|1|
||||TJ =125°C|0.3|0.53|0.8|
|RDS(ON)|Static Drain-Source On-Resistance|VGS= 2.7 V, ID= 1.3 A|||0.15|0.21|
||||TJ=125°C||0.24|0.4|
|||VGS= 4.5 V, ID= 1.5 A|||0.11|0.16|
|ID(ON)|On-State Drain Current|VGS= 2.7 V, VDS= 5 V||3|||
|||VGS= 4.5 V, VDS= 5 V||4|||
|gFS|Forward Transconductance|VDS= 5 V, ID= 1.3 A,|||3.5||
|**DYNAMIC CHARACTERISTICS**|||||||
|Ciss|Input Capacitance|VDS= 10 V,  VGS= 0 V,<br>f  = 1.0 MHz|||162||
|Coss|Output Capacitance||||85||
|Crss|Reverse Transfer Capacitance||||28||
|**SWITCHING CHARACTERISTICS**(Note 2)|||||||
|tD(on)|Turn - On Delay Time|VDD= 5 V, ID= 1 A,<br>VGS= 5 V,  RGen= 6Ω|||5|20|
|tr|Turn - On Rise Time||||25|40|
|tD(off)|Turn - Off Delay Time||||10|20|
|tf|Turn - Off Fall Time||||5|20|
|Qg|Total Gate Charge|VDS= 5 V, ID= 1.3 A,<br>VGS= 4.5 V|||3.5|5|
|Qgs|Gate-Source Charge||||0.3||
|Qgd|Gate-Drain Charge||||1||
||||||||



www.onsemi.com 

**2** 

## **Electrical Characteristics** (TA = 25°C unless otherwise noted) 

|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|
|**DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS**|||||||
|IS|Maximum Continuous Drain-Source Diode Forward Current||||0.42|A|
|ISM|Maximum Pulsed Drain-Source Diode Forward Current||||10|A|
|VSD|Drain-Source Diode Forward Voltage|VGS= 0 V,  IS = 0.42 A(Note 2)||0.8|1.2|V|
|Notes:|||||||



1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. _PD_ ( _t_ ) = _RT_ θ _JJ_ − _TA_ ( _At_ ) = _R_ θ _JTC_ + _J_ − _RT_ θ _ACA_ ( _t_ ) = _I D_ 2 ( _t_ ) × _RDS_ ( _ON_ ) _TJ_ Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper. b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper. 

**1a 1b** Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. 

www.onsemi.com 

**3** 

## **Typical Electrical Characteristics** 

**==> picture [422 x 131] intentionally omitted <==**

**----- Start of picture text -----**<br>
4 1.75<br>V      =4.5VGS  2.5<br> 2.0<br> 3.0  2.7 1.5<br>3<br>V    = 2.0VGS<br>1.25<br>2  2.5<br> 1.5 1  2.7  3.0<br> 3.5<br>1  4.5<br>0.75<br>0 0 1 2 3 0.5 0 0.5 1 1.5 2 2.5 3<br>V     , DRAIN-SOURCE VOLTAGE (V)DS I    , DRAIN CURRENT (A)D<br>DS(on)<br>R           , NORMALIZED<br>I    , DRAIN-SOURCE CURRENT (A)D DRAIN-SOURCE ON-RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 1. On-Region Characteristics.** 

**Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.** 

**==> picture [428 x 157] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.8 1.75<br>1.6 I   = 1.3A D  V     = 2.7 V GS T  = 125°CJ<br>V     = 2.7VGS 1.5<br>1.4<br>1.25<br>1.2<br> 25°C<br>1<br>1<br> -55°C<br>0.75<br>0.8<br>0.6 0.5<br>-50 -25 0 25 50 75 100 125 150 0 0.5 1 1.5 2 2.5 3<br>T  , JUNCTION TEMPERATURE (°C)J I   , DRAIN CURRENT (A)D<br>Figure 3. On-Resistance Variation  Figure 4. On-Resistance Variation<br>with Temperature . with Drain Current and Temperature .<br>DS(ON)<br>R            , NORMALIZED<br>DS(on)<br>R           , NORMALIZED<br>DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE  ON-RESISTANCE<br>**----- End of picture text -----**<br>


**==> picture [428 x 155] intentionally omitted <==**

**----- Start of picture text -----**<br>
4 1.3<br>V     = 5.0VDS T  = -55°CJ 25°C 1.2 V    = VDS GS<br>125°C I    = 250µAD<br>3 1.1<br>1<br>2 0.9<br>0.8<br>1 0.7<br>0.6<br>0 0.5<br>0 0.5 1 1.5 2 2.5 3 -50 -25 0 25 50 75 100 125 150<br>V     , GATE TO SOURCE VOLTAGE (V)GS T  , JUNCTION TEMPERATURE (°C)J<br>Figure 5. Transfer Characteristics . Figure 6. Gate Threshold Variation<br>th<br>V   , NORMALIZED<br>I   , DRAIN CURRENT (A)<br>GATE-SOURCE THRESHOLD VOLTAGE<br>D<br>**----- End of picture text -----**<br>


**==> picture [136 x 19] intentionally omitted <==**

**----- Start of picture text -----**<br>
Figure 6. Gate Threshold Variation<br>with Temperature .<br>**----- End of picture text -----**<br>


www.onsemi.com 

**4** 

## **Typical Electrical Characteristics (continued)** 

**==> picture [195 x 123] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.12<br>I    = 250µAD<br>1.08<br>1.04<br>1<br>0.96<br>0.92<br>-50 -25 0 25 50 75 100 125 150<br>T    , JUNCTION TEMPERATURE (°C)J<br>BV        , NORMALIZED<br>DRAIN-SOURCE BREAKDOWN VOLTAGE<br>DSS<br>**----- End of picture text -----**<br>


**==> picture [190 x 126] intentionally omitted <==**

**----- Start of picture text -----**<br>
1<br>V     = 0VGS<br>0.1<br>T  = 125°CJ<br>25°C<br>0.01<br>-55°C<br>0.001<br>0.0001<br>0 0.2 0.4 0.6 0.8 1 1.2<br>V     , BODY DIODE FORWARD VOLTAGE (V)SD<br>I   , REVERSE DRAIN CURRENT (A)S<br>**----- End of picture text -----**<br>


**Figure 7. Breakdown Voltage   Variation with Temperature.** 

**Figure 8. Body Diode Forward Voltage Variation with Source Current  and Temperature** . 

**==> picture [458 x 354] intentionally omitted <==**

**----- Start of picture text -----**<br>
600 5<br>V     = 5VDS<br>400 I   = 1.3AD 10V<br>4 15V<br>200 C   iss<br>3<br>100 C  oss<br>50 2<br>C   rss<br>f = 1 MHz 1<br>20 V     = 0V GS<br>10 0<br>0.1 0.2 0.5 1 2 5 10 20 0 1 2 3 4 5<br>V     , DRAIN TO SOURCE VOLTAGE (V)DS Q    , GATE CHARGE (nC)g<br>Figure 9. Capacitance Characteristics . Figure 10. Gate Charge Characteristics .<br>VDD t t<br>on off<br>t d(on) t r t d(off) t f<br>VIN R L<br>90% 90%<br>D V OUT<br>VGS VOUT<br>R 10% 10%<br>GEN G DUT INVERTED<br>90%<br>S V IN 50% 50%<br>10%<br> PULSE WIDTH<br>CAPACITANCE (pF)<br>GS<br>V      , GATE-SOURCE VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 11. Switching Test Circuit** . 

**Figure 12. Switching Waveforms** . 

www.onsemi.com 

**5** 

## **Typical Electrical Characteristics (continued)** 

**==> picture [444 x 585] intentionally omitted <==**

**----- Start of picture text -----**<br>
50<br>8 THIS AREA IS<br>V     = 5.0VDS 10 LIMITED BY r DS(on)<br>6 T   = -55°CJ 100  μ s<br> 25°C 1 ms<br>1<br>4  125 ° C<br>10 ms<br>2 0.1 SINGLE PULSE TJ = MAX RATED 100 ms<br>R θ JA = 270 [ o] C/W CURVE BENT TO<br>T A = 25  [o] C MEASURED DATA<br>0 0.01<br>0 1 2 3 4 0.1 1 10 60<br>I   , DRAIN CURRENT (A)D VDS, DRAIN to SOURCE VOLTAGE (V)<br>Figure 13. Transconductance Variation with Drain Figure 14. Maximum Safe Operating Area.<br>Current and Temperature .<br>1 1.8<br>0.8<br>1.6<br>0.6<br>1a<br>1.4<br>1b<br>0.4 1a<br>4.5"x5" FR-4 Board<br>1.2 T   = 25  CA o<br>0.2 1b Still Air<br>4.5"x5" FR-4 BoardT   = 25  CA o V    = 2.7VGS<br>Still Air<br>0 1<br>0 0.1 0.2 0.3 0.4 0 0.1 0.2 0.3 2 0.4<br>2oz COPPER MOUNTING PAD AREA (in   )2 2oz COPPER MOUNTING PAD AREA (in   )<br>Figue 15. SuperSOTTM _ 3 Maximum             Figure 16. Maximum Steady-State Drain<br>Steady-State  Power Dissipation. versus Copper    Current versus Copper Mounting Pad. Area<br>Mounting Pad Area.<br>2<br>DUTY CYCLE-DESCENDING ORDER<br>1<br>D = 0.5<br>      0.2<br>      0.1 P DM<br>0.1       0.05<br>      0.02<br>      0.01 t1<br>t2<br>NOTES:<br>0.01 Z θ JA(t) = r(t) x R θ JA<br>R θ JA = 270  [o] C/W<br>SINGLE PULSE Peak T J  = P DM  x Z θ JA (t) + T A<br>Duty Cycle, D = t1 / t2<br>0.001<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Figure 17. Transient Thermal Response Curve.<br>Note : Thermal characterization performed using the  conditions described in note 1b.<br>response will change depending on the circuit board design.<br>, DRAIN CURRENT (A)<br>ID<br>FS<br>g    , TRANSCONDUCTANCE (SIEMENS)<br>STEADY-STATE POWER DISSIPATION (W) I   , STEADY-STATE DRAIN CURRENT (A)D<br>Z JA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


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**6** 

**==> picture [490 x 660] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.95<br>2.92±0.12 A<br>3<br>B 1.40<br>1.40±0.12 2.20<br>1 2<br>0.508<br>(0.29)<br>0.382<br>1.00<br>0.10 M A B<br>0.95<br>1.90<br>1.90 LAND PATTERN RECOMMENDATION<br>1.12 MAX SEE DETAIL A<br>0.10<br>(0.94) 0.00<br>0.10 M C<br>C<br>2.51±0.20<br>GAGE PLANE<br>NOTES: UNLESS OTHERWISE SPECIFIED<br>0.178    A)  NO JEDEC REFERENCE AS OF AUGUST 2003<br>0.102 0.20    B)  ALL DIMENSIONS ARE IN MILLIMETERS.<br>   C)  DIMENSIONS ARE EXCLUSIVE OF BURRS,<br>         MOLD FLASH AND TIE BAR EXTRUSIONS.<br>   D)  DIMENSIONING AND TOLERANCING PER<br>         ASME Y14.5M - 2009.<br>   E)  DRAWING FILE NAME: MKT-MA03BREV3<br>0.43<br>0.33 SEATING<br>PLANE<br>(0.56)<br>SCALE: 50:1<br>**----- End of picture text -----**<br>


ON Semiconductor and      are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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