# Power MOSFET, N Channel, 42 V, 6 A, 0.1 ohm, SOT-223, Surface Mount ![Product image](https://novapart.co/image/farnell:2724403/) **URL**: https://novapart.co/products/NCV8405ASTT1G/power-mosfet-n-channel-42-v-6-a-01-ohm-sot-223 **SKU**: NCV8405ASTT1G **Manufacturer**: ONSEMI **Category**: Semiconductors - Discretes || FETs || Single MOSFETs **Price**: €0.4250 **Stock**: 1000+ **Lead Time**: 120 days (indicative) ## Description Transistor Polarity:N Channel; Continuous Drain Current Id:6A; Drain Source Voltage Vds:42V; On Resistance Rds(on):0.09ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:1.6V; ## Specifications | Parameter | Value | |---|---| | Msl | MSL 1 - Unlimited | | Svhc | No SVHC (25-Jun-2025) | | No. Of Pins | 4Pins | | Channel Type | N Channel | | Product Range | - | | Qualification | AEC-Q101 | | Power Dissipation | 1W | | Transistor Mounting | Surface Mount | | Rds(On) Test Voltage | 10V | | Transistor Case Style | SOT-223 | | Drain Source Voltage Vds | 42V | | Operating Temperature Max | 150°C | | Continuous Drain Current Id | 6A | | Drain Source On State Resistance | 0.1ohm | | Gate Source Threshold Voltage Max | 1.6V | ## Datasheet 📄 [Download PDF](https://novapart.co/datasheet/farnell:2724403/) ## NCV8405A, NCV8405B ## Self-Protected Low Side Driver with Temperature and Current Limit NCV8405A/B is a three terminal protected Low−Side Smart Discrete device. The protection features include overcurrent, overtemperature, ESD and integrated Drain−to−Gate clamping for overvoltage protection. This device is suitable for harsh automotive environments. ## **Features** - Short−Circuit Protection **==> picture [191 x 82] intentionally omitted <==** **----- Start of picture text -----**
www.onsemi.com
V(BR)DSS
(Clamped) RDS(ON) TYP ID MAX
42 V 90 m @ 10 V 6.0 A*
ee ee ee
*Max current limit value is dependent on input
condition.
**----- End of picture text -----**
- Thermal Shutdown with Automatic Restart - Overvoltage Protection - Integrated Clamp for Inductive Switching - ESD Protection - dV/dt Robustness - Analog Drive Capability (Logic Level Input) - NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable - These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant ## **Typical Applications** - Switch a Variety of Resistive, Inductive and Capacitive Loads - Can Replace Electromechanical Relays and Discrete Circuits **==> picture [171 x 183] intentionally omitted <==** **----- Start of picture text -----**
Drain
Overvoltage
Gate Protection
Input
ESD Protection
Temperature Current Current
Limit Limit Sense
Source
MARKING
DIAGRAM
**----- End of picture text -----**
- Automotive / Industrial **==> picture [163 x 217] intentionally omitted <==** **----- Start of picture text -----**
4 DRAIN
4
1
2 AYW
3
xxxxx
SOT−223
CASE 318E " C 1 2 o 3
STYLE 3 GATE SOURCE
DRAIN
4
1 7 [2] YWW
3 xxxxxG
DPAK
CASE 369C
A = Assembly Location
Y = Year
W, WW = Work Week
xxxxx = 8405A or 8405B
G or = Pb−Free Package
(Note: Microdot may be in either location)
**----- End of picture text -----**
## **ORDERING INFORMATION** See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. Publication Order Number: **NCV8405/D** **1** © Semiconductor Components Industries, LLC, 2016 **June, 2019 − Rev. 8** **NCV8405A, NCV8405B** ## **MAXIMUM RATINGS** (TJ = 25 ° C unless otherwise noted) |**MAXIMUM RATINGS**(TJ= 25°C unless otherwise noted)|||| |---|---|---|---| |**Rating**|**Symbol**|**Value**|**Unit**| |Drain−to−Source Voltage Internally Clamped|VDSS|42|V| |Drain−to−Gate Voltage Internally Clamped
(RG= 1.0 M�)|VDGR|42|V| |Gate−to−Source Voltage|VGS|�14|V| |Continuous Drain Current|ID|Internally Limited|| |Power Dissipation − SOT−223 Version
@ TA= 25°C (Note 1)
@ TA= 25°C (Note 2)
@ TS= 25°C
Power Dissipation − DPAK Version
@ TA= 25°C (Note 1)
@ TA= 25°C (Note 2)
@ TS= 25°C|PD|1.0
1.7
11.4
2.0
2.5
40|W| |Thermal Resistance − SOT−223 Version
Junction−to−Ambient Steady State (Note 1)
Junction−to−Ambient Steady State (Note 2)
Junction−to−Soldering Point Steady State
Thermal Resistance − DPAK Version
Junction−to−Ambient Steady State (Note 1)
Junction−to−Ambient Steady State (Note 2)
Junction−to−Soldering Point Steady State|R�JA
R�JA
R�JS
R�JA
R�JA
R�JS|130
72
11
60
50
3.0|°C/W| |Single Pulse Drain−to−Source Avalanche Energy
(VDD= 40 V, VG= 5.0 V, IPK= 2.8 A, L = 80 mH, RG(ext)= 25�, TJ = 25°C)|EAS|275|mJ| |Load Dump Voltage
VLD= VA+ VS(VGS= 0 and 10 V, RI= 2.0�, RL= 6.0�, td= 400 ms)|VLD|53|V| |Operating Junction Temperature|TJ|−40 to 150|°C| |Storage Temperature|Tstg|−55 to 150|°C| Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Surface−mounted onto min pad FR4 PCB, (2 oz. Cu, 0.06 ″ thick). 2. Surface−mounted onto 2 ″ sq. FR4 board (1 ″ sq., 1 oz. Cu, 0.06 ″ thick). **==> picture [289 x 193] intentionally omitted <==** **----- Start of picture text -----**
+
ID
DRAIN
IG
VDS
+ GATE
SOURCE
VGS
− −
**----- End of picture text -----**
**Figure 1. Voltage and Current Convention** **www.onsemi.com** **2** ## **NCV8405A, NCV8405B** **ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C unless otherwise noted) |**ELECTRICAL CHARACTERISTICS**|(TJ= 25°C unless otherwise noted)|||||| |---|---|---|---|---|---|---| |**Parameter**|**Test Condition**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**| |**OFF CHARACTERISTICS**||||||| |Drain−to−Source Breakdown Voltage
(Note 3)|VGS= 0 V, ID= 10 mA, TJ= 25°C|V(BR)DSS|42|46|51|V| ||VGS= 0 V, ID= 10 mA, TJ= 150°C
(Note 5)||42|45|51|| |Zero Gate Voltage Drain Current|VGS= 0 V, VDS= 32 V, TJ= 25°C|IDSS||0.5|2.0|�A| ||VGS= 0 V, VDS= 32 V, TJ= 150°C
(Note 5)|||2.0|10|| |Gate Input Current|VDS= 0 V, VGS= 5.0 V|IGSSF||50|100|�A| |**ON CHARACTERISTICS**(Note 3)||||||| |Gate Threshold Voltage|VGS= VDS, ID= 150�A|VGS(th)|1.0|1.6|2.0|V| |Gate Threshold Temperature Coefficient||VGS(th)/TJ||4.0||−mV/°C| |Static Drain−to−Source On−Resistance|VGS= 10 V, ID= 1.4 A, TJ= 25°C|RDS(on)||90|100|m�| ||VGS= 10 V, ID= 1.4 A, TJ= 150°C
(Note 5)|||165|190|| ||VGS= 5.0 V, ID= 1.4 A, TJ= 25°C|||105|120|| ||VGS= 5.0 V, ID= 1.4 A, TJ= 150°C
(Note 5)|||185|210|| ||VGS= 5.0 V, ID= 0.5 A, TJ= 25°C|||105|120|| ||VGS= 5.0 V, ID= 0.5 A, TJ= 150°C
(Note 5)|||185|210|| |Source−Drain Forward On Voltage|VGS= 0 V, IS= 7.0 A|VSD||1.05||V| |**SWITCHING CHARACTERISTICS**(Note 5)||||||| |Turn−ON Time (10% VINto 90% ID)|VGS= 10 V, VDD= 12 V
ID= 2.5 A, RL= 4.7�|tON||20||�s| |Turn−OFF Time (90% VINto 10% ID)||tOFF||110||| |Slew−Rate ON (70% VDSto 50% VDS)|VGS= 10 V, VDD= 12 V,
RL= 4.7�|−dVDS/dtON||1.0||V��s| |Slew−Rate OFF (50% VDSto 70% VDS)||dVDS/dtOFF||0.4||| |**SELF PROTECTION CHARACTERISTICS **(TJ= 25°C unless otherwise noted) (Note 4)||||||| |Current Limit|VDS= 10 V, VGS= 5.0 V, TJ= 25°C|ILIM|6.0|9.0|11|A| ||VDS= 10 V, VGS= 5.0 V, TJ= 150°C
(Note 5)||3.0|5.0|8.0|| ||VDS= 10 V, VGS= 10 V, TJ= 25°C||7.0|10.5|13|| ||VDS= 10 V, VGS= 10 V, TJ= 150°C
(Note 5)||4.0|7.5|10|| |Temperature Limit (Turn−off)|VGS= 5.0 V (Note 5)|TLIM(off)|150|180|200|°C| |Thermal Hysteresis|VGS= 5.0 V|�TLIM(on)||15||| |Temperature Limit (Turn−off)|VGS= 10 V (Note 5)|TLIM(off)|150|165|185|| |Thermal Hysteresis|VGS= 10 V|�TLIM(on)||15||| |**GATE INPUT CHARACTERISTICS**(Note 5)||||||| |Device ON Gate Input Current|VGS= 5 V ID= 1.0 A|IGON||50||�A| ||VGS= 10 V ID= 1.0 A|||400||| |Current Limit Gate Input Current|VGS= 5 V, VDS= 10 V|IGCL||0.05||mA| ||VGS= 10 V, VDS= 10 V|||0.4||| |Thermal Limit Fault Gate Input Current|VGS= 5 V, VDS= 10 V|IGTL||0.22||mA| ||VGS= 10 V, VDS= 10 V|||1.0||| |**ESD ELECTRICAL CHARACTERISTICS **(TJ= 25°C unless otherwise noted) (Note 5)||||||| |Electro−Static Discharge Capability|Human Body Model (HBM)|ESD|4000|||V| ||Machine Model (MM)||400|||| 3. Pulse Test: Pulse Width ≤ 300 � s, Duty Cycle ≤ 2%. 4. Fault conditions are viewed as beyond the normal operating range of the part. 5. Not subject to production testing. **www.onsemi.com** **3** **NCV8405A, NCV8405B** ## **TYPICAL PERFORMANCE CURVES** **==> picture [238 x 381] intentionally omitted <==** **----- Start of picture text -----**
10
TJstart = 25 ° C
TJstart = 150 ° C
1
10 100
L (mH)
Figure 2. Single Pulse Maximum Switch−off
Current vs. Load Inductance
100
10
TJstart = 25 ° C
TJstart = 150 ° C
1
1 10
TIME IN CLAMP (ms)
(A)
IL(max)
(A)
IL(max)
**----- End of picture text -----**
**Figure 4. Single Pulse Maximum Inductive Switch−off Current vs. Time in Clamp** **==> picture [246 x 381] intentionally omitted <==** **----- Start of picture text -----**
1000
TJstart = 25 ° C
100
TJstart = 150 ° C
10
10 100
L (mH)
Figure 3. Single Pulse Maximum Switching
Energy vs. Load Inductance
1000
TJstart = 25 ° C
100 TJstart = 150 ° C
10
1 10
TIME IN CLAMP (ms)
(mJ)
max
E
(mJ)
max
E
**----- End of picture text -----**
**Figure 5. Single Pulse Maximum Inductive Switching Energy vs. Time in Clamp** **==> picture [233 x 167] intentionally omitted <==** **----- Start of picture text -----**
9 V TA = 25 ° C
14
8 V
10 V
12 7 V
10 6 V
4 V
8
5 V
6
3 V
4
2 V GS = 2.5 V
0
0 1 2 3 4 5
VDS (V)
(A)
ID
**----- End of picture text -----**
**Figure 6. Output Characteristics** **==> picture [243 x 171] intentionally omitted <==** **----- Start of picture text -----**
12
VDS = 10 V −40 ° C
10 25 ° C
8
100 ° C
6
150 ° C
4
2
0
1 2 3 4 5
VGS (V)
(A)
ID
**----- End of picture text -----**
**Figure 7. Transfer Characteristics** **www.onsemi.com** **4** **NCV8405A, NCV8405B** ## **TYPICAL PERFORMANCE CURVES** **==> picture [495 x 596] intentionally omitted <==** **----- Start of picture text -----**
300
210
250 150 ° C, ID = 1.4 A 190 150 ° C, VGS = 10 V
170
200 150 ° C, ID = 0.5 A 150 150 ° C, VGS = 10 V
100 ° C, VGS = 5 V
150 100 ° C, ID = 1.4 A 130110 100 ° C, VGS = 10 V °
25 C, VGS = 5 V
10050 −40 ° C, I−40D = 0.5 A100 ° C, I ° C, ID = 1.4 AD = 0.5 A 25 ° 25C, I ° C, ID = 1.4 AD = 0.5 A 907050 −40 ° C, V−40GS ° C, V = 10 VGS = 5 V 25 ° C, VGS = 10 V
3 4 5 6 7 8 9 10 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VGS (V) ID (A)
Figure 8. RDS(on) vs. Gate−Source Voltage Figure 9. RDS(on) vs. Drain Current
2.0 15
ID = 1.4 A VDS = 10 V
1.75 13
−40 ° C
1.5 VGS = 5 V 11 25 ° C
1.25 9
100 ° C
1.0 7
VGS = 10 V 150 ° C
0.75 5
0.5 3
−40 −20 0 20 40 60 80 100 120 140 5 6 7 8 9 10
T ( ° C) VGS (V)
Figure 10. Normalized RDS(on) vs. Temperature Figure 11. Current Limit vs. Gate−Source
Voltage
10
VGS = 0 V
14
1 150 ° C
12
10 VGS = 10 V 0.1 100 ° C
8 25 ° C −40 ° C
VGS = 5 V 0.01
6
VDS = 10 V
4 0.001
−40 −20 0 20 40 60 80 100 120 140 160 10 15 20 25 30 35 40
TJ ( ° C) VDS (V)
) � ) �
(m (m
DS(on) DS(on)
R R
C)(NORMALIZED)
°
(A)
ILIM
(VGS = 5 V, TJ = 25
DS(on)
R
A)
�
(A) (
ILIM IDSS
**----- End of picture text -----**
**Figure 12. Current Limit vs. Junction Temperature** **Figure 13. Drain−to−Source Leakage Current** **www.onsemi.com** **5** **NCV8405A, NCV8405B** ## **TYPICAL PERFORMANCE CURVES** **==> picture [494 x 381] intentionally omitted <==** **----- Start of picture text -----**
1.2 1.1
ID = 150 � A
1.1 VGS = VDS 1 −40 ° C
25 ° C
0.9
1
100 ° C
0.8
0.9
0.7
0.8 150 ° C
0.6
0.7
0.5
VGS = 0 V
0.6 0.4
−40 −20 0 20 40 60 80 100 120 140 1 2 3 4 5 6 7 8 9 10
T ( ° C) IS (A)
Figure 14. Normalized Threshold Voltage vs. Figure 15. Body−Diode Forward
Temperature Characteristics
200 1.500
ID = 2.5 A ID = 2.5 AD = 2.5 A = 2.5 A
VDD = 12 V VDD = 12 VDD = 12 V = 12 V
150 RG = 0 � RG = 0 G = 0 = 0 �
1.000
100 tr −dVDS/dt(on)DS/dt(on)/dt(on)t(on)
td(off) 0.500
50
dVDS/dt(off)DS/dt(off)/dt(off)t(off)
tf
td(on)
0 0.000
3 4 5 6 7 8 9 10 3 4 5 6 7 8 9 10
VGS (V) VGS (V)GS (V) (V)
(V)
GS(th)
(V)
SD
V
NORMALIZED V
s)
�
s)
�
TIME (
DRAIN−SOURCE VOLTAGE SLOPE (V/
**----- End of picture text -----**
**==> picture [252 x 398] intentionally omitted <==** **----- Start of picture text -----**
1.500
ID = 2.5 AD = 2.5 A = 2.5 A
VDD = 12 VDD = 12 V = 12 V
RG = 0 G = 0 = 0 �
1.000
−dVDS/dt(on)DS/dt(on)/dt(on)t(on)
0.500
dVDS/dt(off)DS/dt(off)/dt(off)t(off)
0.000
3 4 5 6 7 8 9 10
VGS (V)GS (V) (V)
Figure 17. Resistive Load Switching
Drain−Source Voltage Slope vs. Gate−Source
Voltage
1.5
1.3
−dVDS/dt(on), VGS = 10 V
1.1
0.9
0.7
0.5 dVDS/dt(off), VGS = 5 V dVDS/dt(off), VGS = 10 V
0.3
−dV DS /d t(on) , V GS = 5 V
0.1 I D = 2.5 A
VDD = 12 V
−0.1
0 500 1000 1500 200
RG ( � )
s)
�
DRAIN−SOURCE VOLTAGE SLOPE (V/
s)
�
DRAIN−SOURCE VOLTAGE SLOPE (V/
**----- End of picture text -----**
**Figure 16. Resistive Load Switching Time vs. Gate−Source Voltage** **==> picture [242 x 172] intentionally omitted <==** **----- Start of picture text -----**
125
ID = 2.5 A
VDD = 12 V
100
75
td(off), (VGS = 10 V)
tf, (VGS = 5 V) tr, (VGS = 5 V)
50
tf, (VGS = 10 V)
td(off), (VGS = 5 V)
25 t d(on) , (V GS = 10 V) tr, (VGS = 10 V) td(on), (VGS = 5 V)
0
0 200 400 600 800 1000 1200 1400 1600 1800 2000
RG ( � )
s)
�
TIME (
**----- End of picture text -----**
**Figure 18. Resistive Load Switching Time vs. Gate Resistance** **Figure 19. Drain−Source Voltage Slope during Turn On and Turn Off vs. Gate Resistance** **www.onsemi.com** **6** **NCV8405A, NCV8405B** ## **TYPICAL PERFORMANCE CURVES** **==> picture [489 x 178] intentionally omitted <==** **----- Start of picture text -----**
100
50% Duty Cycle
20%
10 10%
5%
2%
1
1%
0.1
Single Pulse
0.01
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
PULSE WIDTH (sec)
1” SQ 1 Oz COPPER
JA
�
R
**----- End of picture text -----**
**Figure 20. Transient Thermal Resistance** **==> picture [249 x 189] intentionally omitted <==** **----- Start of picture text -----**
140
TA 25 ° C
120
� JA Curve with PCB cu thk 1.0 oz
100
80
60
� JA Curve with PCB cu thk 2.0 oz
40
20
0
0 100 200 300 400 500 600 700
COPPER HEAT SPREADER AREA (mm [2] )
Figure 21. � JA vs. Copper
C/W)
°
JA (
�
**----- End of picture text -----**
**www.onsemi.com** **7** **NCV8405A, NCV8405B** ## **TEST CIRCUITS AND WAVEFORMS** **==> picture [207 x 208] intentionally omitted <==** **----- Start of picture text -----**
RL
VIN
D +
RG VDD
G DUT −
S
IDS
**----- End of picture text -----**
**Figure 22. Resistive Load Switching Test Circuit** **==> picture [332 x 167] intentionally omitted <==** **----- Start of picture text -----**
90%
10%
VIN
tON tOFF
90%
10%
IDS
**----- End of picture text -----**
**Figure 23. Resistive Load Switching Waveforms** **www.onsemi.com** **8** **NCV8405A, NCV8405B** ## **TEST CIRCUITS AND WAVEFORMS** **==> picture [252 x 223] intentionally omitted <==** **----- Start of picture text -----**
L
VDS
VIN
D +
RG
VDD
G DUT −
S
tp
IDS
**----- End of picture text -----**
**Figure 24. Inductive Load Switching Test Circuit** **==> picture [326 x 260] intentionally omitted <==** **----- Start of picture text -----**
5 V
VIN 0 V
Tav
T
p
V(BR)DSS
Ipk
VDD
VDS
VDS(on)
IDS
0
**----- End of picture text -----**
**Figure 25. Inductive Load Switching Waveforms** **www.onsemi.com** **9** **NCV8405A, NCV8405B** ## **ORDERING INFORMATION** |**ORDERING INFORMATION**||| |---|---|---| |**Device**|**Package**|**Shipping**†| |NCV8405ASTT1G|SOT−223
(Pb−Free)|1000 / Tape & Reel| |NCV8405ASTT3G|SOT−223
(Pb−Free)|4000 / Tape & Reel| |NCV8405ADTRKG|DPAK
(Pb−Free)|2500 / Tape & Reel| |NCV8405BDTRKG|DPAK
(Pb−Free)|2500 / Tape & Reel| †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. **www.onsemi.com** **10** MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** **==> picture [486 x 546] intentionally omitted <==** **----- Start of picture text -----**
4 DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
1 ® [2]
DATE 21 JUL 2015
3
SCALE 1:1
NOTES:
A 1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
E C 2. CONTROLLING DIMENSION: INCHES.
A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
4 NOT EXCEED 0.006 INCHES PER SIDE.
L3 Ele 4| Of Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE
D DETAIL A H OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
1 2 3 PLANE H.
7. OPTIONAL MOLD FEATURE.
L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX
b2 c BOTTOM VIEW A 0.086 0.094 2.18 2.38
e SIDE VIEW A1 0.000 0.005 0.00 0.13
b b 0.025 0.035 0.63 0.89
TOP VIEW 0.005 (0.13) M C b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46
c 0.018 0.024 0.46 0.61
c2 0.018 0.024 0.46 0.61
H Z Z D 0.235 0.245 5.97 6.22
E 0.250 0.265 6.35 6.73
e 0.090 BSC 2.29 BSC
L2 [GAUGE] PLANE C SEATINGPLANE H 0.370 0.410 9.40 10.41
L 0.055 0.070 1.40 1.78
L1 0.114 REF 2.90 REF
L2 0.020 BSC 0.51 BSC
L L3 0.035 0.050 0.89 1.27
A1 BOTTOM VIEW L4 −−− 0.040 −−− 1.01
wat L1 h GF CONSTRUCTIONSALTERNATE Z 0.155 −−− 3.93 −−−
DETAIL A
ROTATED 9 CW GENERIC
MARKING DIAGRAM*
STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:
PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE
2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE
3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE
4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE XXXXXXG AYWW
ALYWW XXX
STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: XXXXXG
PIN 1. MT1 PIN 1. GATE PIN 1. N/C PIN 1. ANODE PIN 1. CATHODE
2. MT2 2. COLLECTOR 2. CATHODE 2. CATHODE 2. ANODE
3. GATE 3. EMITTER 3. ANODE 3. RESISTOR ADJUST 3. CATHODE a d
4. MT2 4. COLLECTOR 4. CATHODE 4. CATHODE 4. ANODE
IC Discrete
SOLDERING FOOTPRINT* XXXXXX = Device Code
A = Assembly Location
6.20 3.00
L = Wafer Lot
0.244 0.118
2.58 Y = Year
0.102 WW = Work Week
G = Pb−Free Package
5.80 *This information is generic. Please refer
0.228 1.60 6.17 to device data sheet for actual part
0.063 0.243 marking.
Ts.
SCALE 3:1 mm
inches
**----- End of picture text -----**
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON10527D** Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. **DESCRIPTION: DPAK (SINGLE GAUGE) PAGE 1 OF 1** ~~ee~~ ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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