# Bipolar Pre-Biased / Digital Transistor, NPN and PNP Complement, 50 V, 100 mA, 22 kohm, 22 kohm

![Product image](https://novapart.co/image/farnell:2535589/)

**URL**: https://novapart.co/products/MUN5312DW1T1G/bipolar-pre-biased-digital-transistor-npn-and-pnp
**SKU**: MUN5312DW1T1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Pre-Biased / Digital Bipolar Transistors
**Price**: €0.1990
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 6 Pin |
| Power Dissipation | 385mW |
| Rf Transistor Case | SOT-363 |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | NPN and PNP Complement |
| Transistor Case Style | SOT-363 |
| Base Input Resistor R1 | 22kohm |
| Dc Current Gain Hfe Min | 60hFE |
| Resistor Ratio, R1 / R2 | 1(Ratio) |
| Base Emitter Resistor R2 | 22kohm |
| Operating Temperature Max | 150°C |
| Digital Transistor Polarity | NPN and PNP Complement |
| Continuous Collector Current | 100mA |
| Continuous Collector Current Ic | 100mA |
| Collector Emitter Voltage Max Npn | 50V |
| Collector Emitter Voltage Max Pnp | 50V |
| Collector Emitter Voltage V(Br)Ceo | 50V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2535589/)

## MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6 

## Complementary Bias Resistor Transistors R1 = 22 k R2 = 22 k **NPN and PNP Transistors with Monolithic Bias Resistor Network** 

This series of digital transistors is designed to replace a single device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. 

## **Features** 

- Simplifies Circuit Design 

- Reduces Board Space 

- Reduces Component Count 

- S and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q101 Qualified and PPAP Capable* 

- These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant 

## **MAXIMUM RATINGS** 

(TA = 25 ° C both polarities Q1 (PNP) & Q2 (NPN), unless otherwise noted) 

|**Rating**|**Symbol**|**Max**|**Unit**|
|---|---|---|---|
|Collector-Base Voltage|VCBO|50|Vdc|
|Collector-Emitter Voltage|VCEO|50|Vdc|
|Collector Current − Continuous|IC|100|mAdc|
|Input Forward Voltage|VIN(fwd)|40|Vdc|
|Input Reverse Voltage|VIN(rev)|10|Vdc|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

**ORDERING INFORMATION** 

**Device Package Shipping**[†] MUN5312DW1T1G, SOT−363 3,000 / Tape & Reel SMUN5312DW1T1G* NSVMUN5312DW1T3G* SOT−363 10,000 / Tape & Reel MUN5312DW1T2G, SOT−363 3,000 / Tape & Reel NSVMUN5312DW1T2G* NSBC124EPDXV6T1G SOT−563 4,000 / Tape & Reel NSBC124EPDXV6T5G SOT−563 8,000 / Tape & Reel ~~===~~ NSBC124EPDP6T5G SOT−963 8,000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

**www.onsemi.com** 

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PIN CONNECTIONS<br>(3) (2) (1)<br>R1 R2<br>Q1<br>Q2<br>R2 R1<br>aoe<br>(4) (5) (6)<br>MARKING DIAGRAMS<br>6<br>SOT−363 12 M<br>CASE 419B<br>1<br>SOT−563 12 M<br>CASE 463A<br>1<br>SOT−963 M<br>CASE 527AD<br>1<br>12/R = Specific Device Code<br>M = Date Code*<br>= Pb-Free Package<br>(Note: Microdot may be in either location)<br>R<br>**----- End of picture text -----**<br>


*Date Code orientation may vary depending upon manufacturing location. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2015 **June, 2015 − Rev. 3** 

**DTC124EP/D** 

## **MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6** 

## **THERMAL CHARACTERISTICS** 

|**THERMAL CHARACTERISTICS**||||
|---|---|---|---|
|**Characteristic**|**Symbol**|**Max**|**Unit**|
|**MUN5312DW1 (SOT−363) ONE JUNCTION HEATED**||||
|Total Device Dissipation<br>TA= 25°C<br>(Note 1)<br>(Note 2)<br>Derate above 25°C<br>(Note 1)<br>(Note 2)|PD|187<br>256<br>1.5<br>2.0|mW<br>mW/°C|
|Thermal Resistance,<br>(Note 1)<br>Junction to Ambient<br>(Note 2)|R�JA|670<br>490|°C/W|
|**MUN5312DW1 (SOT−363) BOTH JUNCTION HEATED**(Note 3)||||
|Total Device Dissipation<br>TA= 25°C<br>(Note 1)<br>(Note 2)<br>Derate above 25°C<br>(Note 1)<br>(Note 2)|PD|250<br>385<br>2.0<br>3.0|mW<br>mW/°C|
|Thermal Resistance,<br>Junction to Ambient<br>(Note 1)<br>(Note 2)|R�JA|493<br>325|°C/W|
|Thermal Resistance,<br>Junction to Lead (Note 1)<br>(Note 2)|R�JL|188<br>208|°C/W|
|Junction and Storage Temperature Range|TJ, Tstg|−55 to +150|°C|
|**NSBC124EPDXV6 (SOT−563) ONE JUNCTION HEATED**||||
|Total Device Dissipation<br>TA= 25°C<br>(Note 1)<br>Derate above 25°C<br>(Note 1)|PD|357<br>2.9|mW<br>mW/°C|
|Thermal Resistance,<br>Junction to Ambient<br>(Note 1)|R�JA|350|°C/W|
|**NSBC124EPDXV6 (SOT−563) BOTH JUNCTION HEATED**(Note 3)||||
|Total Device Dissipation<br>TA= 25°C<br>(Note 1)<br>Derate above 25°C<br>(Note 1)|PD|500<br>4.0|mW<br>mW/°C|
|Thermal Resistance,<br>Junction to Ambient<br>(Note 1)|R�JA|250|°C/W|
|Junction and Storage Temperature Range|TJ, Tstg|−55 to +150|°C|
|**NSBC124EPDP6 (SOT−963) ONE JUNCTION HEATED**||||
|Total Device Dissipation<br>TA= 25°C<br>(Note 4)<br>(Note 5)<br>Derate above 25°C<br>(Note 4)<br>(Note 5)|PD|231<br>269<br>1.9<br>2.2|MW<br>mW/°C|
|Thermal Resistance,<br>Junction to Ambient<br>(Note 4)<br>(Note 5)|R�JA|540<br>464|°C/W|
|**NSBC124EPDP6 (SOT−963) BOTH JUNCTION HEATED**(Note 3)||||
|Total Device Dissipation<br>TA= 25°C<br>(Note 4)<br>(Note 5)<br>Derate above 25°C<br>(Note 4)<br>(Note 5)|PD|339<br>408<br>2.7<br>3.3|MW<br>mW/°C|
|Thermal Resistance,<br>Junction to Ambient<br>(Note 4)<br>(Note 5)|R�JA|369<br>306|°C/W|
|Junction and Storage Temperature Range|TJ, Tstg|−55 to +150|°C|



1. FR−4 @ Minimum Pad. 

2. FR−4 @ 1.0 × 1.0 Inch Pad. 

3. Both junction heated values assume total power is sum of two equally powered channels. 

4. FR−4 @ 100 mm[2] , 1 oz. copper traces, still air. 

5. FR−4 @ 500 mm[2] , 1 oz. copper traces, still air. 

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## **MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6** 

**ELECTRICAL CHARACTERISTICS** (TA = 25 ° C both polarities Q1 (PNP) & Q2 (NPN), unless otherwise noted) 

|**Characteristic**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|
|**OFF CHARACTERISTICS**||||||
|Collector-Base Cutoff Current<br>(VCB= 50 V, IE= 0)|ICBO|−|−|100|nAdc|
|Collector-Emitter Cutoff Current<br>(VCE= 50 V, IB= 0)|ICEO|−|−|500|nAdc|
|Emitter-Base Cutoff Current<br>(VEB= 6.0 V, IC= 0)|IEBO|−|−|0.2|mAdc|
|Collector-Base Breakdown Voltage<br>(IC= 10�A, IE= 0)|V(BR)CBO|50|−|−|Vdc|
|Collector-Emitter Breakdown Voltage (Note 6)<br>(IC= 2.0 mA, IB= 0)|V(BR)CEO|50|−|−|Vdc|
|**ON CHARACTERISTICS**||||||
|DC Current Gain (Note 6)<br>(IC= 5.0 mA, VCE= 10 V)|hFE|60|100|−||
|Collector-Emitter Saturation Voltage (Note 6)<br>(IC= 10 mA, IB= 0.3 mA)|VCE(sat)|−|−|0.25|V|
|Input Voltage (Off)<br>(VCE= 5.0 V, IC= 100�A) (NPN)<br>(VCE= 5.0 V, IC= 100�A) (PNP)|Vi(off)|−<br>−|1.2<br>1.2|−<br>−|Vdc|
|Input Voltage (On)<br>(VCE= 0.2 V, IC= 5.0 mA) (NPN)<br>(VCE= 0.2 V, IC= 5.0 mA) (PNP)|Vi(on)|−<br>−|1.9<br>2.0|−<br>−|Vdc|
|Output Voltage (On)<br>(VCC= 5.0 V, VB= 2.5 V, RL= 1.0 k�)|VOL|−|−|0.2|Vdc|
|Output Voltage (Off)<br>(VCC= 5.0 V, VB= 0.5 V, RL= 1.0 k�)|VOH|4.9|−|−|Vdc|
|Input Resistor|R1|15.4|22|28.6|k�|
|Resistor Ratio|R1/R2|0.8|1.0|1.2||



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 6. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle ≤ 2%. 

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400<br>350<br>300<br>250<br>(1) SOT−363; 1.0  ×  1.0 Inch Pad<br>200 (2) SOT−563; Minimum Pad<br>(1) (2) (3)<br>(3) SOT−963; 100 mm [2] , 1 oz. Copper Trace<br>150<br>100<br>50<br>0<br>−50 −25 0 25 50 75 100 125 150<br>AMBIENT TEMPERATURE ( ° C)<br>, POWER DISSIPATION (mW)<br>D<br>P<br>**----- End of picture text -----**<br>


**Figure 1. Derating Curve** 

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**MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6** 

## **TYPICAL CHARACTERISTICS − NPN TRANSISTOR MUN5312DW1, NSBC124EPDXV6** 

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1 1000<br>I C /I B  = 10 VCE = 10 V TA =�150°C<br>25°C 25°C<br>150°C -55°C<br>0.1 100<br>TA = -55°C<br>0.01 10<br>0.001 1<br>0 10 20 30 40 50 1 10 100<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 2. VCE(sat) vs. IC Figure 3. DC Current Gain<br>3.2 100<br>150°C 25°C<br>2.8 f = 10 kHz TA�=�-55°C<br>IE = 0 A 10<br>2.4 T A  = 25 ° C<br>2.0<br>1<br>1.6<br>0.1<br>1.2<br>0.8<br>0.01<br>0.4<br>VO = 5 V<br>0<br>0 10 20 30 40 50 0.001 0 1 2 3 4 5 6 7 8 9 10<br>VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>hFE, DC CURRENT GAIN<br>VCE(sat), COLLECTOR-EMITTER VOLTAGE (V)<br>, OUTPUT CAPACITANCE (pF)<br>ob IC, COLLECTOR CURRENT (mA)<br>C<br>**----- End of picture text -----**<br>


**Figure 4. Output Capacitance** 

**Figure 5. Output Current vs. Input Voltage** 

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100<br>V O  = 0.2 V<br>10<br>T A �=�-55°C<br>1 25°C<br>150°C<br>0.1<br>0 10 20 30 40 50<br>IC, COLLECTOR CURRENT (mA)<br>Vin, INPUT VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 6. Input Voltage vs. Output Current** 

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**4** 

**MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6** 

## **TYPICAL CHARACTERISTICS − PNP TRANSISTOR MUN5312DW1, NSBC124EPDXV6** 

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1 1000<br>IC/IB = 10 VCE = 10 V<br>25 ° C TA�=�150 ° C<br>150°C 25°C<br>�0.1 100 -55°C<br>TA�=�-55°C<br>�0.01 10<br>�0.001 1<br>0 �10 �20 �30 �40 50 1 10 100<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 7. VCE(sat) vs. IC Figure 8. DC Current Gain<br>10 100 25°C<br>150°C<br>9<br>f = 10 kHz<br>8 l E  = 0 A 10 TA�=�-55°C<br>7 TA = 25 ° C<br>6 1<br>5<br>4 �0.1<br>3<br>2 �0.01<br>1 VO =  5 V<br>0 �0.001<br>0 10 20 30 40 50 0 1 �2 3 �4 �5 �6 �7 �8 �9 10<br>VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (VOLTS)<br>Figure 9. Output Capacitance Figure 10. Output Current vs. Input Voltage<br>100<br>VO = 0.2 V<br>10<br>TA = -55°C<br>1 25°C<br>150°C<br>�0.1<br>0 10 �20 �30 �40 �50<br>IC, COLLECTOR CURRENT (mA)<br>hFE, DC CURRENT GAIN<br>VCE(sat), COLLECTOR-EMITTER VOLTAGE (V)<br>OUTPUT CAPACITANCE (pF)<br>ob,  IC, COLLECTOR CURRENT (mA)<br>C<br>Vin, INPUT VOLTAGE (V)<br>**----- End of picture text -----**<br>


**Figure 11. Input Voltage vs. Output Current** 

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**MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6** 

## **TYPICAL CHARACTERISTICS − NPN TRANSISTOR NSBC124EPDP6** 

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**----- Start of picture text -----**<br>
1 1000<br>IC/IB = 10 VCE = 10 V 25 ° C 150 ° C<br>100 −55 ° C<br>25 ° C<br>0.1<br>150 ° C<br>10<br>−55 ° C<br>0.01 1<br>0 10 20 30 40 50 0.1 1 10 100<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 12. VCE(sat) vs. IC Figure 13. DC Current Gain<br>2.4 100<br>f = 10 kHz 150 ° C<br>2.0 I E  = 0 A −55 ° C<br>TA = 25 ° C 10 25 ° C<br>1.6<br>1.2 1<br>0.8<br>0.1<br>0.4<br>V O  = 5 V<br>0 0.01<br>0 10 20 30 40 50 0 2 4 6 8 10 12 14 16<br>VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>, DC CURRENT GAIN<br>FE<br>h<br>, COLLECTOR−EMITTER VOLTAGE (V)<br>CE(sat)<br>V<br>, OUTPUT CAPACITANCE (pF)Cob , COLLECTOR CURRENT (mA)IC<br>**----- End of picture text -----**<br>


**Figure 14. Output Capacitance** 

**Figure 15. Output Current vs. Input Voltage** 

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**----- Start of picture text -----**<br>
100<br>25 ° C<br>10<br>−55 ° C<br>150 ° C<br>1<br>V O = 0.2 V<br>0.1<br>0 10 20 30 40 50<br>IC, COLLECTOR CURRENT (mA)<br>, INPUT VOLTAGE (V)<br>in<br>V<br>**----- End of picture text -----**<br>


**Figure 16. Input Voltage vs. Output Current** 

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**MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6** 

## **TYPICAL CHARACTERISTICS − PNP TRANSISTOR NSBC124EPDP6** 

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1 1000<br>IC/IB = 10 25 ° C<br>150 ° C<br>25 ° C 150 ° C 100 −55 ° C<br>0.1<br>−55 ° C 10<br>V CE = 10 V<br>0.01 1<br>0 10 20 30 40 50 0.1 1 10 100<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 17. VCE(sat) vs. IC Figure 18. DC Current Gain<br>7 100<br>f = 10 kHz 150 ° C<br>6 I E  = 0 A −55 ° C<br>TA = 25 ° C<br>10<br>5<br>25 ° C<br>4<br>1<br>3<br>2<br>0.1<br>1<br>V O  = 5 V<br>0 0.01<br>0 10 20 30 40 50 0 2 4 6 8 10 12 14<br>VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V)<br>, DC CURRENT GAIN<br>FE<br>h<br>, COLLECTOR−EMITTER VOLTAGE (V)<br>CE(sat)<br>V<br>, OUTPUT CAPACITANCE (pF) , COLLECTOR CURRENT (mA)<br>Cob IC<br>**----- End of picture text -----**<br>


**Figure 19. Output Capacitance** 

**Figure 20. Output Current vs. Input Voltage** 

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**----- Start of picture text -----**<br>
100<br>25 ° C<br>10 −55 ° C<br>1 150 ° C<br>V O  = 0.2 V<br>0.1<br>0 10 20 30 40 50<br>IC, COLLECTOR CURRENT (mA)<br>, INPUT VOLTAGE (V)<br>in<br>V<br>**----- End of picture text -----**<br>


**Figure 21. Input Voltage vs. Output Current** 

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**MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6** 

## **PACKAGE DIMENSIONS** 

## **SC−88/SC70−6/SOT−363** 

CASE 419B−02 ISSUE Y 

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2X<br>aaa H D<br>D H NOTES:1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>A 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,<br>D GAGE PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-<br>PLANE SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.<br>4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF<br>6 5 4 THE PLASTIC BODY AND DATUM H.<br>L2 L 5. DATUMS A AND B ARE DETERMINED AT DATUM H.<br>E E1 DETAIL A 6. LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE<br>7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.<br>1 2 3<br>ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN<br>EXCESS OF DIMENSION b AT MAXIMUM  MATERIAL CONDI-<br>2X aaa C TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER<br>bbb H D 2X 3 TIPS RADIUS OF THE FOOT.<br>e MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>B 6X b A −−− −−− 1.10 −−− −−− 0.043<br>ddd M C A-B D A1 0.00 −−− 0.10 0.000 −−− 0.004<br>TOP VIEW A2 0.70 0.90 1.00 0.027 0.035 0.039<br>b 0.15 0.20 0.25 0.006 0.008 0.010<br>C 0.08 0.15 0.22 0.003 0.006 0.009<br>A2 DETAIL A D 1.80 2.00 2.20 0.070 0.078 0.086<br>A E 2.00 2.10 2.20 0.078 0.082 0.086<br>E1 1.15 1.25 1.35 0.045 0.049 0.053<br>e 0.65 BSC 0.026 BSC<br>L 0.26 0.36 0.46 0.010 0.014 0.018<br>L2 0.15 BSC 0.006 BSC<br>aaa 0.15 0.006<br>bbb 0.30 0.012<br>6X ccc C ccc 0.10 0.004<br>A1 C SEATINGPLANE c ddd 0.10 0.004<br>SIDE VIEW END VIEW<br>**----- End of picture text -----**<br>


1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 

## **RECOMMENDED** 

## **SOLDERING FOOTPRINT*** 

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6X 6X<br>0.30 0.66<br>2.50<br>0.65<br>PITCH<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

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**8** 

**MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6** 

## **PACKAGE DIMENSIONS** 

**SOT−563, 6 LEAD** CASE 463A ISSUE F 

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D<br>A<br>−X−<br>L<br>6 5 4<br>E<br>−Y− HE<br>1 2 3<br>b 6 5 PL C<br>e 0.08 (0.003) M X Y<br>**----- End of picture text -----**<br>


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NOTES:<br>1. DIMENSIONING AND TOLERANCING PER ANSI<br>Y14.5M, 1982.<br>2. CONTROLLING DIMENSION: MILLIMETERS<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD<br>FINISH THICKNESS. MINIMUM LEAD THICKNESS<br>IS THE MINIMUM THICKNESS OF BASE MATERIAL.<br>MILLIMETERS INCHES<br>DIM MIN NOM MAX MIN NOM MAX<br>A 0.50 0.55 0.60 0.020 0.021 0.023<br>b 0.17 0.22 0.27 0.007 0.009 0.011<br>C 0.08 0.12 0.18 0.003 0.005 0.007<br>D 1.50 1.60 1.70 0.059 0.062 0.066<br>E 1.10 1.20 1.30 0.043 0.047 0.051<br>e 0.5 BSC 0.02 BSC<br>L 0.10 0.20 0.30 0.004 0.008 0.012<br>HE 1.50 1.60 1.70 0.059 0.062 0.066<br>**----- End of picture text -----**<br>


## **SOLDERING FOOTPRINT*** 

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0.3<br>0.0118<br>0.45<br>0.0177<br>1.0<br>1.35 0.0394<br>0.0531<br>0.5 0.5<br>0.0197 0.0197<br>SCALE 20:1<br>� inches [mm] �<br>**----- End of picture text -----**<br>


*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

**www.onsemi.com** 

**9** 

**MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6** 

## **PACKAGE DIMENSIONS** 

**SOT−963** CASE 527AD ISSUE E 

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D X<br>A<br>Y<br>6 5 4<br>E HE<br>1 2 3<br>bad r l4<br>TOP VIEW | C — >|<br>SIDE VIEW<br>e 6X L<br>Et<br>6X L2 6X b<br>0.08 X Y<br>t BOTTOM VIEW o  ec o<br>**----- End of picture text -----**<br>


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NOTES:<br>1. DIMENSIONING AND TOLERANCING PER ASME<br>Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS<br>3. MAXIMUM LEAD THICKNESS INCLUDES LEAD<br>FINISH THICKNESS. MINIMUM LEAD<br>THICKNESS IS THE MINIMUM THICKNESS OF<br>BASE MATERIAL.<br>4. DIMENSIONS D AND E DO NOT INCLUDE MOLD<br>FLASH, PROTRUSIONS, OR GATE BURRS.<br>MILLIMETERS<br>DIM MIN NOM MAX<br>A 0.34 0.37 0.40<br>b 0.10 0.15 0.20<br>C 0.07 0.12 0.17<br>D 0.95 1.00 1.05<br>E 0.75 0.80 0.85<br>e 0.35 BSC<br>H E 0.95 1.00 1.05<br>L 0.19 REF<br>L2 0.05 0.10 0.15<br>**----- End of picture text -----**<br>


**==> picture [124 x 123] intentionally omitted <==**

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RECOMMENDED<br>MOUNTING FOOTPRINT*<br>6X 6X<br>0.20 0.35<br>PACKAGE<br>OUTLINE<br>1.20<br>0.35 oe<br>PITCH<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

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