# Bipolar (BJT) Single Transistor, General Purpose, NPN, 80 V, 500 mA, 225 mW, SOT-23, Surface Mount

![Product image](https://novapart.co/image/farnell:1611412/)

**URL**: https://novapart.co/products/MMBT8099LT1G/bipolar-bjt-single-transistor-general-purpose-npn
**SKU**: MMBT8099LT1G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Single Bipolar Junction Transistors - BJT
**Price**: €0.0910
**Stock**: 10+
**Lead Time**: 110 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Product Range | MMBTxxxx |
| Qualification | AEC-Q101 |
| Power Dissipation | 225mW |
| Dc Current Gain Hfe | 150hFE |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | NPN |
| Transition Frequency | 150MHz |
| Transistor Case Style | SOT-23 |
| Dc Current Gain Hfe Min | 150hFE |
| Operating Temperature Max | 150°C |
| Continuous Collector Current | 500mA |
| Collector Emitter Voltage Max | 80V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1611412/)

MMBT8099LT1G 

## Amplifier Transistor **NPN Silicon** 

## **Features** 

## **http://onsemi.com** 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

COLLECTOR 3 **MAXIMUM RATINGS** 1 **Rating Symbol Value Unit** BASE Collector-Emitter Voltage VCEO 80 Vdc Collector-Base Voltage VCBO 80 Vdc 2 EMITTER Emitter-Base Voltage VEBO 6.0 Vdc Collector Current − Continuous IC 500 mAdc ~~==~~ **THERMAL CHARACTERISTICS** 3 **Characteristic Symbol Max Unit** 1 ~~po~~ > 2 Total Device Dissipation FR−5 Board PD (Note 1) TA = 25 ° C 225 mW Derate above 25 ° C 1.8 mW/ ° C **SOT−23 (TO−236)** Thermal Resistance, Junction-to-Ambient R JA 556 ° C/W **CASE 318** (Note 1) **STYLE 6** Total Device Dissipation Alumina PD Substrate (Note 2) TDerate above 25 ° C A = 25 ° C 3002.4 mW/mW ° C **MARKING DIAGRAM** ~~po~~ Thermal Resistance, Junction-to-Ambient R JA 417 ° C/W (Note 2) KB M ~~ptt~~ Junction and Storage Temperature Range TJ, Tstg −55 to +150 ° C 

## **MARKING DIAGRAM** 

**==> picture [164 x 97] intentionally omitted <==**

**----- Start of picture text -----**<br>
KB M<br>1<br>KB = Specific Device Code<br>M = Date Code*<br>= Pb−Free Package<br>(Note: Microdot may be in either location)<br>*Date Code orientation and/or overbar may<br>vary depending upon manufacturing location.<br>**----- End of picture text -----**<br>


Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR−5 = 1.0 X 0.75 X 0.062 in. 2. Alumina = 0.4 X 0.3 X 0.024 in. 99.5% alumina. 

**ORDERING INFORMATION Device Package Shipping**[†] MMBT8099LT1G SOT−23 3000/Tape & Reel (Pb−Free) ~~ir~~ †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

Publication Order Number: **MMBT8099LT1/D** 

**1** 

© Semiconductor Components Industries, LLC, 2009 **August, 2009 − Rev. 2** 

## **MMBT8099LT1G** 

## **ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS**(TA= 25°C unless otherwise noted)|||||
|---|---|---|---|---|
|**Characteristic**|**Symbol**|**Min**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**|||||
|Collector−Emitter Breakdown Voltage (Note 3)<br>(IC= 10 mAdc, IB= 0)|V(BR)CEO|80|−|Vdc|
|Collector−Base Breakdown Voltage<br>(IC= 100�Adc, IE= 0)|V(BR)CBO|80|−|Vdc|
|Emitter−Base Breakdown Voltage<br>(IE= 10�Adc, IC= 0)|V(BR)EBO|6.0|−|Vdc|
|Collector Cutoff Current<br>(VCE= 60 Vdc, IB= 0)|ICES|−|0.1|�Adc|
|Collector Cutoff Current<br>(VCB= 60 Vdc, IE= 0)<br>(VCB= 80 Vdc, IE= 0)|ICBO|−<br>−|0.1<br>−|�Adc|
|Emitter Cutoff Current<br>(VEB= 6.0 Vdc, IC= 0)<br>(VEB= 4.0 Vdc, IC= 0)|IEBO|−<br>−|0.1<br>−|�Adc|
|**ON CHARACTERISTICS**(Note 3)|||||
|DC Current Gain<br>(IC= 1.0 mAdc, VCE= 5.0 Vdc)<br>(IC= 10 mAdc, VCE= 5.0 Vdc)<br>(IC= 100 mAdc, VCE= 5.0 Vdc)|hFE|100<br>100<br>75|300<br>−<br>−|−|
|Collector−Emitter Saturation Voltage<br>(IC= 100 mAdc, IB= 5.0 mAdc)<br>(IC= 100 mAdc, IB= 10 mAdc)|VCE(sat)|−<br>−|0.4<br>0.3|Vdc|
|Base−Emitter On Voltage<br>(IC= 1.0 mAdc, VCE= 5.0 Vdc)<br>(IC= 10 mAdc, VCE= 5.0 Vdc)|VBE(on)|−<br>0.6|−<br>0.8|Vdc|
|**SMALL−SIGNAL CHARACTERISTICS**|||||
|Current−Gain − Bandwidth Product<br>(IC= 10 mAdc, VCE= 5.0 Vdc, f = 100 MHz)|fT|150|−|MHz|
|Output Capacitance<br>(VCB= 5.0 Vdc, IE= 0, f = 1.0 MHz)|Cobo|−|6.0|pF|
|Input Capacitance<br>(VEB= 0.5 Vdc, IC= 0, f = 1.0 MHz)|Cibo|−|25|pF|



3. Pulse Test: Pulse Width � 300 � s, Duty Cycle � 2.0%. 

**http://onsemi.com** 

**2** 

**MMBT8099LT1G** 

**==> picture [493 x 645] intentionally omitted <==**

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TURN-ON TIME TURN-OFF TIME<br>-1.0 V VCC +VBB VCC<br>+40 V +40 V<br>5.0 �s 100 RL 100 RL<br>+10 V OUTPUT OUTPUT<br>Vin RB Vin RB<br>0<br>tr = 3.0 ns 5.0 �F * CS � 6.0 pF 5.0 �F * CS � 6.0 pF<br>100 100<br>5.0 �s<br>tr = 3.0 ns<br>*Total Shunt Capacitance of Test Jig and Connectors<br>For PNP Test Circuits, Reverse All Voltage Polarities<br>Figure 1. Switching Time Test Circuits<br>300 40<br>TJ = 25°C TJ = 25°C<br>200<br>20<br>5.0 V<br>VCE = 1.0 V Cibo<br>100 10<br>8.0<br>70<br>6.0<br>50<br>4.0<br>Cobo<br>30 2.0<br>1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100<br>IC, COLLECTOR CURRENT (mA) VR, REVERSE VOLTAGE (VOLTS)<br>Figure 2. Current−Gain − Bandwidth Product Figure 3. Capacitance<br>1.0 k 1.0 k<br>700 VCC = 40 V 700<br>500 IC/IB = 10 ts 500<br>IB1 = IB2<br>300 TJ = 25°C 300<br>200 200<br>100 100<br>70 70<br>50 tf 50 CURRENT LIMIT<br>THERMAL LIMIT<br>30 30<br>SECOND BREAKDOWN LIMIT<br>20 tr 20<br>td @ VBE(off) = 0.5 V DUTY CYCLE ≤ 10%<br>10 10<br>10 20 30 50 70 100 200 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100<br>IC, COLLECTOR CURRENT (mA) VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)<br>C, CAPACITANCE (pF)<br>f T, CURRENT-GAIN - BANDWIDTH PRODUCT (MHz)<br>t, TIME (ns)<br>IC , COLLECTOR CURRENT (mA)<br>**----- End of picture text -----**<br>


**Figure 4. Switching Times** 

**Figure 5. Active−Region Safe Operating Area** 

**http://onsemi.com** 

**3** 

**MMBT8099LT1G** 

**==> picture [490 x 630] intentionally omitted <==**

**----- Start of picture text -----**<br>
400 1.0<br>TJ = 25°C<br>TJ = 125°C 0.8<br>25°C VBE(sat) @ IC/IB = 10<br>200<br>-55°C<br>0.6<br>VBE @ VCE = 5.0 V<br>100 0.4<br>80 VCE = 5.0 V<br>60 0.2<br>VCE(sat) @ IC/IB = 10<br>40 0<br>0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100 200 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200<br>IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 6. DC Current Gain Figure 7. “ON” Voltages<br>2.0 -1.0<br>TJ = 25°C<br>IC = IC = IC = IC =<br>1.6 -1.4<br>20 mA 50 mA 100 mA 200 mA<br>1.2 -1.8<br>R�VB FOR VBE<br>-55°C TO 125°C<br>0.8 -2.2<br>0.4 -2.6<br>IC =<br>10 mA<br>0 -3.0<br>0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200<br>IB, BASE CURRENT (mA) IC, COLLECTOR CURRENT (mA)<br>Figure 8. Collector Saturation Region Figure 9. Base−Emitter Temperature Coefficient<br>1.0<br>0.7 D = 0.5<br>0.5<br>0.2<br>0.3<br>0.1<br>0.2<br>0.05 Z �JC (t) = r(t) • R �JC<br>0.070.1 SINGLE PULSE 0.02 0.01 P(pk) Z T J(pk) �JA (t)   - T = r(t) C  = P • R(pk) �JA Z �JC (t)<br>0.05 t 1 TD CURVES APPLY FOR J(pk)  - T A  = P (pk)  Z �JA (t)<br>0.03 SINGLE PULSE t 2 POWER PULSE TRAIN<br>0.02 SHOWN READ TIME AT t 1<br>DUTY CYCLE, D = t1/t2 (SEE AN469)<br>0.01<br>1.0 2.0 5.0 10 20 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k 20 k 50 k 100 k<br>t, TIME (ms)<br>, DC CURRENT GAIN V, VOLTAGE (VOLTS)<br>hFE<br>°<br>, COLLECTOR-EMITTER VOLTAGE (VOLTS)<br>VB, TEMPERATURE COEFFICIENT (mV/  C)<br>�<br>VCE R<br>THERMAL RESISTANCE<br>r(t), NORMALIZED TRANSIENT<br>**----- End of picture text -----**<br>


**Figure 10. Thermal Response** 

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**4** 

**MMBT8099LT1G** 

## **PACKAGE DIMENSIONS** 

**SOT−23 (TO−236)** CASE 318−08 ISSUE AN 

- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 

**==> picture [465 x 188] intentionally omitted <==**

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||||||||||
|---|---|---|---|---|---|---|---|---|
|D|1.|DIMENSIONING AND TOLERANCING PER ANSI|
|SEE VIEW C|Y14.5M, 1982.|
|3|2.|CONTROLLING DIMENSION: INCH.|
|3.|MAXIMUM LEAD THICKNESS INCLUDES LEAD|
|FINISH THICKNESS. MINIMUM LEAD|
|THICKNESS IS THE MINIMUM THICKNESS OF|
|E|HE|BASE MATERIAL.|
|4.|318−01 THRU −07 AND −09 OBSOLETE, NEW|
|STANDARD 318−08.|
|c|
|1|2|MILLIMETERS|INCHES|
|b|DIM|MIN|NOM|MAX|MIN|NOM|MAX|
|e|0.25|A|0.89|1.00|1.11|0.035|0.040|0.044|
|A1|0.01|0.06|0.10|0.001|0.002|0.004|
|b|0.37|0.44|0.50|0.015|0.018|0.020|
|c|0.09|0.13|0.18|0.003|0.005|0.007|
|D|2.80|2.90|3.04|0.110|0.114|0.120|
|A|E|1.20|1.30|1.40|0.047|0.051|0.055|
|e|1.78|1.90|2.04|0.070|0.075|0.081|
|L|L|0.10|0.20|0.30|0.004|0.008|0.012|
|A1|L1|0.35|0.54|0.69|0.014|0.021|0.029|
|L1|H|E|2.10|2.40|2.64|0.083|0.094|0.104|
|VIEW C|STYLE 6:|
|PIN 1.|BASE|
|2.|EMITTER|
|3.|COLLECTOR|

**----- End of picture text -----**<br>


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SOLDERING FOOTPRINT*<br>0.95<br>0.037<br>0.95<br>0.037<br>2.0<br>0.079<br>0.9<br>0.035<br>SCALE 10:1 mm<br>_ (— inches )<br>0.8<br>0.031 ="<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

**ON Semiconductor** and          are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

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**MMBT8099LT1/D** 

**5** 



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