# Bipolar (BJT) Single Transistor, General Purpose, NPN, 25 V, 5 A, 12.5 W, TO-252 (DPAK)

![Product image](https://novapart.co/image/farnell:2441274/)

**URL**: https://novapart.co/products/MJD200T4G/bipolar-bjt-single-transistor-general-purpose-npn
**SKU**: MJD200T4G
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || Transistors || Bipolar Transistors || Single Bipolar Junction Transistors - BJT
**Price**: €0.1820
**Stock**: 10+

## Description

Transistor Polarity:NPN; Collector Emitter Voltage V(br)ceo:25V; Transition Frequency ft:65MHz; Power Dissipation Pd:12.5W; DC Collector Current:5A; DC Current Gain hFE:70hFE; Tr

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | Lead (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 12.5W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | NPN |
| Transition Frequency | 65MHz |
| Transistor Case Style | TO-252 (DPAK) |
| Dc Current Gain Hfe Min | 70hFE |
| Operating Temperature Max | 150°C |
| Continuous Collector Current | 5A |
| Collector Emitter Voltage Max | 25V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2441274/)

## Complementary Plastic Power Transistors **NPN/PNP Silicon DPAK For Surface Mount Applications** 

## MJD200 (NPN), MJD210 (PNP) 

**www.onsemi.com** 

Designed for low voltage, low−power, high−gain audio amplifier applications. 

## **SILICON POWER TRANSISTORS 5 AMPERES 25 VOLTS, 12.5 WATTS** 

## **Features** 

- High DC Current Gain 

- Lead Formed for Surface Mount Applications in Plastic Sleeves (No Suffix) 

- Low Collector−Emitter Saturation Voltage 

|(No Suffix)<br>•Low Collector−Emitter Saturation Voltage||**25 VOLTS, 12.5 WATTS**|**25 VOLTS, 12.5 WATTS**|**25 VOLTS, 12.5 WATTS**|**25 VOLTS, 12.5 WATTS**|**25 VOLTS, 12.5 WATTS**|**25 VOLTS, 12.5 WATTS**|
|---|---|---|---|---|---|---|---|
|• Low Collector−Emitter Saturation Voltage||**PNP**|||**NPN**|||
|• High Current−Gain − Bandwidth Product||COLLECTOR|||COLLECTOR|||
|• Annular Construction for Low Leakage|||2,4|||2,4||
|• Epoxy Meets UL 94 V−0 @ 0.125 in<br>• NJV Prefix for Automotive and Other Applications Requiring<br>Unique Site and Control Change Requirements; AEC−Q101<br>Qualified and PPAP Capable|1<br>BASE<br>1<br>BASE<br>~~&)~~ ~~©~~|||||||
|• These Devices are Pb−Free and are RoHS Compliant|||3|||3||
|**MAXIMUM RATINGS**||EMITTER|||EMITTER|||
|||||||||
|**Rating**<br>**Symbol**<br>**Max**<br>**Unit**<br>Collector−Base Voltage<br>VCB<br>40<br>Vdc<br>Collector−Emitter Voltage<br>VCEO<br>25<br>Vdc<br>Emitter−Base Voltage<br>VEB<br>8.0<br>Vdc<br>~~———{~~|||**DPAK**<br>1 2<br>3<br>4<br> ~~+~~*|||||
|Collector Current − Continuous<br>IC<br>5.0<br>Adc|||**CASE 369C**|||||
|Collector Current − Peak<br>ICM<br>10<br>Adc|||**STYLE 1**|||||
|||||||||
|Base Current<br>IB<br>1.0<br>Adc<br>Total Power Dissipation<br>PD||**MARKING DIAGRAM**||||||
|@ TC= 25°C<br>Derate above 25°C<br>12.5<br>0.1<br>W<br>W/°C<br>Total Power Dissipation (Note 1)<br>@ TA= 25°C<br>Derate above 25°C<br>PD<br>1.4<br>0.011<br>W<br>W/°C<br>Operating and Storage Junction<br>Temperature Range<br>TJ, Tstg<br>−65 to +150<br>°C<br>ESD − Human Body Model<br>HBM<br>3B<br>V<br>ESD − Machine Model<br>MM<br>C<br>V<br>~~re~~<br>~~eee~~<br>~~——=~~||A<br>= Assembly Location<br>Y<br>= Year<br>WW<br>= Work Week<br>x = 1 or 0<br>G<br>= Pb−Free Package<br>AYWW<br>J2x0G<br>~~~~~||||||
|Stresses exceeding those listed in the Maximum Ratings table may damage the||||||||
|device. If any of these limits are exceeded, device functionality should not be||||||||
|assumed, damage may occur and reliability may be affected.||**ORDERING INFORMATION**||||||



1. These ratings are applicable when surface mounted on the minimum pad sizes recommended. 

See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. 

## **THERMAL CHARACTERISTICS** 

|**Characteristic**|**Symbol**|**Max**|**Unit**|
|---|---|---|---|
|Thermal Resistance, Junction−to−Case|R JC|10|°C/W|
|Thermal Resistance, Junction−to−Ambient (Note 2)|R JA|89.3|°C/W|



2. These ratings are applicable when surface mounted on the minimum pad sizes recommended. 

Publication Order Number: **MJD200/D** 

**1** 

© Semiconductor Components Industries, LLC, 2013 **October, 2019 − Rev. 14** 

## **MJD200 (NPN), MJD210 (PNP)** 

## **ELECTRICAL CHARACTERISTICS** (TC = 25 ° C unless otherwise noted) 

|**ELECTRICAL CHARACTERISTICS **(TC= 25°C unless otherwise noted)|||||
|---|---|---|---|---|
|**Characteristic**|**Symbol**|**Min**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**|||||
|Collector−Emitter Sustaining Voltage (Note 3)<br>(IC= 10 mAdc, IB= 0)|VCEO(sus)|25|−|Vdc|
|Collector Cutoff Current<br>(VCB= 40 Vdc, IE= 0)<br>(VCB= 40 Vdc, IE= 0, TJ= 125°C)|ICBO|−<br>−|100<br>100|nAdc<br>�Adc|
|Emitter Cutoff Current<br>(VBE= 8 Vdc, IC= 0)|IEBO|−|100|nAdc|
|**ON CHARACTERISTICS**|||||
|C Current Gain (Note 3),<br>(IC= 500 mAdc, VCE= 1 Vdc)<br>(IC= 2 Adc, VCE= 1 Vdc)<br>(IC= 5 Adc, VCE= 2 Vdc)|hFE|70<br>45<br>10|−<br>180<br>−|−|
|Collector−Emitter Saturation Voltage (Note 3)<br>(IC= 500 mAdc, IB= 50 mAdc)<br>(IC= 2 Adc, IB= 200 mAdc)<br>(IC= 5 Adc, IB= 1 Adc)|VCE(sat)|−<br>−<br>−|0.3<br>0.75<br>1.8|Vdc|
|Base−Emitter Saturation Voltage (Note 3)<br>(IC= 5 Adc, IB= 1 Adc)|VBE(sat)|−|2.5|Vdc|
|Base−Emitter On Voltage (Note 3)<br>(IC= 2 Adc, VCE= 1 Vdc)|VBE(on)|−|1.6|Vdc|
|**DYNAMIC CHARACTERISTICS**|||||
|Current−Gain − Bandwidth Product (Note 4)<br>(IC= 100 mAdc, VCE= 10 Vdc, ftest= 10 MHz)|fT|65|−|MHz|
|Output Capacitance<br>(VCB= 10 Vdc, IE= 0, f = 0.1 MHz)<br>MJD200<br>MJD210, NJVMJD210T4G|Cob|−<br>−|80<br>120|pF|
|3. Pulse Test: Pulse Width = 300�s, Duty Cycle�2%.<br>4. fT=⎪hfe⎪•ftest.|||||



**==> picture [486 x 184] intentionally omitted <==**

**----- Start of picture text -----**<br>
TA TC<br>2.5 25 VCC<br>+�30 V<br>2 20 25 �s<br>+11 V RC<br>0 SCOPE<br>1.5 15 RB<br>-�9 V<br>1 10 TA (SURFACE MOUNT) tr, tf ≤ 10 ns 51 D1<br>DUTY CYCLE = 1%<br>TC -�4 V<br>0.5 5<br>RB and RC VARIED TO OBTAIN DESIRED CURRENT LEVELS<br>D1 MUST BE FAST RECOVERY TYPE, e.g.:<br>0 0 25 50 75 100 125 150 �1N5825 USED ABOVE IB ≈ 100 mA FOR PNP TEST CIRCUIT,<br>�MSD6100 USED BELOW IB ≈ 100 mA REVERSE ALL POLARITIES<br>T, TEMPERATURE (°C)<br>PD, POWER DISSIPATION (WATTS)<br>**----- End of picture text -----**<br>


**Figure 1. Power Derating** 

**Figure 2. Switching Time Test Circuit** 

**www.onsemi.com** 

**2** 

**MJD200 (NPN), MJD210 (PNP)** 

**==> picture [475 x 170] intentionally omitted <==**

**----- Start of picture text -----**<br>
1K 10K<br>500 td 5K VCC = 30 V<br>300 3K ts IC/IB = 10<br>200 2K IB1 = IB2<br>100 1K TJ = 25°C<br>50 500<br>30 300<br>20 tr VCC = 30 V 200<br>IC/IB = 10<br>10 TJ = 25°C 100<br>5 50<br>3 30<br>2 MJD200 20 MJD200 tf<br>MJD210 MJD210<br>1 10<br>0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10 0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10<br>IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A)<br>t, TIME (ns) t, TIME (ns)<br>**----- End of picture text -----**<br>


**Figure 3. Turn−On Time** 

**Figure 4. Turn−Off Time** 

**www.onsemi.com** 

**3** 

**MJD200 (NPN), MJD210 (PNP)** 

**==> picture [486 x 201] intentionally omitted <==**

**----- Start of picture text -----**<br>
NPN PNP<br>MJD200 MJD210<br>400 TJ = 150°C 400<br>25°C TJ = 150°C<br>200 200<br>25°C<br>-�55°C<br>100 100<br>80 80 -�55°C<br>60 60<br>40 VCE = 1 V 40 VCE = 1 V<br>VCE = 2 V VCE = 2 V<br>20 20<br>0.05 0.07 0.1 0.2 0.3 0.5 0.7 1 2 3 5 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1 2 3 5<br>IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A)<br>hFE, DC CURRENT GAIN hFE, DC CURRENT GAIN<br>**----- End of picture text -----**<br>


**Figure 5. DC Current Gain** 

**==> picture [487 x 394] intentionally omitted <==**

**----- Start of picture text -----**<br>
2 2<br>TJ = 25°C TJ = 25°C<br>1.6 1.6<br>1.2 1.2<br>0.8 VBE(sat) @ IC/IB = 10 0.8 VBE(sat) @ IC/IB = 10<br>VBE @ VCE = 1 V VBE @ VCE = 1 V<br>0.4 0.4<br>VCE(sat) @ IC/IB = 10 VCE(sat) @ IC/IB = 10<br>0 0<br>0.05 0.07 0.1 0.2 0.3 0.5 0.7 1 2 3 5 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1 2 3 5<br>IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A)<br>Figure 6. “On” Voltage<br>+�2.5 +�2.5<br>+�2 *APPLIES FOR IC/IB ≤ hFE/3 +�2 *APPLIES FOR IC/IB ≤ hFE/3<br>+�1.5 +�1.5 25°C to 150°C<br>+�1 +�1<br>+�0.5 �VC for VCE(sat) 25°C to 150°C +�0.5 *�VC for VCE(sat)<br>0 0 -�55°C to 25°C<br>-�0.5 -�55°C to 25°C -�0.5<br>25°C to 150°C<br>-�1 25°C to 150°C -�1<br>-�1.5 -�1.5 �VB for VBE -�55°C to 25°C<br>�VB for VBE<br>-�2 -�55°C to 25°C -�2<br>-�2.5 -�2.5<br>0.05 0.07 0.1 0.2 0.3 0.5 0.7 1 2 3 5 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1 2 3 5<br>IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A)<br>V, VOLTAGE (VOLTS) V, VOLTAGE (VOLTS)<br>° °<br>V, TEMPERATURE COEFFICIENTS (mV/ C) V, TEMPERATURE COEFFICIENTS (mV/ C)<br>θ θ<br>**----- End of picture text -----**<br>


**Figure 7. Temperature Coefficients** 

**www.onsemi.com** 

**4** 

**MJD200 (NPN), MJD210 (PNP)** 

**==> picture [492 x 396] intentionally omitted <==**

**----- Start of picture text -----**<br>
1<br>0.7 D = 0.5<br>0.5<br>0.3 0.2<br>0.2 0.1 R�JC(t) = r(t) �JC P (pk)<br>0.05 R�JC = 10°C/W MAX<br>0.1<br>D CURVES APPLY FOR POWER<br>0.050.070.03 0 (SINGLE PULSE) 0.01 0.02 T PULSE TRAIN SHOWNREAD TIME AT tJ(pk) - T C = P (pk) 1 � JC (t) DUTY CYCLE, D = tt 1 t 2 1 /t 2<br>0.02<br>0.01<br>0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 50 100 200<br>t, TIME (ms)<br>Figure 8. Thermal Response<br>10 There are two limitations on the power handling ability of<br>5�ms<br>5 a transistor: average junction temperature and second<br>23 TJ = 150°C 100��s 1�ms limits of the transistor that must be observed for reliablebreakdown. Safe operating area curves indicate IC − VCEbreakdown. Safe operating area curves indicate IC − VCEC − VCE− VCECE<br>1 500��s operation; i.e., the transistor must not be subjected to greater<br>dc dissipation than the curves indicate.The data of Figure 9 is based on TJ(pk) = 150°C; TC is<br>0.1 BONDING WIRE LIMITEDTHERMALLY LIMITED @ TC = 25°C variable depending on conditions. Second breakdown pulselimits are valid for duty cycles to 10% provided TJ(pk)limits are valid for duty cycles to 10% provided TJ(pk)J(pk)<br>�(SINGLE PULSE)SECOND BREAKDOWN LIMITED ≤ 150°C. TJ(pk) may be calculated from the data in Figure 8. 150°C. TJ(pk) may be calculated from the data in Figure 8.°C. TJ(pk) may be calculated from the data in Figure 8.C. TJ(pk) may be calculated from the data in Figure 8.J(pk) may be calculated from the data in Figure 8. may be calculated from the data in Figure 8.<br>�CURVES APPLY BELOW At high case temperatures, thermal limitations will reduce<br>�RATED VCEO the power that can be handled to values less than the<br>0.010.3 1 2 3 5 7 10 20 30 limitations imposed by second breakdown.<br>VCE, COLLECTOR−EMITTER VOLTAGE (V)<br>r(t), TRANSIENT THERMAL<br>RESISTANCE (NORMALIZED)<br>IC, COLLECTOR CURRENT (AMP)<br>**----- End of picture text -----**<br>


There are two limitations on the power handling ability of a transistor: average junction temperature and second limits of the transistor that must be observed for reliablebreakdown. Safe operating area curves indicate IC − VCEbreakdown. Safe operating area curves indicate IC − VCEC − VCE− VCECE operation; i.e., the transistor must not be subjected to greater 

The data of Figure 9 is based on TJ(pk) = 150°C; TC isJ(pk) = 150°C; TC is = 150°C; TC is°C; TC isC; TC isC is is variable depending on conditions. Second breakdown pulselimits are valid for duty cycles to 10% provided TJ(pk)limits are valid for duty cycles to 10% provided TJ(pk)J(pk) ≤ 150°C. TJ(pk) may be calculated from the data in Figure 8. 150°C. TJ(pk) may be calculated from the data in Figure 8.°C. TJ(pk) may be calculated from the data in Figure 8.C. TJ(pk) may be calculated from the data in Figure 8.J(pk) may be calculated from the data in Figure 8. may be calculated from the data in Figure 8. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 

**Figure 9. Active Region Safe Operating Area** 

**==> picture [236 x 169] intentionally omitted <==**

**----- Start of picture text -----**<br>
200<br>TJ = 25°C<br>Cib<br>100<br>70<br>50<br>Cob<br>MJD200 (NPN)<br>30<br>MJD210 (PNP)<br>20<br>0.4 0.6 1 2 4 6 10 20 40<br>VR, REVERSE VOLTAGE (V)<br>C, CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**Figure 10. Capacitance** 

**www.onsemi.com** 

**5** 

**MJD200 (NPN), MJD210 (PNP)** 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Device**|**Package Type**|**Shipping**†|
|MJD200G|DPAK<br>(Pb−Free)|75 Units / Rail|
|MJD200RLG|DPAK<br>(Pb−Free)|1,800 / Tape & Reel|
|MJD200T4G|DPAK<br>(Pb−Free)|2,500 / Tape & Reel|
|MJD210G|DPAK<br>(Pb−Free)|75 Units / Rail|
|MJD210RLG|DPAK<br>(Pb−Free)|1,800 / Tape & Reel|
|MJD210T4G|DPAK<br>(Pb−Free)|2,500 / Tape & Reel|
|NJVMJD210T4G*|DPAK<br>(Pb−Free)|2,500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

**www.onsemi.com** 

**6** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

**==> picture [486 x 546] intentionally omitted <==**

**----- Start of picture text -----**<br>
4 DPAK (SINGLE GAUGE)<br>CASE 369C<br>ISSUE F<br>1 ® [2]<br>DATE 21 JUL 2015<br>3<br>SCALE 1:1<br>NOTES:<br>A 1. DIMENSIONING AND TOLERANCING PER ASME<br>Y14.5M, 1994.<br>E C 2. CONTROLLING DIMENSION: INCHES.<br>A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-<br>b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLDMENSIONS b3, L3 and Z.<br>FLASH, PROTRUSIONS, OR BURRS. MOLD<br>FLASH, PROTRUSIONS, OR GATE BURRS SHALL<br>4 NOT EXCEED 0.006 INCHES PER SIDE.<br>L3 Ele 4| Of Z 5. DIMENSIONS D AND E ARE DETERMINED AT THE<br>D DETAIL A H OUTERMOST EXTREMES OF THE PLASTIC BODY.<br>6. DATUMS A AND B ARE DETERMINED AT DATUM<br>1 2 3 PLANE H.<br>7. OPTIONAL MOLD FEATURE.<br>L4 NOTE 7 DIM MININCHESMAX MILLIMETERSMIN MAX<br>b2 c BOTTOM VIEW A 0.086 0.094 2.18 2.38<br>e SIDE VIEW A1 0.000 0.005 0.00 0.13<br>b b 0.025 0.035 0.63 0.89<br>TOP VIEW 0.005 (0.13) M C b2b3 0.0280.180 0.0450.215 0.724.57 1.145.46<br>c 0.018 0.024 0.46 0.61<br>c2 0.018 0.024 0.46 0.61<br>H Z Z D 0.235 0.245 5.97 6.22<br>E 0.250 0.265 6.35 6.73<br>e 0.090 BSC 2.29 BSC<br>L2 [GAUGE] PLANE C SEATINGPLANE H 0.370 0.410 9.40 10.41<br>L 0.055 0.070 1.40 1.78<br>L1 0.114 REF 2.90 REF<br>L2 0.020 BSC 0.51 BSC<br>L L3 0.035 0.050 0.89 1.27<br>A1 BOTTOM VIEW L4 −−− 0.040 −−− 1.01<br>wat L1 h GF CONSTRUCTIONSALTERNATE Z 0.155 −−− 3.93 −−−<br>DETAIL A<br>ROTATED 9  CW GENERIC<br>MARKING DIAGRAM*<br>STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:<br>PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. GATE<br>2. COLLECTOR 2. DRAIN 2. CATHODE 2. ANODE 2. ANODE<br>3. EMITTER 3. SOURCE 3. ANODE 3. GATE 3. CATHODE<br>4. COLLECTOR 4. DRAIN 4. CATHODE 4. ANODE 4. ANODE XXXXXXG AYWW<br>ALYWW XXX<br>STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: XXXXXG<br>PIN 1. MT1 PIN 1. GATE PIN 1. N/C PIN 1. ANODE PIN 1. CATHODE<br>2. MT2 2. COLLECTOR 2. CATHODE 2. CATHODE 2. ANODE<br>3. GATE 3. EMITTER 3. ANODE 3. RESISTOR ADJUST 3. CATHODE a d<br>4. MT2 4. COLLECTOR 4. CATHODE 4. CATHODE 4. ANODE<br>IC Discrete<br>SOLDERING FOOTPRINT* XXXXXX = Device Code<br>A = Assembly Location<br>6.20 3.00<br>L = Wafer Lot<br>0.244 0.118<br>2.58 Y =  Year<br>0.102 WW = Work Week<br>G = Pb−Free Package<br>5.80 *This information is generic. Please refer<br>0.228 1.60 6.17 to device data sheet for actual part<br>0.063 0.243 marking.<br>Ts.<br>SCALE 3:1 mm<br>inches<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON10527D** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. **DESCRIPTION: DPAK (SINGLE GAUGE) PAGE 1 OF 1** ~~ee~~ ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

www.onsemi.com 

© Semiconductor Components Industries, LLC, 2018 

**onsemi** , , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “ **onsemi** ” or its affiliates and/or subsidiaries in the United States and/or other countries. **onsemi** owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of **onsemi** ’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. **onsemi** reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and **onsemi** makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does **onsemi** assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using **onsemi** products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by **onsemi** . “Typical” parameters which may be provided in **onsemi** data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. **onsemi** does not convey any license under any of its intellectual property rights nor the rights of others. **onsemi** products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use **onsemi** products for any such unintended or unauthorized application, Buyer shall indemnify and hold **onsemi** and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that **onsemi** was negligent regarding the design or manufacture of the part. **onsemi** is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

**LITERATURE FULFILLMENT** : **TECHNICAL SUPPORT Email Requests to:** orderlit@onsemi.com **North American Technical Support: Europe, Middle East and Africa Technical Support:** Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 00421 33 790 2910 **onsemi Website:** www.onsemi.com Phone: 011 421 33 790 2910 For additional information, please contact your local Sales Representative 

◊ 

**==> picture [232 x 43] intentionally omitted <==**



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