# Graphic OLED, 136 x 16 Pixels, White on Black, 2.8V, SPI, 32.7mm x 32.2mm, -40 °C

![Product image](https://novapart.co/image/farnell:3407288/)

**URL**: https://novapart.co/products/MDOT136160AY-WS/graphic-oled-136-x-16-pixels-white-on-black-28v
**SKU**: MDOT136160AY-WS
**Manufacturer**: MIDAS DISPLAYS
**Category**: Optoelectronics & Displays || Displays || OLED Displays || Graphic OLED Displays
**Price**: €34.0700
**Stock**: 10+
**Lead Time**: 176 days (indicative)

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| Resolution | 136 x 16 Pixels |
| Module Size | 32.7mm x 32.2mm |
| Logic Voltage | 2.8V |
| Product Range | - |
| Interface Type | SPI |
| Display Appearance | White on Black |
| Display Construction | COT |
| Operating Temperature Max | 80°C |
| Operating Temperature Min | -40°C |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3407288/)

**Sauls Wharf House Crittens Road Great Yarmouth Norfolk NR31 0AG** 

Telephone +44 (0)1493 602602 Email:sales@midasdisplays.com Email:tech@midasdisplays.com www.midasdisplays.com 

|MDOT136160AY-WS|MDOT136160AY-WS|136 x 160|136 x 160|OLED Module|
|---|---|---|---|---|
|**Specification**|||||
|Version:    1|||Date:16/02/2015||
|**Revision**|||||
|1|13/02/2015||First Issue||



|DisplayFeatures|DisplayFeatures|||
|---|---|---|---|
|Resolution|136 x 160|||
|Appearance|White on Black|||
|Logic Voltage|2.8V|||
|Interface|SPI|||
|Module Size|32.70 x 54.85 x 1.00mm|||
|OperatingTemperature|-40°C ~ +80°C|BoxQuantity|Weight / Display|
|Construction|COT|---|---|



* - For full design functionality, please use this specification in conjunction with the SH1108 specification. (Provided Separately) 

|**Display Accessories**|**Display Accessories**||**Optional Variants**||
|---|---|---|---|---|
|**Part Number**|**Description**||**Appearance**|**Voltage**|



Page 1 of 17 

## **Basic Specifications** 

## Display Specifications 

- 1) Display Mode : Passive Matrix 2) Display Color : Monochrome (White) 3) Drive Duty : 1/160 Duty 

## Mechanical Specifications 

- 1) Outline Drawing : According to the annexed outline drawing 

- 2) Number of Pixels : 136 × 160 

- 3) Module Size : 32.70 × 54.85 × 1.00 (mm) 

- 4) Panel Size : 32.70 × 32.20 × 1.00 (mm)  as “Polarizer Free” 

- 5) Active Area : 27.18 × 23.1 (mm) 

- 6) Pixel Pitch : 0.17 × 0.17 (mm) 

- 7) Pixel Size : 0.15 × 0.15 (mm) 8) Weight : TBD (g) ± 10% 

## Memory Mapping & Pixel Construction 

**==> picture [320 x 289] intentionally omitted <==**

**----- Start of picture text -----**<br>
Driver IC Memory Mapping<br>( 136 x 160  in  160 x 160)<br>( Common 0 Row 1  ) Common 159(  Row 160  ) JA<br>Segment 134 Segment 135 0.17<br>(  Column 135 ) (  Column 136 ) 0.15<br>Segment 0 Segment 1<br>(  Row 1  ) (  Row 2  )<br>0.17 0.15<br>**----- End of picture text -----**<br>


Page 2 of 17 

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Page 3 of 17 

Pin Definition 

|Pin Definition||||
|---|---|---|---|
|Pin Number|Symbol|I/O|Function|
|**Power Supply**||||
|7<br>6<br>2|VDD<br>GND<br>VPP|P<br>P<br>P|**Power Supply for Logic**<br>This is a voltage supply pin.  It must be connected to external source.<br>**Ground of OEL System**<br>This is a ground pin.  It also acts as a reference for the logic pins, the OEL driving<br>voltages, and the analog circuits.  It must be connected to external ground.<br>**Power Supply for OEL Panel**<br>This is the most positive voltage supply pin of the chip.  It must be supplied<br>externally.|
|**Driver**||||
|5<br>4<br>3<br>8|VCOMH<br>VSEGM<br>VSL<br>IREF|O<br>O<br>P<br>O|**Voltage Output High Level for COM Signal**<br>This pin is for the voltage output high level for COM signals.  A capacitor should<br>be connected between this pin and GND.<br>**Voltage Output High Level for Segment Pre-Charge**<br>This pin is for the voltage output high level for SEG pre-charge.  A capacitor<br>should be connected between this pin and GND.<br>**Voltage Reference of Segment**<br>This pin is segment voltage reference pin.  A capacitor should be connected<br>between this pin and GND.<br>**Current Reference for Brightness Adjustment**<br>This pin is segment current reference pin.  A resistor should be connected<br>between thispin and GND.  Set the current at 15.625µA maximum.|
|**Interface**||||
|9<br>CSB<br>**Chip Select**<br>when CSB is pulled low.<br>10<br>RESB<br>I<br>**Power Reset for Controller and Driver**<br>This pin is reset signal input.  When the pin is low, initialization of the chip is<br>executed.<br>11<br>A0<br>I<br>**Data/Command Control**<br>When the pin is pulled high and serial interface mode is selected, the data at SI is<br>treated as data.  When it is pulled low, the data at SI will be transferred to the<br>command register.<br>12<br>SCL<br>I<br>**Serial Clock Input Signal**<br>The transmission of information in the bus is following a clock signal.  Each<br>transmission of data bit is taken place during a single clock period of this pin.<br>13<br>SI<br>I<br>**Serial Data Input Signal**<br>This pin acts as a communication channel.  The input data through SI are latched<br>at the rising edge of SCL in the sequence of MSB first and converted to 8-bit<br>parallel data and handled at the rising edge of last serial clock.<br>SI is identified to display data or command by A0 bit data at the rising of first SCL.<br>**Reserve**<br>1, 14<br>GND<br>-<br>**Reserved Pin (Supporting Pin)**<br>The supporting pins can reduce the influences from stresses on the function pins.<br>Thesepins must be connected to externalground as the ESDprotection circuit.||||



Page 4 of 17 

## A **bsolute Maximum Ratings** 

|Parameter|Symbol|Min|Max|Unit|Notes|
|---|---|---|---|---|---|
|Supply Voltage for Logic<br>Supply Voltage for Display<br>Operating Temperature<br>Storage Temperature<br>Life Time (200 cd/mP2<br>P)|VBDD<br>B<br>VBPP<br>B<br>TBOP<br>B<br>TBSTG<br>B|-0.3<br>0<br>-40<br>-40<br>20,000|3.6<br>10<br>70<br>85<br>-|V<br>V<br>°C<br>°C<br>hour|1, 2<br>1, 2<br>3|



Note 1: All the above voltages are on the basis of “GND B = 0V”. 

- Note 2: When this module is used beyond the above absolute maximum ratings, permanent breakage of the module may occur.  Also, for normal operations, it is desirable to use this module under the conditions according to Section 3. “Optics & Electrical Characteristics”.  If this module is used beyond these conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate. 

- Note 3:VBPPB = 12.0V, T Ba B = 25°C, 50% Checkerboard. Software configuration follows Section 4.5 Initialization. End of lifetime is specified as 50% of initial brightness reached.  The average operating lifetime at room temperature is estimated by the accelerated operation at high temperature conditions. 

Page 5 of 17 

## O **ptics & Electrical Characteristics** 

## Optics Characteristics 

|Optics Characteristics|||||||
|---|---|---|---|---|---|---|
|Characteristics|Symbol|Conditions|Min|Typ|Max|Unit|
|Brightness<br>C.I.E. (White)<br>Dark Room Contrast<br>Viewing Angle|LBbr<br>B<br>(x)<br>(y)<br>CR|Note 4<br>C.I.E. 1931|150<br>0.25<br>0.27<br>-<br>-|200<br>0.29<br>0.31<br>>10,000:1<br>Free|-<br>0.33<br>0.35<br>-<br>-|cd/mP2<br>P<br>degree|



* Optical measurement taken at VBDDB = 2.8V, VBPPB = 12.0V. Software configuration follows Section 4.5 Initialization. 

## DC Characteristics 

|DC Characteristics|||||||
|---|---|---|---|---|---|---|
|Characteristics|Symbol|Conditions|Min|Typ|Max|Unit|
|Supply Voltage for Logic<br>Supply Voltage for Display<br>High Level Input<br>Low Level Input<br>High Level Output<br>Low Level Output<br>Operating Current for VBDD<br>B<br>Operating Current for VBPP<br>B<br>Sleep Mode Current for VBDD<br>B<br>Sleep Mode Current for VBPP<br>B|VBDD<br>B<br>VBPP<br>PP<br>VIHC<br>VILC<br>VOHC<br>VOLC<br>IBDD<br>B<br>IBPP<br>B<br>IBDD, SLEEP<br>B<br>IBPP, SLEEP<br>B|Note 4<br>IBOH<br>B= -500µA<br>IBOL<br>B= 500µA<br>Note 5<br>Note 6<br>Note 7|1.65<br>11.5<br>0.8×VBDD<br>B<br>0<br>0.8×VBDD<br>B<br>0<br>-<br>-<br>-<br>-<br>-<br>-|2.8<br>12.0<br>-<br>-<br>-<br>-<br>170<br>10.7<br>15.8<br>26.6<br>2<br>1|3.5<br>12.5<br>VBDD<br>B<br>0.2×VBDD<br>B<br>VBDD<br>B<br>0.2×VBDD<br>B<br>250<br>13.4<br>19.8<br>33.3<br>5<br>5|V<br>V<br>V<br>V<br>V<br>V<br>µA<br>mA<br>mA<br>mA<br>µA<br>µA|



Note 4: Brightness (L Bbr B) and Supply Voltage for Display (VBPPB) are subject to the change of the panel characteristics and the customer’s request. Note 5: VBDDB = 2.8V, VBPP B = 12.0V, 30% Display Area Turn on. Note 6: VBDDB = 2.8V, VBPP B = 12.0V, 50% Display Area Turn on. Note 7: VBDDB = 2.8V, VBPP B = 12.0V, 100% Display Area Turn on. 

* Software configuration follows Section 4.5 Initialization. 

Page 6 of 17 

## AC Characteristics 

|Symbol|Description|Min|Max|Unit|
|---|---|---|---|---|
|tSCYC<br>tSAS<br>tSAH<br>tSDS<br>tSDH<br>tCSS<br>tCSH<br>tSLW<br>tSHW<br>tR<br>tF|Serial Clock Cycle Time<br>Address Setup Time<br>Address Hold Time<br>Data Setup Time<br>Data Hold Time<br>Chip Select Setup Time<br>Chip Select Hold Time<br>Serial Clock L Pulse Width<br>Serial Clock H Pulse Width<br>Rise Time<br>Fall Time|250<br>150<br>150<br>100<br>100<br>120<br>60<br>100<br>100<br>-<br>-|-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>15<br>15|ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns|



* (VDD - GND = 1.65V to 1.8V, Ta = 25°C) 

|Symbol|Description|Min|Max|Unit|
|---|---|---|---|---|
|tSCYC<br>tSAS<br>tSAH<br>tSDS<br>tSDH<br>tCSS<br>tCSH<br>tSLW<br>tSHW<br>tR<br>tF|Serial Clock Cycle Time<br>Address Setup Time<br>Address Hold Time<br>Data Setup Time<br>Data Hold Time<br>Chip Select Setup Time<br>Chip Select Hold Time<br>Serial Clock L Pulse Width<br>Serial Clock H Pulse Width<br>Rise Time<br>Fall Time|200<br>120<br>120<br>80<br>80<br>96<br>48<br>80<br>80<br>-<br>-|-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>12<br>12|ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns|



* (VDD - GND = 1.8V to 3.5V, Ta = 25°C) 

Page 7 of 17 

## **Functional Specification** 

## Commands 

Refer to the Technical Manual for the SH1108 

## Power down and Power up Sequence 

To protect OEL panel and extend the panel life time, the driver IC power up/down routine should include a delay period between high voltage and low voltage power sources during turn on/off.  It gives the OEL panel enough time to complete the action of charge and discharge before/after the operation. 

## Power up Sequence: 

1. Power up VBDDB 

2. Send Display off command 

3. Initialization 

4. Clear Screen 

5. Power up VBPP 

      - B 

6. Delay 100ms 

   - (When VBPP is stable) 

7. Send Display on command 

Power down Sequence: 

1. Send Display off command 

2. Power down VBPPB 

3. Delay 100ms (When VBPP is reach 0 and panel is completely discharges) 

4. Power down VBDDB 

**==> picture [165 x 207] intentionally omitted <==**

**----- Start of picture text -----**<br>
V [B] DD B on<br>V [B] PP B on<br>Display on<br>VBPP<br>VBDD<br>VBSS B/Ground<br>Display off<br>V [B] PP B off<br>V [B] DD B off<br>VBPP<br>VBDD<br>VBSS B/Ground<br>**----- End of picture text -----**<br>


Note 8: 

- 1) Since an ESD protection circuit is connected between VBDDB and VBPPB inside the driver IC, VBPPB becomes lower than V BDDB whenever VBDDB is ON and VBPPB is OFF. 

- 2) VPPB should be kept float (disable) when it is OFF. 

- 3) Power Pins (VBDDB, VPP) can never be pulled to ground under any circumstance. 

- 4) VBDDB should not be power down before VPP power down. 

## Reset Circuit 

When RESB input is low, the chip is initialized with the following status: 

1. Display is OFF 

2. 160 × 160 Display Mode 

3. Normal segment and display data column and row address mapping (SEG0 mapped to column address 00h and COM0 mapped to row address 00h) 

4. Shift register data clear in serial interface 

5. Display start line is set at display RAM address 0 

6. Column address counter is set at 0 

7. Normal scan direction of the COM outputs 

8. Contrast control register is set at 80h 

9. Internal booster is selected 

Page 8 of 17 

## Peripheral Circuit 

Page 9 of 17 

## Actual Application Example 

Command usage and explanation of an actual example 

<Power up Sequence> 

**==> picture [401 x 334] intentionally omitted <==**

**----- Start of picture text -----**<br>
Set Display Resolution Set VCOM Deselect Level<br>VBDDB/VBPPB off State<br>0xA9, 0x03  0xDB, 0x35<br>Power up VBDDB  Set Memory Addressing Mode Set VSEGM Deselect Level<br>(RES# as Low State)  0x20  0xDC, 0x35<br>Power Stabilized Set Contrast Control Set Entire Display Off<br>(Delay Recommended)  0x81, 0x88  0xA4<br>Set RES# as High Set DC/DC Control Set Normal Display<br>(3µs Delay Minimum)  0xAD, 0x80  0xA6<br>Initialized State Set Segment Re-Map<br>Clear Screen<br>(Parameters as Default)  0xA0<br>Set Display Off Set COM Output Scan Direction Power up VBPPB<br>0xAE  0xC0  (100ms Delay Recommended)<br>Initial Settings  Set VSL Set Display On<br>Configuration  0x30  0xAF<br>Set Display Clock Divide Ratio/Oscillator Frequency Set Discharge / Pre-Charge Period<br>Display Data Sent<br>0xD5, 0x60  0xD9, 0x47<br>**----- End of picture text -----**<br>


If the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function. 

<Power down Sequence> 

**==> picture [362 x 62] intentionally omitted <==**

**----- Start of picture text -----**<br>
Normal Operation Power down VBPPB  VBDDB/VBPPB off State<br>(100ms Delay Recommended)<br>Set Display Off<br>0xAE  Power down VBDDB<br>**----- End of picture text -----**<br>


Page 10 of 17 

<Entering Sleep Mode> 

**==> picture [273 x 260] intentionally omitted <==**

**----- Start of picture text -----**<br>
Normal Operation Power down VBPPB<br>Set Display Off<br>0xAE  Sleep Mode<br>a<br><Exiting Sleep Mode><br>Set Display On<br>Sleep Mode 0xAF<br>Power up VBPPB<br>Normal Operation<br>(100ms Delay Recommended)<br>=<br>**----- End of picture text -----**<br>


<Exiting Sleep Mode> 

Page 11 of 17 

## R **eliability** 

## Contents of Reliability Tests 

|Contents of Reliability Tests|||
|---|---|---|
|Item|Conditions|Criteria|
|High Temperature Operation<br>Low Temperature Operation<br>High Temperature Storage<br>Low Temperature Storage<br>High Temperature/Humidity Operation<br>Thermal Shock|70°C, 240 hrs<br>-40°C, 240 hrs<br>85°C, 240 hrs<br>-40°C, 240 hrs<br>60°C, 90% RH, 120 hrs<br>-40°C⇔85°C, 24 cycles<br>60 mins dwell|The operational<br>functions work.|



* The samples used for the above tests do not include polarizer. 

* No moisture condensation is observed during tests. 

## Failure Check Standard 

After the completion of the described reliability test, the samples were left at room temperature for 2 hrs prior to conducting the failure test at 23 ± 5 ° C; 55 ± 15% RH. 

Page 12 of 17 

## **Outgoing Quality Control Specifications** 

## Environment Required 

Customer’s test & measurement are required to be conducted under the following conditions: Temperature: 23 ± 5 ° C Humidity: 55 ± 15% RH Fluorescent Lamp: 30W Distance between the Panel & Lamp: ≥ 50cm Distance between the Panel & Eyes of the Inspector: ≥ 30cm Finger glove (or finger cover) must be worn by the inspector. Inspection table or jig must be anti-electrostatic. Level II, Normal Inspection, Single Sampling, MIL-STD-105E Criteria & Acceptable Quality Level Partition AQL Definition Major 0.65 Defects in Pattern Check (Display On) Minor 1.0 Defects in Cosmetic Check (Display Off) 6.3.1 Cosmetic Check (Display Off) in Non-Active Area Check Item Classification Criteria X > 6 mm (Along with Edge) Y > 1 mm (Perpendicular to edge) X Y Panel General Chipping Minor X Y WH ~~"g~~ Page 13 of 17 

## Sampling Plan 

Level II, Normal Inspection, Single Sampling, MIL-STD-105E 

## Criteria & Acceptable Quality Level 

## Cosmetic Check (Display Off) in Non-Active Area (Continued) 

|Cosmetic Check (Display Off) in Non-Active Area (Continued)|Cosmetic Check (Display Off) in Non-Active Area (Continued)|Cosmetic Check (Display Off) in Non-Active Area (Continued)|
|---|---|---|
|Check Item|Classification|Criteria|
|Panel Crack<br>Copper Exposed<br>(Even Pin or Film)<br>Film or Trace Damage<br>Terminal Lead Prober Mark<br>Glue or Contamination on Pin<br>(Couldn’t Be Removed by Alcohol)<br>Ink Marking on Back Side of panel<br>(Exclude on Film)|Minor<br>Minor<br>Minor<br>Acceptable<br>Minor<br>Acceptable|Any crack is not allowable.<br>Not Allowable by Naked Eye Inspection<br>Ignore for Any<br>YA<br>¢<br>-&<br>)<br>a<br>J<br>a|



Page 14 of 17 

Cosmetic Check (Display Off) in Active Area 

It is recommended to execute in clear room environment (class 10k) if actual in necessary. 

|Check Item|Classification|Criteria|
|---|---|---|
|Any Dirt & Scratch on Protective Film<br>Scratches, Fiber, Line-Shape Defect<br>(On Glass Display Side)<br>Dirt, Spot-Shape Defect<br>(On Glass Display Side)<br>Fingerprint, Flow Mark<br>(On Glass DisplaySide)|Acceptable<br>Minor<br>Minor<br>Minor|Ignore for Any<br>W≤0.1<br>Ignore<br>W > 0.1<br>L≤2<br>n≤1<br>L > 2<br>n = 0<br>Φ≤0.1<br>Ignore<br>0.1 < Φ≤0.25<br>n≤1<br>0.25 < Φ<br>n = 0<br>Not Allowable|



* Definition of W & L & Φ (Unit: mm): Φ = (a + b) / 2 

**==> picture [265 x 96] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>b: Minor Axis<br>W<br>a: Major Axis<br>**----- End of picture text -----**<br>


Page 15 of 17 

## 6.3.3 Pattern Check (Display On) in Active Area 

|Check Item|Classification|Criteria|
|---|---|---|
|No Display<br>Missing Line<br>Pixel Short<br>Darker Pixel<br>Wrong Display<br>Un-uniform|Major<br>Major<br>Major<br>Major<br>Major<br>Major||



Page 16 of 17 

Page 17 of 17 



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