# TFT LCD, 3.5 ", 240 x 320, QVGA, Portrait, Mono, 3.3V
**URL**: https://novapart.co/products/MCT035H6X240320PWL/tft-lcd-35-240-x-320-qvga-portrait-mono-33v
**SKU**: MCT035H6X240320PWL
**Manufacturer**: MIDAS DISPLAYS
**Category**: Optoelectronics & Displays || Displays || LCD Displays || TFT LCD Displays
**Price**: €38.2500
**Stock**: 10+
**Lead Time**: 120 days (indicative)
## Description
Display Size:3.5"; Resolution:240 x 320; VGA Size:QVGA; Display Orientation:Portrait; Display Appearance:Mono; Logic Voltage:3.3V; Interface Type:Parallel, SPI; Display Brightness:5
## Specifications
| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| Vga Size | QVGA |
| Resolution | 240 x 320 |
| Module Size | 62.9mm x 86.5mm |
| Touchscreen | No Touchscreen |
| Display Size | 3.5" |
| Logic Voltage | 3.3V |
| Product Range | - |
| Display Pinout | 22 Way FFC |
| Interface Type | Parallel, SPI |
| Display Appearance | Mono |
| Display Brightness | 500cd/m² |
| Display Orientation | Portrait |
| Operating Temperature Max | 80°C |
| Operating Temperature Min | -30°C |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:2483360/)
Sauls Wharf House Crittens Road Great Yarmouth Norfolk NR31 0AG
Telephone +44 (0)1493 602602 Email:sales@midasdisplays.com Email:tech@midasdisplays.com www.midasdisplays.com
**==> picture [464 x 169] intentionally omitted <==**
**----- Start of picture text -----**
S ecification
p
Part
Number:
renin
Version:
a
Date:
a
Revision
ee No. Date e e Description e Item eee Page
**----- End of picture text -----**
Page 1 of 20
## **Contents**
|||Page|
|---|---|---|
|1.|Revision History|3|
|2.|General Specification|4|
|3.|Module Coding System|5|
|4.|Interface Pin Function|6|
|5.|Contour Drawing|7|
|6.|Block Diagram|8|
|7.|Absolute Maximum Ratings|9|
|8.|Electrical Characteristics|10|
|9.|DC Characteristics|11|
|10.|AC Characteristics|12|
|11.|Optical Characteristics|16|
|12.|Reliability|18|
|13.|Initial Code For Reference|19|
Page 2 of 20
## **2. General Specification**
This technical specification applies to 3.45’ TFT-LCD panel. The 3.45’ TFT-LCD panel is designed for camcorder, digital camera application and other electronic products which require high quality flat panel displays. This module follows RoHS.
Dot Matrix: 240 x 320
Module dimension: 62.9 x 86.54 x 4.1 mm
Active Area: 53.28 x 71.04 mm
Dot pitch ： 0.222 x 0. 222 mm LCD type: TFT, Mono Transmissive View Direction ： Wide View Backlight Type: LED, Normally White
*Color tone slight changed by temperature and driving voltage.
Page 3 of 20
# **Midas Active Matrix Display Part Number System**
**MC T 057 A 6 * W 320240 L M L * * * * *** 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
- 1 = **MC:** Midas Components
- 2 = **T:** TFT **A:** Active Matrix OLED
- 3 = **Size**
- 4 = **Series** 5 = **Viewing Angle: 6:** 6 O’clock **12:** 12 O’clock **O:** All round
6 = **Blank:** No Touch **T:** Resistive Touchscreen **C:** Capacitive Touchscreen
7 = **Operating Temp Range: S:** 0 to 50Deg C **B:** -20+60Deg C **W:** -20+70Deg C **E:** -30+85Deg C
- 8 = **No of Pixels**
9 = **Orientation: P:** Portrait **L:** Landscape
- 10 = **Mode: R:** Reflective **M:** Transmissive **T:** Transflective **S:** Sunlight Readable (transmissive)
- **W:** White on Black (Monochrome)
- 11 = **Backlight: Blank:** None
## **L:** LED **C:** CCFL
- 12 = **Blank:** No Module/board **C:** Controller board module 13 = **Blank:** None **V** : Video 14 = **Blank:** None **B** : Bracket 15 = **Blank:** None **H** : Host Cable 16 = **Blank:** None **K** : Keyboard
F/Displays/Midas Brand/Midas Active Matrix Display Part Number System 09 Nov 2011.doc
Page 4 of 20
## **4. Interface Pin Function**
## **4.1. LCM PIN Definition**
|**Pin**|**Symbol**|**Function**|**Remark**|
|---|---|---|---|
|1|GND|Systemground||
|2|VDD|PowerSupply: +3.3V||
|3|NC|No connect||
|4|A0|Data/Command select||
|5|/WR(R/W)|Write strobe signal||
|6|/RD(E)|Read strobe signal||
|7|DB0|Data bus||
|8|DB1|Data bus||
|9|DB2|Data bus||
|10|DB3|Data bus||
|11|DB4|Data bus||
|12|DB5|Data bus||
|13|DB6|Data bus||
|14|DB7|Data bus||
|15|/CS|Chip select||
|16|/RESET(RSTB)H|Hardwarereset||
|17|IF0|Mode select|Note1|
|18|IF1|||
|19|A|LED +||
|20|K|LED -||
|21|NC|No connect||
|22
~~——————~~|NC
~~——————~~|No connect
~~——————~~|~~——————~~|
## Note1:
|Note1:|Note1:|||||||
|---|---|---|---|---|---|---|---|
|**Setting**||**MCU Type**|**Interface Pin Function **|||||
|**IF1**|**IF0**||**A0**
**CSB**|**A0**|**RWR**|**ERD**|**D[7:0]**|
|L|L|Parallel 8080 series MCU|CSB|A0|/WR|/RD|D[7:0]|
|L|H|Parallel 6800 series MCU|||R/W|E||
|H|H|Serial 4-Line series MCU|||-|-|D7=SCL, D0=SDA, D[6:1]
are not used|
|**H**|**L**|**Serial 3-Line series MCU**||-|-|-||
The un-used pins are marked as “-” and should be connected to “H” by VDDI.
Page 5 of 20
## **5. Contour Drawing**
**==> picture [419 x 140] intentionally omitted <==**
**----- Start of picture text -----**
| X 19 A
YU X L YD X R K
a, NC
22 NC
Stiffener
TT22 { Contact side a BI esssete Becsc RN s ose ce e O ceee sx
0.4 i 0.6 0. 3+ 0.05 23.00: Re}
1±0.1 P 21*1.0=21
The non-specified tolerance of dimension is + 0.3mm.
81.01±0.5
4±0.3
**----- End of picture text -----**
Page 6 of 20
## **6.Block Diagram**
## Mono TFT LCD 240 x 320 Dots
FPC inferface
Page 7 of 20
## **7.Absolute Maximum Ratings**
**Item Symbol Min Typ Max Unit** Operating Temperature TOP -30 － +80 ℃ Storage Temperature TST -30 － +80 ℃ ~~——~~ Note: Device is subject to be damaged permanently if stresses beyond those absolute maximum ratings listed above
1. Temp. ≦ 60 ℃ , 90% RH MAX. Temp. ＞ 60 ℃ , Absolute humidity shall be less than 90% RH at 60 ℃ Ambient Tem. vs Alloeable Forward Curren 40 30 20 10 00 20 40 60 80 100 Ambient Temperature(oC) ~~:~~
Page 8 of 20
## **8.Electrical Characteristics**
## **8.1. Operating conditions:**
|**Item**|**Symbol Condition**|**Symbol Condition**|**Min**|**Typ**|**Max**|**Unit**|**Remark**|
|---|---|---|---|---|---|---|---|
|Supply Voltage For LCM|Supply Voltage For LCM
VDD|－|3.0|3.3|3.6|V||
|Supply Current For LCM|Supply Current For LCM
IDD|－|－|13|－|mA|Note1|
|Power Consumption|－|－|－|－|46.8|mW||
Note1: This value is test for VDD=3.3V only
## **8.2. LED driving conditions**
|**8.2. LED driving conditionsg conditions conditions**|||||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Min.**|**Typ.**|**Max.**|**Unit**|**Remark**|
|LED current||－|160|－|mA||
|Power Consumption||－|－|－|mW||
|LED voltage|A-K|2.8|3.0|3.3|V|Note 1|
|LED Life Time||－|50,000|－|Hr|Note
2,3,4|
##
Note 1 : Power supply the back light specification Note 2 : Ta = 25 ℃
Note 3 : Brightness to be decreased to 50% of the initial value
Note 4 : The single LED lamp case
Page 9 of 20
## **9.DC CHARATERISTICS**
|**Parameter**|**Symbol**|**Rating**|**Rating**|**Rating**|**Unit**|**Condition**|
|---|---|---|---|---|---|---|
|||**Min**|**Typ**|**Max**|||
|Low level input voltage|VIL|0|-|0.3VDD|V||
|High level input
voltage|VIH|0.7VDD|-|VDD|V||
Page 10 of 20
## **10.AC CHARATERISTICS**
10.1. System Bus Timing for 6800 Series MPU
|Item
~~DR~~
~~SE~~|Symbol
Signal
~~OG~~|Symbol
~~OG~~|Condition
~~OG~~|Min
~~OG~~|Max
~~OG~~|Unit
~~OG~~|
|---|---|---|---|---|---|---|
|Address setuptime
~~DR~~
~~SE~~
~~Pe~~|A0
~~OG~~
|tAW6
~~OG~~
~~a~~|-
~~OG~~
~~ee~~|10
~~OG~~
~~ee~~|-
~~OG~~|ns
~~OG~~|
|Address hold time
~~SE~~
~~Pe~~
~~pO~~
~~po~~||tAH6
~~a~~
~~es~~|-
~~ee~~
~~es~~
~~ee~~|0
~~ee~~
~~es~~
~~ee~~|-
~~es~~||
|System cycle time
~~SE~~
~~Pe~~
~~pO~~
~~po~~
~~pO~~|E
|tCYC6
~~a~~
~~es~~
~~a~~|-
~~ee ~~
~~es~~
~~ee~~
~~ee~~|200
~~ee~~
~~es~~
~~ee~~
~~ee~~|-
~~es~~||
|Enable Lpulse width(WRITE)
~~pO ~~
~~po~~
~~pO~~
~~pO~~||tEWLW
~~es~~
~~a~~
~~a~~|-
~~es~~
~~ee~~
~~ee~~
~~ee~~|100
~~es~~
~~ee~~
~~ee~~
~~ee~~|-
~~es~~||
|Enable Hpulse width(WRITE)
~~po~~
~~pO~~
~~pO~~
~~po~~||tEWHW
~~a~~
~~a~~|-
~~ee ~~
~~ee~~
~~ee~~
~~ee~~|100
~~ee~~
~~ee~~
~~ee~~
~~**ee**~~|-
~~ee~~||
|Enable Lpulse width(READ)
~~pO~~
~~pO~~
~~po~~||tEWLR
~~a~~
~~a~~
~~ee~~
~~ee~~|-
~~ee ~~
~~ee~~
~~ee~~
~~ee~~
~~ee~~|130
~~ee~~
~~ee~~
~~ee~~
~~**ee**~~|-
~~ee~~
~~ee~~||
|Enable Hpulse width(READ)
~~pO~~
~~po~~||tEWHR
~~a~~
~~ee~~|-
~~ee ~~
~~ee~~
~~ee~~|130
~~ee~~
~~**ee**~~|-
~~ee~~||
|CSB setuptime
~~po~~
~~fe~~
~~po~~|CSB
~~fe~~|tCSS6
~~ee ~~
~~fe~~
~~ee~~|-
~~ee ~~
~~ee~~
~~fe~~
~~ee~~|100
~~**ee** ~~
~~fe~~
~~ee~~|-
~~ee~~
~~fe~~||
|CSB hold time
~~fe~~
~~po~~
~~pO~~||tCSH6
~~fe~~
~~ee~~
~~a~~|-
~~fe~~
~~ee~~
~~ee~~|100
~~fe~~
~~ee~~
~~ee~~|-
~~fe~~||
|Write data setuptime
~~po~~
~~pO~~
~~po~~|D[7:0]
|tDS6
~~ee ~~
~~a~~
~~a~~|-
~~ee~~
~~ee~~
~~ee~~|70
~~ee~~
~~ee~~
~~ee~~|-||
|Write data hold time
~~pO~~
~~po~~
~~pO~~||tDH6
~~a~~
~~a~~
~~a~~|-
~~ee~~
~~ee~~
~~ee~~|20
~~ee~~
~~ee~~
~~ee~~|-||
|Read data access time
~~po~~
~~pO~~
~~PO~~||tACC6
~~a~~
~~a~~
~~es~~|CL = 100pF
~~ee~~
~~ee~~
~~es~~
~~ee~~|-
~~ee~~
~~ee~~
~~es~~
~~ee~~|80
~~es~~
~~ee~~||
|Read data output disable time
~~pO~~
~~PO~~||tOH6
~~a~~
~~es~~|CL = 100pF
~~ee~~
~~es~~
~~ee~~|15
~~ee~~
~~es~~
~~ee~~|80
~~es~~
~~ee~~||
Note:
1. The input signal rise time and fall time (tr, tf) is specified at 15 ns or less. When the system cycle time is extremely fast,(tr + tf) ≤ (tCYC8 – tCCLW – tCCHW) for (tr + tf) ≤ (tCYC8 – tCCLR – tCCHR) are specified.
2. All timing is specified using 20% and 80% of VDDI as the reference.
3. tCCLW and tCCLR are specified as the overlap between CSB being “L” and /WR and /RD being at the “L” level.CSB and /WR (or /RD) cannot act at the same time and CSB should be 100ns wider than /WR (or /RD).
Page 11 of 20
## 10.2. System Bus Timing for 8080 Series MPU
|Item
~~a ~~
~~ee~~|Signal
~~GO~~
~~ee~~|Symbol
~~GO~~
~~ee~~|Condition
~~GO~~
~~eee~~|Min
~~GO~~
~~eee~~|Max
~~GO~~
~~eee~~|Unit
~~GO~~|
|---|---|---|---|---|---|---|
|Address setuptime
~~ee~~
~~po~~|A0
~~ee~~
~~Mi~~
|tAW8
~~ee~~
~~pO~~|-
~~eee~~
~~pO~~|10
~~eee~~
~~pO~~|-
~~eee~~
~~pO~~|ns|
|Address hold time
~~ee~~
~~po~~
~~|DESIGN«Mi~~
~~po~~||tAH8
~~ee~~
~~pO~~
~~VEACTURE~~
|-
~~eee~~
~~pO~~
~~VEACTURE~~
~~«|~~
|0
~~eee~~
~~pO~~
~~VEACTURE~~
~~«|SUIPPI~~
|-
~~eee~~
~~pO~~
~~VEACTURE~~
~~SUIPPI~~
||
|System cycle time
~~ee~~
~~po ~~
~~|DESIGN«Mi~~
~~po~~|/WR
~~ee~~
~~Mi~~
|tCYC8
~~ee~~
~~pO~~
~~VEACTURE~~
|-
~~eee~~
~~pO~~
~~VEACTURE~~
~~«|~~
|200
~~eee~~
~~pO~~
~~VEACTURE~~
~~«|SUIPPI~~
|-
~~eee~~
~~pO~~
~~VEACTURE~~
~~SUIPPI~~
||
|/WR Lpulse width(WRITE)
~~| DESIGN « Mi~~
~~po~~
~~po~~||tCCLW
~~VEACTURE~~
~~po~~|-
~~VEACTURE~~
~~«|~~
~~po~~
~~ee~~|100
~~VEACTURE~~
~~«|SUIPPI~~
~~po~~
~~ee~~|-
~~VEACTURE~~
~~SUIPPI~~
~~po~~
~~ee~~||
|/WR Hpulse width(WRITE)
~~po ~~
~~po~~||tCCHW
~~po~~
~~ee~~|-
~~«|~~
~~po~~
~~ee~~
~~ee~~|100
~~«| SUIPPI~~
~~po~~
~~ee~~
~~ee~~|-
~~SUIPPI~~
~~po~~
~~ee~~
~~ee~~||
|/RD Lpulse width(READ)
~~po~~
~~fF~~
~~po~~|/RD
~~fF~~
|tCCLR
~~po~~
~~fF~~
~~po~~|-
~~po~~
~~ee~~
~~fF~~
~~po~~|120
~~po~~
~~ee ~~
~~fF~~
~~po~~|-
~~po~~
~~ee~~
~~fF~~
~~po~~||
|/RD Hpulse width(READ)
~~fF~~
~~po~~||tCCHR
~~fF~~
~~po~~|-
~~fF~~
~~po~~|120
~~fF~~
~~po~~|-
~~fF~~
~~po~~||
|CSB setuptime
~~po ~~
~~OF~~
~~po~~|CSB
~~OF~~
|tCSS8
~~po~~
~~OF~~
~~po~~|-
~~po~~
~~OF~~
~~po~~|100
~~po~~
~~OF~~
~~po~~|-
~~po~~
~~OF~~
~~po~~||
|CSB hold time
~~OF~~
~~po~~
~~po~~
~~po~~||tCSH8
~~OF~~
~~po~~
~~ee~~|-
~~OF~~
~~po~~
~~ee~~
~~ee~~|100
~~OF~~
~~po~~
~~ee~~
~~ee~~|-
~~OF~~
~~po~~
~~ee~~
~~ee~~||
|Write data setuptime
~~po ~~
~~po~~
~~po~~
~~pO~~|D[7:0]
|tDS8
~~po~~
~~ee~~|-
~~po~~
~~ee~~
~~ee~~
~~ee~~|70
~~po~~
~~ee~~
~~ee~~
~~ee~~|-
~~po~~
~~ee~~
~~ee~~||
|Write data hold time
~~po ~~
~~po~~
~~pO~~
~~pO~~||tDH8
~~ee~~
~~ee~~|-
~~ee~~
~~ee~~
~~ee~~
~~ee~~
~~e~~~~**e**~~|20
~~ee~~
~~ee~~
~~ee~~
~~ee~~
~~**ee**~~|-
~~ee~~
~~ee~~
~~ee~~
~~**ee**~~||
|Read data access time
~~po~~
~~pO~~
~~pO~~||tACC8
~~ee~~
|CL = 100pF
~~ee ~~
~~ee~~
~~ee~~
~~e~~~~**e**~~
~~es~~|-
~~ee~~
~~ee~~
~~ee~~
~~**ee**~~|80
~~ee~~
~~ee~~
~~**ee**~~||
|Read data output disable time
~~pO~~
~~pO~~||tOH8
~~e~~|CL = 100pF
~~ee ~~
~~e~~~~**e**~~
~~ees~~|15
~~ee~~
~~**ee**~~|80
~~**ee**~~||
Note:
1. The input signal rise time and fall time (tr, tf) is specified at 15 ns or less. When the system cycle time is extremely fast,(tr + tf) ≤ (tCYC8 – tCCLW – tCCHW) for (tr + tf) ≤ (tCYC8 – tCCLR – tCCHR) are specified.
2. All timing is specified using 20% and 80% of VDDI as the reference.
3. tCCLW and tCCLR are specified as the overlap between CSB being “L” and /WR and /RD being at the “L” level.CSB and /WR (or /RD) cannot act at the same time and CSB should be 100ns wider than /WR (or /RD).
Page 12 of 20
## 10.3. System Bus Timing for 4-Line Serial Interface
|Item
~~ers~~
~~i~~
~~a’4~~
~~ee~~|Signal Symbol
~~ers~~
|Signal Symbol
~~ers~~
~~Ue~~
~~a~~|Condition
~~ers~~
~~e~~~~**e**~~|Min
~~ers~~
~~ee~~|Max
~~ers~~
~~eee~~|Unit
~~ers~~|
|---|---|---|---|---|---|---|
|Serialclockperiod
~~i~~
~~a’4~~
~~ee~~
~~ee,~~|SCL
|tSCYC
~~Ue~~
~~a~~
~~O~~|-
~~e~~~~**e**~~
~~O~~|80
~~ee~~|-
~~eee~~|ns|
|SCL “H”pulsewidth
~~i~~
~~a’4~~
~~ee~~
~~ee,~~||tSHW
~~Ue~~
~~a~~
~~O~~|-
~~e~~~~**e**~~
~~O~~
~~ee~~|40
~~ee~~
~~ee~~|-
~~eee~~
~~ee~~||
|SCL “L”pulsewidth
~~a’ 4 ~~
~~ee~~
~~ee, ~~||tSLW
~~a~~
~~O~~
~~ee~~|-
~~e~~~~**e** ~~
~~O~~
~~ee~~
~~ee~~|40
~~ee ~~
~~ee~~
~~ee~~|-
~~eee~~
~~ee~~
~~ee~~||
|Address setup time
~~es~~|A0
~~es~~|tSAS
~~es~~|-
~~ee~~
~~es~~
~~ee~~|40
~~ee ~~
~~es~~
~~ee~~|-
~~ee~~
~~es~~
~~ee~~||
|Addresshold time
~~es~~||tSAH
~~es~~
~~ee~~|-
~~es~~
~~ee~~
~~ee~~|40
~~es~~
~~ee~~
~~ee~~|-
~~es~~
~~ee~~
~~ee~~||
|Data setuptime
~~**p**~~
~~n~~|SDA
~~**p**~~
|tSDS
~~**p**f~~
~~a~~|-
~~ee~~
~~f~~
~~a~~|15
~~ee~~
~~f~~
~~ee~~|-
~~ee~~
~~f~~
~~ee~~||
|Datahold time
~~**p**~~
~~n~~
~~|~~||tSDH
~~**p**f~~
~~a~~|-
~~f~~
~~a~~
~~ee~~|20
~~f~~
~~ee~~
~~ee~~|-
~~f~~
~~ee~~
~~ee~~||
|CSB-SCLtime
~~n ~~
~~|DESIGN-M~~
~~PC~~|CSB
|tCSS
~~a~~
~~ee~~
~~JEACTURE~~|-
~~a~~
~~ee~~
~~ee~~
~~JEACTURE~~
~~«|~~|40
~~ee~~
~~ee~~
~~ee~~
~~JEACTURE~~
~~«|SUPPI~~|-
~~ee~~
~~ee~~
~~ee~~
~~JEACTURE~~
~~SUPPI~~||
|CSB-SCLtime
~~|DESIGN-M~~
~~PC~~||tCSH
~~JEACTURE~~|-
~~ee~~
~~JEACTURE~~
~~«|~~
~~ee~~|40
~~ee~~
~~JEACTURE~~
~~«|SUPPI~~
~~ee~~|-
~~ee~~
~~JEACTURE~~
~~SUPPI~~||
|CSB “H”pulse width
~~| DESIGN - M~~
~~PC~~||tCSW
~~JEACTURE~~
~~ee~~|-
~~ee ~~
~~JEACTURE~~
~~«|~~
~~ee~~
~~ee~~|15
~~ee ~~
~~JEACTURE~~
~~«|SUPPI~~
~~ee~~
~~ee~~|-
~~ee~~
~~JEACTURE~~
~~SUPPI~~
~~ee~~||
Note:
1. The input signal rise and fall time (tr, tf) are specified at 15 ns or less.
2. All timing is specified using 20% and 80% of VDDI as the standard.
Page 13 of 20
## 10.4. System Bus Timing for 3-Line Serial Interface
|Item
~~|~~
~~Src(ai‘irIWZT,~~
~~eei’ 4~~
~~ee,~~|Signal Symbol
~~ZT,|~~
|Signal Symbol
~~|~~
~~PT~~
~~es~~|Condition
~~PAQV~~
~~es~~
~~ee~~|Min
~~QV~~
~~|~~
~~es~~
~~ee~~|Max
~~lh~~
~~es~~
~~eee~~|Unit
~~lh~~|
|---|---|---|---|---|---|---|
|Serialclockperiod
~~|~~
~~Src(ai‘irIW ZT,~~
~~eei’ 4~~
~~ee,~~
~~PO~~|SCL
~~ZT, |~~
|tSCYC
~~|~~
~~PT ~~
~~es~~|-
~~PA QV~~
~~es~~
~~ee~~
~~e~~~~**e**~~|80
~~QV~~
~~| ~~
~~es~~
~~ee~~
~~ee~~|-
~~lh~~
~~es~~
~~eee~~|ns
~~lh~~|
|SCL “H”pulsewidth
~~ee i’ 4 ~~
~~ee,~~
~~PO~~
~~a~~||tSHW
~~es~~
~~es~~
|-
~~es~~
~~ee~~
~~es~~
~~e~~~~**e**~~
~~ee~~|40
~~es~~
~~ee~~
~~es~~
~~ee~~
~~ee~~|-
~~es~~
~~eee~~
~~es~~
~~ee~~||
|SCL “L”pulsewidth
~~ee,~~
~~PO~~
~~a~~||tSLW
~~e~~|-
~~ee ~~
~~e~~~~**e**~~
~~eee~~|40
~~ee ~~
~~ee~~
~~ee~~|-
~~eee~~
~~ee~~||
|Data setup time
~~PO~~
~~a~~
~~PO~~
~~ee~~|SDA
~~ee~~|tSDS
~~ee~~
|-
~~e~~~~**e** ~~
~~ee ~~
~~ee~~
~~e~~~~**e**~~
|15
~~ee~~
~~ee ~~
~~ee~~
~~ee~~
|-
~~ee~~
~~ee~~
~~ee~~
||
|Datahold time
~~PO~~
~~ee~~
~~ee~~||tSDH
~~ee~~
|-
~~ee~~
~~e~~~~**e**~~
~~ee~~|20
~~ee~~
~~ee~~
~~ee~~|-
~~ee~~
~~ee~~
~~ee~~||
|CSB-SCL time
~~PO ~~
~~ee~~
~~ee~~
~~fF~~|CSB
~~ee ~~|tCSS
~~ee~~
~~e~~
~~r~~~~**e**~~|-
~~ee~~
~~e~~~~**e**~~
~~eee~~
~~**ee**~~|40
~~ee~~
~~ee~~
~~ee~~
~~ee~~|-
~~ee~~
~~ee~~
~~ee~~
~~ee~~||
|CSB-SCLtime
~~ee~~
~~ee~~
~~fF~~
~~—CSCisd~~||tCSH
~~r~~~~**e**~~
~~e~~|-
~~e~~~~**e** ~~
~~ee~~
~~**ee**~~|40
~~ee ~~
~~ee~~
~~ee~~
~~ee~~|-
~~ee~~
~~ee~~
~~ee~~||
|CSB “H”pulse width
~~ee~~
~~fF~~
~~—CSCisd~~||tCSW
~~r~~~~**e**~~
~~e~~|-
~~ee ~~
~~**ee**~~|15
~~ee ~~
~~ee~~
~~ee~~|-
~~ee~~
~~ee~~||
Note:
1. The input signal rise and fall time (tr, tf) are specified at 15 ns or less.
2. All timing is specified using 20% and 80% of VDDI as the standard.
Page 14 of 20
## **11.Optical Characteristics**
|**Item**|**Item**|**Symbol Temp**|**Symbol Temp**|**Symbol Temp**
**Condition.**|**Min Typ. Max.**|**Min Typ. Max.**|**Min Typ. Max.**|**Unit**|**Remark**|
|---|---|---|---|---|---|---|---|---|---|
|Response time||Tr|25℃|℃
℃
θ=0°、Φ=0|-|35|-|.ms|Note 3|
|||Tf|25℃||-||-|||
|Contrast ratio||CR|25℃|℃
At optimized
viewing angle|-|900|-|-|Note 4|
|Viewing angle|Hor.|ΘR|25℃|℃
℃
℃
℃
CR≧10|80|||Deg.|Note 1
Note 2|
|||ΘL|25℃||80|||||
||Ver.|ΦB|25℃||80|||||
|||ΦT|25℃||80|||||
|Brightness||-|25℃|℃
-|400|500|-|cd/m 2|Center of
display|
Ta=25±2 ℃ , IL=160mA
Note 1: Definition of viewing angle range
Fig. 11.1. Definition of viewing angle
Note 2: Test equipment setup:After stabilizing and leaving the panel alone at a driven temperature for 10 minutes, the measurement should be executed. Measurement should be executed in a stable, windless, and dark room. Optical specifications are measured by Topcon BM-7(BM-5) luminance meter 1.0° field of view at a distance of 50cm and normal direction.
Page 15 of 20
**==> picture [223 x 11] intentionally omitted <==**
**----- Start of picture text -----**
Fig. 11.2. Optical measurement system setup
**----- End of picture text -----**
Note 3: Definition of Response time: Definition of response time ： The response time is defined as the time interval between the 10% and 90% amplitudes.
**==> picture [452 x 96] intentionally omitted <==**
**----- Start of picture text -----**
D is p la y
D a ta W h ite (T F T O F F ) B la c k (T F T O N ) W h ite (T F T O F F )
yw —
1 0 0 %
Ss 9 0 % FF SSS SSS
| \ /
ra)
S [S] || LN\ /—|
So \ /
Ss 1 0 % | \ / |
0 %
**----- End of picture text -----**
Note 4: Definition of contrast ratio : The contrast ratio is defined as the following expression
Page 16 of 20
## **12.Reliability**
## Content of Reliability Test (Super Wide temperature, -30 ℃ ~80 ℃ )
|**12.Reliability**
Content of Reliability Test (Super Wide temperature, -30y Test (Super Wide temperature, -30Test (Super Wide temperature, -30(Super Wide temperature, -30Super Wide temperature, -30℃~80℃)|**12.Reliability**
Content of Reliability Test (Super Wide temperature, -30y Test (Super Wide temperature, -30Test (Super Wide temperature, -30(Super Wide temperature, -30Super Wide temperature, -30℃~80℃)|**12.Reliability**
Content of Reliability Test (Super Wide temperature, -30y Test (Super Wide temperature, -30Test (Super Wide temperature, -30(Super Wide temperature, -30Super Wide temperature, -30℃~80℃)|**12.Reliability**
Content of Reliability Test (Super Wide temperature, -30y Test (Super Wide temperature, -30Test (Super Wide temperature, -30(Super Wide temperature, -30Super Wide temperature, -30℃~80℃)|
|---|---|---|---|
|**Environmental Test**||||
|**Test Item**|**Content of Test**|**Test Condition**|**Note**|
|High Temperature
storage|Endurance test applying the high storage temperature
for a longtime.|80℃
200hrs|2|
|Low Temperature
storage|Endurance test applying the low storage temperature
for a longtime.|-30℃
200hrs|1,2|
|High Temperature
Operation|Endurance test applying the electric stress (Voltage &
Current) and the thermal stress to the element for a
longtime.|80℃
200hrs|——|
|Low Temperature
Operation|Endurance test applying the electric stress under low
temperature for a longtime.|-30℃
200hrs|1|
|High Temperature/
Humidity storage|The module should be allowed to stand at 60
℃,90%RH max
For 96hrs under no-load condition excluding the
polarizer,
Then takingit out and dryingit at normal temperature.|60℃,90%RH
96hrs|1,2|
|Thermal shock
resistance|The sample should be allowed stand the following 10
cycles of
operation
-30℃25℃80℃
30min 5min 30min
1 cycle|-30℃/80℃
10 cycles|——|
|Vibration test|Endurance test applying the vibration during
transportation and using.|Vibration Frequency :
10~55Hz
One cycle 60
seconds to 3
directions of
X,Y,Z for Each 15
minutes
Total fixed
amplitude : 15mm|**3**|
|Static electricity test|Endurance test applying the electric stress to the
terminal.|VS=800V,
RS=1.5kΩ
CS=100pF
1 time|——|
Note1: No dew condensation to be observed.
Note2: The function test shall be conducted after 4 hours storage at the normal Temperature and humidity after remove from the test chamber. Note3: The packing have to including into the vibration testing.
Page 17 of 20
## **13.Initial Code For Reference**
**void Initial_code()**
**{**
**Write_Command(0xae); Write_Data(0xa5);**
**Write_Command(0x61); Write_Data(0x8f); Write_Data(0x04); Write_Data(0xa5); Write_Data(0xa5);**
**Write_Command(0x62); Write_Data(0x42); Write_Data(0x0b); Write_Data(0x0c); Write_Data(0xa5);**
**Write_Command(0x33); Write_Data(0x07); Write_Data(0x2c); Write_Data(0x09); Write_Data(0x2a);**
**Write_Command(0x63); Write_Data(0x09); Write_Data(0x17); Write_Data(0xa5); Write_Data(0xa5);**
**Write_Command(0x24); Write_Data(0x01); Write_Data(0xa5);**
Page 18 of 20
**Write_Data(0xa5); Write_Data(0xa5);**
**Write_Command(0x22); Write_Data(0x00); Write_Data(0xa5); Write_Data(0xa5); Write_Data(0xa5);**
**Write_Command(0x91); Write_Data(0x00); Write_Data(0x17); Write_Data(0x1b); Write_Data(0x1d); Write_Command(0x92); Write_Data(0x1f); Write_Data(0x21); Write_Data(0x23); Write_Data(0x25);**
**Write_Command(0x93); Write_Data(0x27); Write_Data(0x29); Write_Data(0x2a); Write_Data(0x2c);**
**Write_Command(0x94); Write_Data(0x2e); Write_Data(0x31); Write_Data(0x34); Write_Data(0x3f);**
**Write_Command(0x99); Write_Data(0x00); Write_Data(0x17); Write_Data(0x1b); Write_Data(0x1d);**
Page 19 of 20
**Write_Command(0x9a); Write_Data(0x1f); Write_Data(0x21); Write_Data(0x23); Write_Data(0x25);**
**Write_Command(0x9b); Write_Data(0x27); Write_Data(0x29); Write_Data(0x2a); Write_Data(0x2c);**
**Write_Command(0x9c); Write_Data(0x2e); Write_Data(0x31); Write_Data(0x34); Write_Data(0x3f);**
**Write_Command(0x12); Write_Data(0xa5); Write_Command(0x15); Write_Data(0xa5);**
**}**
Page 20 of 20
## Links
- [View this product on Novapart](https://novapart.co/products/MCT035H6X240320PWL/tft-lcd-35-240-x-320-qvga-portrait-mono-33v)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/midas/mct035h6x240320pwl/lcd-graphic-display-240-x-320/dp/2483360)
---
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