# Graphic OLED, 128 x 64, Green on Black, 2.8V, I2C, Parallel, SPI, 60.5mm x 37mm, -40 °C

![Product image](https://novapart.co/image/farnell:2342675/)

**URL**: https://novapart.co/products/MCOT128064EY-GM/graphic-oled-128-x-64-green-on-black-28v-i2c
**SKU**: MCOT128064EY-GM
**Manufacturer**: MIDAS DISPLAYS
**Category**: Optoelectronics & Displays || Displays || OLED Displays || Graphic OLED Displays
**Price**: €18.6100
**Stock**: 10+

## Description

Resolution:128 x 64; Display Appearance:Green on Black; Logic Voltage:2.8V; Interface Type:I2C, Parallel, SPI; Module Size:60.5mm x 37mm; Operating Temperature Min:-40°C; Operating Te

## Specifications

| Parameter | Value |
|---|---|
| Resolution | 128 x 64 |
| Module Size | 60.5mm x 37mm |
| Logic Voltage | 2.8V |
| Product Range | MCOT128064EY |
| Interface Type | I2C, Parallel, SPI |
| Display Appearance | Green on Black |
| Display Construction | TAB |
| Operating Temperature Max | 70°C |
| Operating Temperature Min | -40°C |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2342675/)

**Sauls Wharf House Crittens Road Great Yarmouth Norfolk NR31 0AG** 

Telephone +44 (0)1493 602602 Email:sales@midasdisplays.com Email:tech@midasdisplays.com www.midasdisplays.com 

|MCOT128064EY-GM|MCOT128064EY-GM|2 x 16|2 x 16|OLED Module|
|---|---|---|---|---|
|**Specification **|||||
|Version:    1|||Date:09/06/2012||
|**Revision**|||||
|1|06/06/2012||First Issue||



|DisplayFeatures|DisplayFeatures|||
|---|---|---|---|
|Resolution|128 x 64|||
|Appearance|Green on Black|||
|Logic Voltage|2.8V|||
|Interface|Multi|||
|Module Size|60.50 x 37.00 x 2.00mm|||
|OperatingTemperature|-40°C ~ +80°C|BoxQuantity|Weight / Display|
|Construction|COT|---|---|



* - For full design functionality, please use this specification in conjunction with the SSD1309 specification. (Provided Separately) 

|**Display Accessories**|**Display Accessories**|
|---|---|
|**Part Number**|**Description**|



|**Optional Variants**||
|---|---|
|**Appearance**|**Voltage**|



Page 1 of 21 

## **Basic Specifications** 

## **Display Specifications** 

1) Display Mode: Passive Matrix 2) Display Color: Monochrome (Green) 3) Drive Duty: 1/64 Duty 

- 3) Drive Duty: 

## **Mechanical Specifications** 

- 1) Outline Drawing: According to the annexed outline drawing 

- 2) Number of Pixels: 128 × 64 

- 3) Panel Size: 60.50 × 37.00 × 2.00 (mm) 4) Active Area: 55.01 × 27.49 (mm) 5) Pixel Pitch: 0.43 × 0.43 (mm) 6) Pixel Size: 0.40 × 0.40 (mm) 7) Weight: 8.81 (g) 

## **Active Area / Memory Mapping & Pixel Construction** 

**==> picture [371 x 427] intentionally omitted <==**

**----- Start of picture text -----**<br>
P0.43x128-0.03=55.01 (A/A)<br>(0, 0) Taf "A" : bt (Full 128 Driver IC Memory Mapping x  64)<br># | HH a ! 4<br>hi Si | tae? ai Oe | e P gc! | F<br>Segment 127 Segment 0 (127, 63)<br>(  Column 1  ) (  Column 128  )<br>Common 32 Common 0<br>(  Row 63  ) (  Row 64  )<br>Common 63 Common 31<br>(  Row 1  ) (  Row 2  )<br>0.43<br>0.4<br>a<br>rt<br>Detail "A"<br>Scale (10:1)<br>P0.43x64-0.03=27.49 (A/A)<br>0.43 0.4<br>**----- End of picture text -----**<br>


Page 2 of 21 

## **Mechanical Drawing** 

**==> picture [425 x 606] intentionally omitted <==**

**----- Start of picture text -----**<br>
T ro ! “| 0.4<br>0.43<br>(16.56)<br>- (21.84) 4 (1.4) a c :<br>— EF '<br>i ee Polarizer ————— Glue Protective Tape Contact Side \ — Contact Side<br>t=0.2mm 15x3.5x0.05mm<br>8<br>1 ee11<br>| = |<br>| aS<br>eet<br>0.1±0.03<br>1<br>(2.08) P0.43x64-0.03=27.49 (A/A) 2±0.3<br>(1.08) 29.49 (V/A) 6±0.2<br>0.5±0.5 31.5 (Polarizer) 10±0.2<br>32.408±0.2 (Cap Size) 17.6<br>37±0.2 (Panel Size) 18.6±0.3<br>(55.6)<br>Rev. A Size A3<br>Symbol N.C. (GND) VCC VCOMH IREF D7 D6 D5 D4 D3 D2 D1 D0 E/RD# R/W# D/C# RES# CS# NC BS2 BS1 VDD N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. VSS N.C. (GND)<br>Sheet 1 of 1<br>Material<br>Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31<br>Remark<br>Drawing Number MCOT128064EY-GM Soda Lime / Polyimide Scale 1:1<br>Original Drawing<br> )  )<br> ) Row 64 (  Row 2 (  P.M.<br>Common 0 Common 31<br>Segment 0 Column 128 (  Tiffany Hsu 20120323<br>Date<br>20120323<br>Ivy Lo<br>A Panel / E. 20120323<br>Item<br> )<br> )<br>Segment 127 Column 1 (  Common 32 Row 63 (  Common 63  ) Row 1 (  0.43 0.4 Detail "A" Scale (10:1) E.E.<br>20120323<br>Ting-Kuo Hu<br>(2.3)<br>Drawn Gary Lin 20120323<br>Title By Date<br>2±0.1 0.1±0.03 mm ±0.3 ±1<br>Tolerance<br>Unit Angle<br>Unless Otherwise Specified General Roughness Dimension<br>5<br>Signature<br>10 Customer Approval<br>31<br> 64 Pixels 32±0.2<br>59.5 (Polarizer) 57.01 (V/A) x<br>60.5±0.2 (Panel Size) 60.5±0.2 (Cap Size) W=0.5±0.03 20±0.1 (Alignment Hole) P1.0x(31-1)=30±0.05<br>P0.43x128-0.03=55.01 (A/A) 128<br>Active Area 2.42"<br>1<br>"A" (14.25)<br>0.5±0.5 (1.75) (2.75)<br>1.0±0.1 φ 2-<br>N.C. (GND)<br>VSS<br>N.C.<br>N.C.<br>N.C.<br>N.C.<br>N.C.<br>N.C.<br>N.C.<br>N.C.<br>VDD<br>BS1<br>BS2<br>NC<br>CS#<br>RES#<br>D/C#<br>R/W#<br>E/RD#<br>D0<br>D1<br>D2<br>D3<br>D4<br>D5<br>D6<br>D7<br>IREF<br>VCOMH<br>VCC<br>N.C. (GND)<br>**----- End of picture text -----**<br>


Page 3 of 21 

## **Pin Definition** 

|**Pin Definition**||||
|---|---|---|---|
|**Pin Number**|**Symbol**|**I/O**|**Function**|
|**Power Supply**||||
|21<br>30<br>2<br>~~—~~<br>|VDD<br>VSS<br>VCC<br>~~—~~<br>|P<br>P<br>P<br>|**Power Supply for Logic Circuit**<br>This is a voltage supply pin.  It must be connected to external source.<br>**Ground of OEL System**<br>This is a ground pin.  It also acts as a reference for the logic pins, the OEL driving<br>voltages, and the analog circuits.  It must be connected to external ground.<br>**Power Supply for OEL Panel**<br>This is the most positive voltage supply pin of the chip.  It must be supplied<br>externally.<br>~~-——___~~|
|**Driver**<br>~~-——___~~||||
|4<br>3<br>~~J~~|IREF<br>VCOMH<br>~~J ~~|I<br>O<br>|**Current Reference for Brightness Adjustment**<br>This pin is segment current reference pin.  A resistor should be connected<br>between this pin and VSS.  Set the current at 10μA.<br>**Voltage Output High Level for COM Signal**<br>This pin is the input pin for the voltage output high level for COM signals.  A<br>capacitor should be connected between this pin and VSS.<br> ~~-——___~~|
|**Interface**<br> ~~-——___~~||||
|20<br>19<br>16<br>17<br>15<br>13<br>14<br>5~12|BS1<br>BS2<br>RES#<br>CS#<br>D/C#<br>E/RD#<br>R/W#<br>D0~D7|I<br>I<br>I<br>I<br>I<br>I<br>I/O|**Communicating Protocol Select**<br>These pins are MCU interface selection input.  See thefollowing table:<br>BS1<br>BS2<br>I2C<br>1<br>0<br>4-wire Serial<br>0<br>0<br>8-bit 68XX Parallel<br>0<br>1<br>8-bit 80XX Parallel<br>1<br>1<br>**Power Reset for Controller and Driver**<br>This pin is reset signal input.  When the pin is low, initialization of the chip is<br>executed.  Keep this pin pull high during normal operation.<br>**Chip Select**<br>This pin is the chip select input.  The chip is enabled for MCU communication only<br>when CS# is pulled low.<br>**Data/Command Control**<br>This pin is Data/Command control pin.  When the pin is pulled high, the input at<br>D7~D0 will be interpreted as display data.  When the pin is pulled low, the input<br>at D7~D0 will be transferred to the command register.<br>When the pin is pulled high and serial interface mode is selected, the data at SDIN<br>will be interpreted as data.  When it is pulled low, the data at SDIN will be<br>transferred to the command register.  In I2C mode, this pin acts as SA0 for slave<br>address selection.<br>For detail relationship to MCU interface signals, please refer to the Timing<br>Characteristics Diagrams.<br>**Read/Write Enable or Read**<br>This pin is MCU interface input.  When interfacing to a 68XX-series<br>microprocessor, this pin will be used as the Enable (E) signal. Read/write operation<br>is initiated when this pin is pulled high and the CS# is pulled low.<br>When connecting to an 80XX-microprocessor, this pin receives the Read (RD#)<br>signal.  Data read operation is initiated when this pin is pulled low and CS# is<br>pulled low.<br>When serial or I2C mode is selected, this pin must be connected to VSS.<br>**Read/Write Select or Write**<br>This pin is MCU interface input.  When interfacing to a 68XX-series<br>microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull<br>this pin to “High” for read mode and pull it to “Low” for write mode.<br>When 80XX interface mode is selected, this pin will be the Write (WR#) input.<br>Data write operation is initiated when this pin is pulled low and the CS# is pulled<br>low.<br>When serial or I2C mode is selected, this pin must be connected to VSS.<br>**Host Data Input/Output Bus**<br>These pins are 8-bit bi-directional data bus to be connected to the<br>microprocessor’s data bus.  When serial mode is selected, D1 will be the serial<br>data input SDIN and D0 will be the serial clock input SCLK.  When I2C mode is<br>selected, D2, D1 should be tired together and serve as SDAOUT, SDAINin application<br>and D0 is the serial clock input, SCL.<br>Unusedpins must be connected to VSSexcept for D2 in serial mode.<br>~~e~~e|



Page 4 of 21 

## **Pin Definition (Continued)** 

|**Pin Number**|**Symbol**|**I/O**|**Function**|
|---|---|---|---|
|**Reserve**||||
|18, 22~29<br>1, 31|N.C.<br>N.C. (GND)|-<br>-|**Reserved Pin**<br>The N.C. pins between function pins are reserved for compatible and flexible<br>design.<br>**Reserved Pin (Supporting Pin)**<br>The supporting pins can reduce the influences from stresses on the function pins.<br>Thesepins mustbe connectedtoexternalground as the ESDprotection circuit.|



## **Block Diagram** 

**==> picture [173 x 45] intentionally omitted <==**

**----- Start of picture text -----**<br>
Active Area 2.42"<br>128  x  64 Pixels<br>**----- End of picture text -----**<br>


**==> picture [164 x 129] intentionally omitted <==**

**----- Start of picture text -----**<br>
~ ~ ~ ~ ~<br>SSD1309<br>~<br>Oe es eeWe<br>i] h4K4 C1<br>R1 C2<br>C5<br>C3<br>C4<br>Common 63 Common 32 Segment 127 Segment 0 Common 0 Common 31<br>VCC VCOMH IREF D7 D0 E/RD# R/W# D/C# RES# CS# BS2 BS1 VDD VSS<br>**----- End of picture text -----**<br>


MCU Interface Selection: BS1 and BS2 

Pins connected to MCU interface: D7~D0, E/RD#, R/W#, D/C#, RES#, and CS# 

C1, C3: 0.1μF 

C2: 4.7μF C4: 10μF C5: 4.7μF / 25V Tantalum Capacitor R1: 910kΩ, R1 = (Voltage at IREF - BGGND) / IREF 

Page 5 of 21 

## **Absolute Maximum Ratings** 

|**Parameter**|**Symbol**|**Min**|**Max**|**Unit**|**Notes**|
|---|---|---|---|---|---|
|Supply Voltage for Logic<br>Supply Voltage for Display<br>Operating Temperature<br>Storage Temperature|VDD<br>VCC<br>TOP<br>TSTG|-0.3<br>0<br>-40<br>-40|4<br>15<br>70<br>85|V<br>V<br>°C<br>°C|1, 2<br>1, 2<br>3<br>3|



## Life Time 55 cd/m2 , 100,000 hours (TYP) Note4. 

Note 1: All the above voltages are on the basis of “VSS = 0V”. 

- Note 2: When this module is used beyond the above absolute maximum ratings, permanent breakage of the module may occur.  Also, for normal operations, it is desirable to use this module under the conditions according to Section 3. “Optics & Electrical Characteristics”.  If this module is used beyond these conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate. 

- Note 3: The defined temperature ranges do not include the polarizer.  The maximum withstood temperature of the polarizer should be 80°C. 

- Note 4: VCC = 13.0V, Ta = 25°C, 50% Checkerboard. 

   - Software configuration follows Section 4.4 Initialization. 

End of lifetime is specified as 50% of initial brightness reached.  The average operating lifetime at room temperature is estimated by the accelerated operation at high temperature conditions. 

Page 6 of 21 

**Optics & Electrical Characteristics** 

## **Optics Characteristics** 

|**Optics Characteristics**|||||||
|---|---|---|---|---|---|---|
|**Characteristics**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|Brightness<br>C.I.E. (Green)<br>Dark Room Contrast<br>Viewing Angle|Lbr<br>(x)<br>(y)<br>CR|Note 5<br>C.I.E. 1931|100<br>0.25<br>0.62<br>-<br>-|120<br>0.29<br>0.66<br>>10,000:1<br>Free|-<br>0.33<br>0.70<br>-<br>-|cd/m2<br>degree|



* Optical measurement taken at VDD = 2.8V, VCC = 13.0V. Software configuration follows Section 4.4 Initialization. 

## **DC Characteristics** 

|**DC Characteristics**|||||||
|---|---|---|---|---|---|---|
|**Characteristics**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|Supply Voltage for Logic<br>Supply Voltage for Display<br>High Level Input<br>Low Level Input<br>High Level Output<br>Low Level Output<br>Operating Current for VDD<br>Operating Current for VCC<br>Sleep Mode Current for VDD<br>Sleep Mode Current for VCC|VDD<br>VCC<br>VIH<br>VIL<br>VOH<br>VOL<br>IDD<br>ICC<br>IDD, SLEEP<br>ICC, SLEEP|Note 5<br>IOUT= 100μA, 3.3MHz <br>IOUT= 100μA, 3.3MHz<br>IOUT= 100μA, 3.3MHz <br>IOUT= 100μA, 3.3MHz<br>Note 6<br>Note 7<br>Note 8|1.65<br>12.5<br> 0.8×VDD<br>0<br> 0.9×VDD<br>0<br>-<br>-<br>-<br>-<br>-<br>-|2.8<br>13.0<br>-<br>-<br>-<br>-<br>180<br>15.3<br>21.2<br>31.7<br>1<br>2|3.3<br>13.5<br>VDD<br>0.2×VDD<br>VDD<br>0.1×VDD<br>300<br>19.1<br>26.5<br>39.6<br>5<br>10|V<br>V<br>V<br>V<br>V<br>V<br>μA<br>mA<br>mA<br>mA<br>μA<br>μA|



Note 5: Brightness (Lbr) and Supply Voltage for Display (VCC) are subject to the change of the panel characteristics and the customer’s request. 

Note 6: VDD = 2.8V, VCC = 13.0V, 30% Display Area Turn on. Note 7: VDD = 2.8V, VCC = 13.0V, 50% Display Area Turn on. Note 8: VDD = 2.8V, VCC = 13.0V, 100% Display Area Turn on. 

* Software configuration follows Section 4.4 Initialization. 

Page 7 of 21 

## **AC Characteristics** 

68XX-Series MPU Parallel Interface Timing Characteristics: 

|**Symbol**|**Description**|**Min**|**Max**|**Unit**|
|---|---|---|---|---|
|tcycle<br>tAS<br>tAH<br>tDW<br>tDSW<br>tDHW<br>tDHR<br>tOH<br>tACC<br>PWCSL<br>PWCSH<br>tR<br>tF|Clock Cycle Time<br>Address Setup Time<br>Address Hold Time<br>Data Write Time<br>Write Data Setup Time<br>Write Data Hold Time<br>Read Data Hold Time<br>Output Disable Time<br>Access Time<br>Chip Select Low Pulse Width (Read)<br>Chip Select Low Pulse width (Write)<br>Chip Select High Pulse Width (Read)<br>Chip Select High Pulse Width (Write)<br>Rise Time<br>Fall Time|300<br>20<br>0<br>80<br>40<br>20<br>20<br>-<br>-<br>120<br>60<br>60<br>60<br>-<br>-|-<br>-<br>-<br>-<br>-<br>-<br>-<br>70<br>140<br>-<br>-<br>40<br>40|ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns|



* (VDD - VSS = 1.65V to 3.3V, Ta = 25°C) 

Page 8 of 21 

80XX-Series MPU Parallel Interface Timing Characteristics: 

|80XX-Series MPU Parallel Interface Timing Characteristics:|80XX-Series MPU Parallel Interface Timing Characteristics:||||
|---|---|---|---|---|
|**Symbol**|**Description**|**Min**|**Max**|**Unit**|
|tcycle<br>tAS<br>tAH<br>tDW<br>tDSW<br>tDHW<br>tDHR<br>tOH<br>tACC<br>tPWLR<br>tPWLW<br>tPWHR<br>tPWHW<br>tCS<br>tCSH<br>tCSF<br>tR<br>tF|Clock Cycle Time<br>Address Setup Time<br>Address Hold Time<br>Data Write Time<br>Write Data Setup Time<br>Write Data Hold Time<br>Read Data Hold Time<br>Output Disable Time<br>Access Time<br>Read Low Time<br>Write Low Time<br>Read High Time<br>Write High Time<br>Chip Select Setup Time<br>Chip Select Hold Time to Read Signal<br>Chip Select Hold Time<br>Rise Time<br>Fall Time|300<br>20<br>0<br>70<br>40<br>15<br>20<br>-<br>-<br>120<br>60<br>60<br>60<br>0<br>0<br>20<br>-<br>-|-<br>-<br>-<br>-<br>-<br>-<br>-<br>70<br>140<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>40<br>40|ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns|



* (VDD - VSS = 1.65V to 3.5V, Ta = 25°C) 

**==> picture [65 x 149] intentionally omitted <==**

**----- Start of picture text -----**<br>
( Read Timing )<br>( Write Timing )<br>**----- End of picture text -----**<br>


Page 9 of 21 

Serial Interface Timing Characteristics: 

|**Symbol**|**Description**|**Min**|**Max**|**Unit**|
|---|---|---|---|---|
|tcycle<br>tAS<br>tAH<br>tCSS<br>tCSH<br>tDW<br>tDSW<br>tDHW<br>tCLKL<br>tCLKH<br>tR<br>tF|Clock Cycle Time<br>Address Setup Time<br>Address Hold Time<br>Chip Select Setup Time<br>Chip Select Hold Time<br>Data Write Time<br>Write Data Setup Time<br>Write Data Hold Time<br>Clock Low Time<br>Clock High Time<br>Rise Time<br>Fall Time|100<br>15<br>15<br>20<br>50<br>55<br>15<br>15<br>50<br>50<br>-<br>-|-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>40<br>40|ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns|



Page 10 of 21 

## I[2] C Interface Timing Characteristics: 

|**Symbol**|**Description**|**Min**|**Max**|**Unit**|
|---|---|---|---|---|
|tcycle<br>tHSTART<br>tHD<br>tSD<br>tSSTART<br>tSSTOP<br>tR<br>tF<br>tIDLE|Clock Cycle Time<br>Start Condition Hold Time<br>Data Hold Time (for “SDAOUT” Pin)<br>Data Hold Time (for “SDAIN” Pin)<br>Data Setup Time<br>Start Condition Setup Time<br>(Only relevant for a repeated Start condition)<br>Stop Condition Setup Time<br>Rise Time for Data and Clock Pin<br>Fall Time for Data and Clock Pin<br>Idle Time before a New Transmission can Start|2.5<br>0.6<br>0<br>300<br>100<br>0.6<br>0.6<br>1.3|-<br>-<br>-<br>-<br>-<br>-<br>300<br>300<br>-|μs<br>μs<br>ns<br>ns<br>μs<br>μs<br>ns<br>ns<br>μs|



* (VDD - VSS = 1.65V to 3.5V, Ta = 25°C) 

Page 11 of 21 

## **Functional Specification** 

## **Commands** 

Refer to the Technical Manual for the SSD1309 

## **Power down and Power up Sequence** 

To protect OEL panel and extend the panel life time, the driver IC power up/down routine should include a delay period between high voltage and low voltage power sources during turn on/off.  It gives the OEL panel enough time to complete the action of charge and discharge before/after the operation. 

Power up Sequence: 

1. Power up VDD 

2. Send Display off command 

3. Initialization 

4. Clear Screen 

5. Power up VCC 

6. Delay 100ms 

   - (When VCC is stable) 

7. Send Display on command 

Power down Sequence: 

1. Send Display off command 

2. Power down VCC 

3. Delay 100ms (When VCC is reach 0 and panel is completely discharges) 

4. Power down VDD 

**==> picture [170 x 209] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD on<br>VCC on<br>Display on<br>VCC<br>VDD<br>VSS/Ground<br>Display off<br>VCC off<br>VDD off<br>VCC<br>VDD<br>VSS/Ground<br>**----- End of picture text -----**<br>


Note 9: 

- 1) Since an ESD protection circuit is connected between VDD and VCC inside the driver IC, VCC becomes lower than VDD whenever VDD is ON and VCC is OFF. 

- 2) VCC should be kept float (disable) when it is OFF. 

- 3) Power Pins (VDD, VCC) can never be pulled to ground under any circumstance. 

- 4) VDD should not be power down before VCC power down. 

## **Reset Circuit** 

When RES# input is low, the chip is initialized with the following status: 

1. Display is OFF 

2. 128×64 Display Mode 

3. Normal segment and display data column and row address mapping (SEG0 mapped to column address 00h and COM0 mapped to row address 00h) 

4. Shift register data clear in serial interface 

5. Display start line is set at display RAM address 0 

6. Column address counter is set at 0 

7. Normal scan direction of the COM outputs 

8. Contrast control register is set at 7Fh 

9. Normal display mode (Equivalent to A4h command) 

Page 12 of 21 

## **Actual Application Example** 

Command usage and explanation of an actual example 

<Power up Sequence> 

**==> picture [399 x 381] intentionally omitted <==**

**----- Start of picture text -----**<br>
Set Multiplex Ratio  Set Entire Display On/Off<br>VDD/VCC off State<br>0xA8, 0x3F 0xA4<br>Power up VDD Set Display Offset  Set Normal/Inverse Display<br>(RES# as Low State)  0xD3, 0x00 0xA6<br>Power Stabilized  Set Display Start Line<br>Clear Screen<br>(Delay Recommended) 0x40<br>Set RES# as High  Set Segment Re-Map  Power up VCC & Stabilized<br>(3μs Delay Minimum)  0xA1 (Delay Recommended)<br>Initialized State  Set COM Output Scan Direction Set Display On<br>(Parameters as Default) 0xC8 0xAF<br>Command Lock  Set COM Pins Hardware Configuration<br>(100ms Delay Recommended)<br>0xFD, 0x12 0xDA, 0x12<br>Set Display Off  Set Current Control<br>0xAE 0x81, 0x7F Display Data Sent<br>Initial Settings  Set Pre-Charge Period<br>Configuration 0xD9, 0x82<br>Set Display Clock Divide Ratio/Oscillator Frequency  Set VCOMH Deselect Level<br>0xD5, 0xA0 0xDB, 0x34<br>**----- End of picture text -----**<br>


If the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function. 

<Power down Sequence> 

**==> picture [362 x 63] intentionally omitted <==**

**----- Start of picture text -----**<br>
Normal Operation Power down VCC VDD/VCC off State<br>(100ms Delay Recommended)<br>Set Display Off<br>0xAE  Power down VDD<br>**----- End of picture text -----**<br>


Page 13 of 21 

<Entering Sleep Mode> 

**==> picture [438 x 299] intentionally omitted <==**

**----- Start of picture text -----**<br>
Normal Operation Power down VCC<br>Set Display Off<br>0xAE  Sleep Mode<br>a<br><Exiting Sleep Mode><br>Set Display On<br>Sleep Mode 0xAF Normal Operation<br>Power up VCC & Stabilized<br>(100ms Delay Recommended)<br>(Delay Recommended)<br>==i<br>**----- End of picture text -----**<br>


Page 14 of 21 

## **Reliability** 

## **Contents of Reliability Tests** 

|**Contents of Reliability Tests**|||
|---|---|---|
|**Item**|**Conditions**|**Criteria**|
|High Temperature Operation<br>Low Temperature Operation<br>High Temperature Storage<br>Low Temperature Storage<br>High Temperature/Humidity Operation<br>Thermal Shock|70°C, 240 hrs<br>-40°C, 240 hrs<br>85°C, 240 hrs<br>-40°C, 240 hrs<br>60°C, 90% RH, 120 hrs<br>-40°C⇔85°C, 24 cycles<br>60 mins dwell|The operational<br>functions work.|



* The samples used for the above tests do not include polarizer. 

- No moisture condensation is observed during tests. 

## **Failure Check Standard** 

After the completion of the described reliability test, the samples were left at room temperature for 2 hrs prior to conducting the failure test at 23±5°C; 55±15% RH. 

Page 15 of 21 

## **Outgoing Quality Control Specifications** 

## **Environment Required** 

Customer’s test & measurement are required to be conducted under the following conditions: Temperature: 23 ± 5°C Humidity: 55 ± 15% RH Fluorescent Lamp: 30W Distance between the Panel & Lamp: ≥ 50cm Distance between the Panel & Eyes of the Inspector: ≥ 30cm Finger glove (or finger cover) must be worn by the inspector. Inspection table or jig must be anti-electrostatic. 

## **Sampling Plan** 

Level II, Normal Inspection, Single Sampling, MIL-STD-105E 

## **Criteria & Acceptable Quality Level** 

**==> picture [447 x 493] intentionally omitted <==**

**----- Start of picture text -----**<br>
||||
|---|---|---|
|Partition|AQL|Definition|
|Major|0.65|Defects in Pattern Check (Display On)|
|Minor|1.0|Defects in Cosmetic Check (Display Off)|
|Cosmetic Check (Display Off) in Non-Active Area|
|Check Item|Classification|Criteria|
|X > 6 mm (Along with Edge)|
|Y > 1 mm (Perpendicular to edge)|
|X|
|Y|
|Panel General Chipping|Minor|
|X|
|Y|
|WH|
|"g|
|Page 16 of 21|

**----- End of picture text -----**<br>


## Cosmetic Check (Display Off) in Non-Active Area (Continued) 

|**Check Item**|**Classification**|**Criteria**|
|---|---|---|
|Panel Crack<br>Copper Exposed<br>(Even Pin or Film)<br>Film or Trace Damage<br>Terminal Lead Prober Mark<br>Glue or Contamination on Pin<br>(Couldn’t Be Removed by Alcohol)<br>Ink Marking on Back Side of panel<br>(Exclude on Film)|Minor<br>Minor<br>Minor<br>Acceptable<br>Minor<br>Acceptable|Any crack is not allowable.<br>Not Allowable by Naked Eye Inspection<br>Ignore for Any<br>=<br>, 4<br>rd<br>| “<br>in<br>OE<br>ee<br>ee s Bs|



Page 17 of 21 

Cosmetic Check (Display Off) in Active Area 

It is recommended to execute in clear room environment (class 10k) if actual in necessary. 

|**Check Item**|**Classification**|**Criteria**|
|---|---|---|
|Any Dirt & Scratch on Polarizer’s<br>Protective Film<br>Scratches, Fiber, Line-Shape Defect<br>(On Polarizer)<br>Dirt, Black Spot, Foreign Material,<br>(On Polarizer)<br>Dent, Bubbles, White spot<br>(Any Transparent Spot on Polarizer)<br>Fingerprint, Flow Mark<br>(On Polarizer)<br>~~—~~|Acceptable<br>Minor<br>Minor<br>Minor<br>Minor|Ignore for not Affect the Polarizer<br>W≤0.1<br>Ignore<br>W > 0.1, L≤2<br>n≤1<br>L > 2<br>n = 0<br>Φ≤0.1<br>Ignore<br>0.1 < Φ≤0.25<br>n≤1<br>0.25 < Φ<br>n = 0<br>Φ≤0.5<br>Ignore if no Influence on Display<br>0.5 <Φ<br>n=0<br>Not Allowable<br>>|



- Protective film should not be tear off when cosmetic check. 

- ** Definition of W & L & Φ (Unit: mm): Φ = (a + b) / 2 

**==> picture [268 x 96] intentionally omitted <==**

**----- Start of picture text -----**<br>
L<br>b: Minor Axis<br>W<br>a: Major Axis<br>**----- End of picture text -----**<br>


Page 18 of 21 

Pattern Check (Display On) in Active Area 

|**Check Item**|**Classification**|**Criteria**|
|---|---|---|
|No Display<br>Missing Line<br>Pixel Short<br>Darker Pixel<br>Wrong Display<br>Un-uniform<br>MD~~s~~|Major<br>Major<br>Major<br>Major<br>Major<br>Major<br>~~s~~|Seartattaltatatalctatatattatata'cta wia'ctytatstatctatata'ctataty'stataty'sta<br>ats sta ats"<br>ataffatutafafatetafatatetatatatetata"a feetfatetatataMetatataMetaetatetatetatataferstata<br>seatatattatytatntattatntattatatatcta wiatctrtatntattatetatctatatstctatatststatatststaats'<br>statfanrsurTavrsarcereseTcanesetern Ufservcovesetccave‘aecaverseraersevsersersnare'<br>reatetattatytatatatatatntattatntatctn wlatctrtatntattatatatctatatatctatatstctatatststatatst<br>itatafanrSurfonnsatcove*eTcaneeeiecn UretercovetetcaveratecaverstecatersTeraurstersearet<br>seatatatatatytatatatetatntattatntatctn wlatctrtatntatctatatatctatatatctatatstctatatststatetst<br>itetatstetaetaintetstetetateistatetsts afstatetsistetse'siersiss'ststsis'e'siste's's"sists!<br>itatafarntaTaTaNnsaTAcoreteTca"eceTacn fae"\"oreteTcavereTsca"ernerareraerararnerscare<br>Matatecatesetecateretacsterstacy<br>Shtetusatvtatecstersterssenvecssarvearicateanira'c"a"iesetr<br>ulefecutersterstarstaretatsTare"starserstarsTaritars<br>"seca rcarere"scarersi scarey<br>mena cPaaMacPaaRsaPaPOMs"aPaPSMtaPataP tae<br>aratatatahtatahahPatahat|



Page 19 of 21 

## **Precautions When Using These OEL Display Modules** 

## **Handling Precautions** 

- 1) Since the display panel is being made of glass, do not apply mechanical impacts such us dropping from a high position. 

- 2) If the display panel is broken by some accident and the internal organic substance leaks out, be careful not to inhale nor lick the organic substance. 

- 3) If pressure is applied to the display surface or its neighborhood of the OEL display module, the cell structure may be damaged and be careful not to apply pressure to these sections. 

- 4) The polarizer covering the surface of the OEL display module is soft and easily scratched.  Please be careful when handling the OEL display module. 

- 5) When the surface of the polarizer of the OEL display module has soil, clean the surface.  It takes advantage of by using following adhesion tape. 

   - Scotch Mending Tape No. 810 or an equivalent 

Never try to breathe upon the soiled surface nor wipe the surface using cloth containing solvent such as ethyl alcohol, since the surface of the polarizer will become cloudy. Also, pay attention that the following liquid and solvent may spoil the polarizer: * Water 

   - Ketone 

   - Aromatic Solvents 

- 6) Hold OEL display module very carefully when placing OEL display module into the system housing. Do not apply excessive stress or pressure to OEL display module.  And, do not over bend the film with electrode pattern layouts.  These stresses will influence the display performance.  Also, secure sufficient rigidity for the outer cases. 

- 7) Do not apply stress to the driver IC and the surrounding molded sections. 

- 8) Do not disassemble nor modify the OEL display module. 

- 9) Do not apply input signals while the logic power is off. 

- 10) Pay sufficient attention to the working environments when handing OEL display modules to prevent occurrence of element breakage accidents by static electricity. 

   - Be sure to make human body grounding when handling OEL display modules. 

   - Be sure to ground tools to use or assembly such as soldering irons. 

   - To suppress generation of static electricity, avoid carrying out assembly work under dry environments. 

   - Protective film is being applied to the surface of the display panel of the OEL display module. Be careful since static electricity may be generated when exfoliating the protective film. 

- 11) Protection film is being applied to the surface of the display panel and removes the protection film before assembling it.  At this time, if the OEL display module has been stored for a long period of time, residue adhesive material of the protection film may remain on the surface of the display panel after removed of the film.  In such case, remove the residue material by the method introduced in the above Section 5). 

- 12) If electric current is applied when the OEL display module is being dewed or when it is placed under high humidity environments, the electrodes may be corroded and be careful to avoid the above. 

## **Storage Precautions** 

- 1) When storing OEL display modules, put them in static electricity preventive bags avoiding exposure to direct sun light nor to lights of fluorescent lamps. and, also, avoiding high temperature and high 

Page 20 of 21 

humidity environment or low temperature (less than 0°C) environments.  (We recommend you to store these modules in the packaged state when they were shipped from Midas Displays. ) At that time, be careful not to let water drops adhere to the packages or bags nor let dewing occur with them. 

- 2) If electric current is applied when water drops are adhering to the surface of the OEL display module, when the OEL display module is being dewed or when it is placed under high humidity environments, the electrodes may be corroded and be careful about the above. 

## **Designing Precautions** 

- 1) The absolute maximum ratings are the ratings which cannot be exceeded for OEL display module, and if these values are exceeded, panel damage may be happen. 

- 2) To prevent occurrence of malfunctioning by noise, pay attention to satisfy the VIL and VIH specifications and, at the same time, to make the signal line cable as short as possible. 

- 3) We recommend you to install excess current preventive unit (fuses, etc.) to the power circuit (VDD). (Recommend value: 0.5A) 

- 4) Pay sufficient attention to avoid occurrence of mutual noise interference with the neighboring devices. 

- 5) As for EMI, take necessary measures on the equipment side basically. 

- 6) When fastening the OEL display module, fasten the external plastic housing section. 

- 7) If power supply to the OEL display module is forcibly shut down by such errors as taking out the main battery while the OEL display panel is in operation, we cannot guarantee the quality of this OEL display module. 

- 8) The electric potential to be connected to the rear face of the IC chip should be as follows: SSD1309 * Connection (contact) to any other potential than the above may lead to rupture of the IC. 

## **Precautions when disposing of the OEL display modules** 

- 1) Request the qualified companies to handle industrial wastes when disposing of the OEL display modules.  Or, when burning them, be sure to observe the environmental and hygienic laws and regulations. 

## **Other Precautions** 

- 1) When an OEL display module is operated for a long of time with fixed pattern may remain as an after image or slight contrast deviation may occur. Nonetheless, if the operation is interrupted and left unused for a while, normal state can be restored.  Also, there will be no problem in the reliability of the module. 

- 2) To protect OEL display modules from performance drops by static electricity rapture, etc., do not touch the following sections whenever possible while handling the OEL display modules. * Pins and electrodes 

   - Pattern layouts such as the FPC 

- 3) With this OEL display module, the OEL driver is being exposed.  Generally speaking, semiconductor elements change their characteristics when light is radiated according to the principle of the solar battery.  Consequently, if this OEL driver is exposed to light, malfunctioning may occur. 

   - Design the product and installation method so that the OEL driver may be shielded from light in actual usage. 

   - Design the product and installation method so that the OEL driver may be shielded from light during the inspection processes. 

- 4) Although this OEL display module stores the operation state data by the commands and the indication data, when excessive external noise, etc. enters into the module, the internal status may be changed.  It therefore is necessary to take appropriate measures to suppress noise generation or to protect from influences of noise on the system design. 

- 5) We recommend you to construct its software to make periodical refreshment of the operation statuses (re-setting of the commands and re-transference of the display data) to cope with catastrophic noise. 

Page 21 of 21 



## Links

- [View this product on Novapart](https://novapart.co/products/MCOT128064EY-GM/graphic-oled-128-x-64-green-on-black-28v-i2c)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/midas-displays/mcot128064ey-gm/oled-128x64-tab-green-multi-i/dp/2342675)
---

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