# Graphic OLED, 128 x 32 Pixels, Blue on Black, 2.8V, SPI, 30mm x 11.5mm, -40 °C

![Product image](https://novapart.co/image/farnell:2769696/)

**URL**: https://novapart.co/products/MCOT128032AY-BS/graphic-oled-128-x-32-pixels-blue-on-black-28v-spi
**SKU**: MCOT128032AY-BS
**Manufacturer**: MIDAS DISPLAYS
**Category**: Optoelectronics & Displays || Displays || OLED Displays || Graphic OLED Displays
**Price**: €15.8900
**Stock**: 10+
**Lead Time**: 106 days (indicative)

## Description

Resolution:128 x 32 Pixels; Display Appearance:Blue on Black; Logic Voltage:2.8V; Interface Type:SPI; Module Size:30mm x 11.5mm; Operating Temperature Min:-40°C; Operating Temperature M

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| Resolution | 128 x 32 Pixels |
| Module Size | 30mm x 11.5mm |
| Logic Voltage | 2.8V |
| Product Range | - |
| Interface Type | SPI |
| Display Appearance | Blue on Black |
| Display Construction | TAB |
| Operating Temperature Max | 70°C |
| Operating Temperature Min | -40°C |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2769696/)

**Sauls Wharf House Crittens Road Great Yarmouth Norfolk NR31 0AG** 

Telephone +44 (0)1493 602602 Email:sales@midasdisplays.com Email:tech@midasdisplays.com www.midasdisplays.com 

|MCOT128032AY-BS|MCOT128032AY-BS|128 x 32|128 x 32|OLED Module|
|---|---|---|---|---|
|**Specification**|||||
|Version:    1|||Date:04/01/2011||
|**Revision**|||||
|1|29/12/2010||First Issue||



|DisplayFeatures|DisplayFeatures|||
|---|---|---|---|
|Resolution|128 x 32|||
|Appearance|Blue on Black|||
|Logic Voltage|2.8V|||
|Interface|SPI|||
|Module Size|30.00 x 11.50 x 1.45mm|||
|OperatingTemperature|-40°C ~ +80°C|BoxQuantity|Weight / Display|
|Construction|COT|---|---|



* - For full design functionality, please use this specification in conjunction with the SSD1306 specification. (Provided Separately) 

|**Display Accessories**|**Display Accessories**|
|---|---|
|**Part Number**|**Description**|



|**Optional Variants**||
|---|---|
|**Appearance**|**Voltage**|



Page 1 of 14 

## **1.Basic Specifications** 

## **Display Specifications** 

- 1) Display Mode: Passive Matrix 2) Display Color: Monochrome (Light Blue) 3) Drive Duty: 1/32 Duty 

## **Mechanical Specifications** 

- 1) Outline Drawing: According to the annexed outline drawing 2) Number of Pixels: 128 × 32 

- 3) Panel Size: 30.00 × 11.50 × 1.45 (mm) 4) Active Area: 22.384 × 5.584 (mm) 5) Pixel Pitch: 0.175 × 0.175 (mm) 6) Pixel Size: 0.159 × 0.159 (mm) 7) Weight: 1.05 (g) 

## **Active Area / Memory Mapping & Pixel Construction** 

**==> picture [350 x 205] intentionally omitted <==**

**----- Start of picture text -----**<br>
P0.175x128-0.016=22.384<br>Driver IC Memory Mapping<br>(128  x  32 in 128  x  64)<br>0.175<br>r (0, 0) & "A" - 0.159 ae<br>!<br>\rr<br>Segment 127 Segment 0 (127, 31)<br>(  Column 1  ) (  Column 128  )<br>Common 0<br>Detail "A"<br>(  Row 32  )<br>Scale (10:1)<br>Common 31 f<br>(  Row 1  )<br>0.175<br>P0.175x32-0.016=5.584 0.159<br>**----- End of picture text -----**<br>


Page 2 of 14 

Page 3 of 14 

## **Pin Definition** 

|**Pin Definition**||||
|---|---|---|---|
|**Pin Number**|**Symbol**|**I/O**|**Function**|
|**Power Supply**||||
|7<br>6<br>15|VDD<br>VSS<br>VCC|P<br>P<br>P|**Power Supply for Logic**<br>This is a voltage supply pin.  It must be connected to external source.<br>**Ground of OEL System**<br>This is a ground pin.  It also acts as a reference for the logic pins, the OEL driving<br>voltages, and the analog circuits.  It must be connected to external ground.<br>**Power Supply for OEL Panel**<br>This is the most positive voltage supply pin of the chip.  A stabilization capacitor<br>should be connected between this pin and VSSwhen the converter is used.  It<br>must be connected to external source when the converter is not used.|
|**Driver**||||
|13<br>14|IREF<br>VCOMH|I<br>O|**Current Reference for Brightness Adjustment**<br>This pin is segment current reference pin.  A resistor should be connected<br>between this pin and VSS.  Set the current at 12.5μA maximum.<br>**Voltage Output High Level for COM Signal**<br>This pin is the input pin for the voltage output high level for COM signals.  A<br>capacitor should be connected between this pin and VSS.|
|**DC/DC Converter**||||
|5<br>3 / 4<br>1 / 2|VDDB<br>C1P / C1N<br>C2P / C2N|P<br>I|**Power Supply for DC/DC Converter Circuit**<br>This is the power supply pin for the internal buffer of the DC/DC voltage converter.<br>It must be connected to external source when the converter is used.  It should be<br>connected to VDDwhen the converter is not used.<br>**Positive Terminal of the Flying Inverting Capacitor**<br>**Negative Terminal of the Flying Boost Capacitor**<br>The charge-pump capacitors are required between the terminals.  They must be<br>floated when the converter is not used.|
|**Interface**||||
|9<br>8<br>10<br>11<br>12|RES#<br>CS#<br>D/C#<br>SCLK<br>SDIN|I<br>I<br>I<br>I<br>I|**Power Reset for Controller and Driver**<br>This pin is reset signal input.  When the pin is low, initialization of the chip is<br>executed.<br>**Chip Select**<br>This pin is the chip select input.  The chip is enabled for MCU communication only<br>when CS# is pulled low.<br>**Data/Command Control**<br>This pin is Data/Command control pin.  When the pin is pulled high, the data at<br>SDIN is treated as data.  When it is pulled low, the data at SDIN will be<br>transferred to the command register.  For detail relationship to MCU interface<br>signals, please refer to the Timing Characteristics Diagrams.<br>**Serial Clock Input Signal**<br>The transmission of information in the bus is following a clock signal.  Each<br>transmission of data bit is taken place during a single clock period of this pin.<br>**Serial Data Input Signal**<br>This pin acts as a communication channel.  The input data through SDIN are<br>latched at the rising edge of SCLK in the sequence of MSB first and converted to<br>8-bit parallel data and handled at the rising edge of last serial clock.<br>SDIN is identified to display data or command by D/C# bit data at the rising of first<br>SCLK.|



Page 4 of 14 

## **Block Diagram** 

VCC Supplied Externally 

## Active Area 0.91" 128 x 32 Pixels 

**==> picture [165 x 146] intentionally omitted <==**

**----- Start of picture text -----**<br>
~ ~ ~ ~<br>SSD1306<br>Va eeeweune<br>R1<br>= C1 =~ C3<br>C2<br>Segment 127 Segment 0 Common 0 Common 31<br>C2P C2N C1P C1N VDDB VSS VDD CS# RES# D/C# SCLK SDIN IREF VCOMH VCC<br>**----- End of picture text -----**<br>


Pins connected to MCU interface: RES#, SCL, and SDA 

C1: 1μF C2: 4.7μF C3: 4.7μF / 16V X7R R1: 390kΩ, R1 = (Voltage at IREF - VSS) / IREF 

Page 5 of 14 

VCC Generated by Internal DC/DC Circuit 

## Active Area 0.91" 128 x 32 Pixels 

**==> picture [179 x 149] intentionally omitted <==**

**----- Start of picture text -----**<br>
~ ~ ~ ~<br>SSD1306<br>A Ahdbdbdbadadda<br>C6 C5 R1<br>C2 C1 C4<br>m= ef, C3<br>Segment 127 Segment 0 Common 0 Common 31<br>C2P C2N C1P C1N VDDB VSS VDD CS# RES# D/C# SCLK SDIN IREF VCOMH VCC<br>**----- End of picture text -----**<br>


Pins connected to MCU interface: RES#, SCL, and SDA 

C1, C2: 1μF C3: 2.2μF C4: 4.7μF / 16V X7R C5, C6: 1μF / 16V X5R R1: 390kΩ, R1 = (Voltage at IREF - VSS) / IREF 

Page 6 of 14 

## **Absolute Maximum Ratings** 

|**Parameter**|**Symbol**|**Min**|**Max**|**Unit**|**Notes**|
|---|---|---|---|---|---|
|Supply Voltage for Logic<br>Supply Voltage for Display<br>Supply Voltage for DC/DC<br>Operating Temperature<br>Storage Temperature<br>Life Time (80 cd/m2) (Typ)           25,000|VDD<br>VCC<br>VDDB<br>TOP<br>TSTG<br>) (Typ)           25,000|-0.3<br>0<br>-0.3<br>-40<br>-40<br>-|4<br>11<br>5<br>70<br>85<br>-              hour|V<br>V<br>V<br>°C<br>°C<br>-              hour|1, 2<br>1, 2<br>1, 2<br>3<br>4|



- Note 1: All the above voltages are on the basis of “VSS = 0V”. 

- Note 2: When this module is used beyond the above absolute maximum ratings, permanent breakage of the module may occur.  Also, for normal operations, it is desirable to use this module under the conditions according to Section 3. “Optics & Electrical Characteristics”.  If this module is used beyond these conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate. 

- Note 3: The defined temperature ranges do not include the polarizer.  The maximum withstood temperature of the polarizer should be 80°C. 

- Note 4: VCC = 7.25V, Ta = 25°C, 50% Checkerboard. 

   - Software configuration follows Section 4.4 Initialization. 

   - End of lifetime is specified as 50% of initial brightness reached.  The average operating lifetime at room temperature is estimated by the accelerated operation at high temperature conditions. 

Page 7 of 14 

**Optics & Electrical Characteristics** 

## **Optics Characteristics** 

|**Optics Characteristics**|||||||
|---|---|---|---|---|---|---|
|**Characteristics**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|Brightness<br>C.I.E. (Blue)<br>Dark Room Contrast<br>Viewing Angle|Lbr<br>(x)<br>(y)<br>CR|Note 5<br>C.I.E. 1931|120<br>0.12<br>0.22<br>-<br>-|150<br>0.16<br>0.26<br>>10,000:1<br>Free|-<br>0.20<br>0.30<br>-<br>-|cd/m2<br>degree|



* Optical measurement taken at VDD = 2.8V, VCC = 7.25V. Software configuration follows Section 4.4 Initialization. 

## **DC Characteristics** 

|**DC Characteristics**|||||||
|---|---|---|---|---|---|---|
|**Characteristics**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|Supply Voltage for Logic<br>Supply Voltage for Display<br>(Supplied Externally)<br>Supply Voltage for DC/DC<br>Supply Voltage for Display<br>(Generated by Internal DC/DC)<br>High Level Input<br>Low Level Input<br>High Level Output<br>Low Level Output<br>Operating Current for VDD<br>Operating Current for VCC<br>(VCCSupplied Externally)<br>Operating Current for VDDB<br>(VCCGenerated by Internal DC/DC)<br>Sleep Mode Current for VDD<br>Sleep Mode Current for VCC|VDD<br>VCC<br>VDDB<br>(Generated by Internal DC/DC)<br>VCC<br>VIH<br>VIL<br>VOH<br>VOL<br>IDD<br>ICC<br>IDDB<br>IDD, SLEEP<br>ICC, SLEEP|Note 5<br>(Internal DC/DC Disable)<br>Internal DC/DC Enable<br>Note 5<br>(Internal DC/DC Enable)<br>IOUT= 100μA, 3.3MHz <br>IOUT= 100μA, 3.3MHz<br>IOUT= 100μA, 3.3MHz <br>IOUT= 100μA, 3.3MHz<br>Note 6<br>Note 7<br>Note 8<br>Note 6<br>Note 7<br>Note 8|1.65<br>7.0<br>3.3<br>7.0<br> 0.8×VDD<br>0<br> 0.9×VDD<br>0<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>-|2.8<br>7.25<br>-<br>-<br>-<br>-<br>-<br>-<br>180<br>3.0<br>4.5<br>7.8<br>9.1<br>13.3<br>21.7<br>1<br>2|3.3<br>7.5<br>4.2<br>7.5<br>VDD<br>0.2×VDD<br>VDD<br>0.1×VDD<br>300<br>3.8<br>5.6<br>9.8<br>11.4<br>16.6<br>27.1<br>5<br>10|V<br>V<br>V<br>V<br>V<br>V<br>V<br>V<br>μA<br>mA<br>mA<br>mA<br>mA<br>mA<br>mA<br>μA<br>μA|



Note 5: Brightness (Lbr) and Supply Voltage for Display (VCC) are subject to the change of the panel characteristics and the customer’s request. 

Note 6: VDD = 2.8V, VCC = 7.25V, 30% Display Area Turn on. Note 7: VDD = 2.8V, VCC = 7.25V, 50% Display Area Turn on. Note 8: VDD = 2.8V, VCC = 7.25V, 100% Display Area Turn on. 

* Software configuration follows Section 4.4 Initialization. 

Page 8 of 14 

## **AC Characteristics** 

|**Symbol**|**Description**|**Min**|**Max**|**Unit**|
|---|---|---|---|---|
|tcycle<br>tAS<br>tAH<br>tCSS<br>tCSH<br>tDSW<br>tDHW<br>tCLKL<br>tCLKH<br>tR<br>tF|Clock Cycle Time<br>Address Setup Time<br>Address Hold Time<br>Chip Select Setup Time<br>Chip Select Hold Time<br>Write Data Setup Time<br>Write Data Hold Time<br>Clock Low Time<br>Clock High Time<br>Rise Time<br>Fall Time|100<br>15<br>15<br>20<br>10<br>15<br>15<br>20<br>20<br>-<br>-|-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>-<br>40<br>40|ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns<br>ns|



* (VDD - VSS = 1.65V to 3.3V, Ta = 25°C) 

Page 9 of 14 

## **Functional Specification** 

## **Commands** 

Refer to the Technical Manual for the SSD1306 

## **Power down and Power up Sequence** 

To protect OEL panel and extend the panel life time, the driver IC power up/down routine should include a delay period between high voltage and low voltage power sources during turn on/off.  It gives the OEL panel enough time to complete the action of charge and discharge before/after the operation. 

## Power up Sequence: 

1. Power up VDD / VDDB 

2. Send Display off command 

3. Initialization 

4. Clear Screen 

5. Power up VCC 

6. Delay 100ms (When VCC is stable) 

7. Send Display on command 

Power down Sequence: 

1. Send Display off command 

2. Power down VCC / VDDB 

3. Delay 100ms (When VCC / VDDB is reach 0 and panel is completely discharges) 

4. Power down VDD 

**==> picture [166 x 208] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD / VDDB on<br>VCC on<br>Display on<br>VCC<br>VDD/VDDB<br>VSS/Ground<br>Display off<br>VCC / VDDB off<br>VDD off<br>VCC/VDDB<br>VDD<br>VSS/Ground<br>**----- End of picture text -----**<br>


Note 9: 

- 1) Since an ESD protection circuit is connected between VDD and VCC inside the driver IC, VCC becomes lower than VDD whenever VDD is ON and VCC is OFF. 

- 2) VCC / VDDB should be kept float (disable) when it is OFF. 

- 3) Power Pins (VDD, VCC, VDDB) can never be pulled to ground under any circumstance. 

- 4) VDD should not be power down before VCC / VDDB power down. 

## **Reset Circuit** 

When RES# input is low, the chip is initialized with the following status: 

1. Display is OFF 

2. 128×64 Display Mode 

3. Normal segment and display data column and row address mapping (SEG0 mapped to column address 00h and COM0 mapped to row address 00h) 

4. Shift register data clear in serial interface 

5. Display start line is set at display RAM address 0 

6. Column address counter is set at 0 

7. Normal scan direction of the COM outputs 

8. Contrast control register is set at 7Fh 

9. Normal display mode (Equivalent to A4h command) 

Page 10 of 14 

## **Actual Application Example** 

Command usage and explanation of an actual example 

## 4.4.1 VCC Supplied Externally 

<Power up Sequence> 

**==> picture [381 x 336] intentionally omitted <==**

**----- Start of picture text -----**<br>
Set Multiplex Ratio  Set Pre-Charge Period<br>VDD/VCC off State<br>0xA8, 0x1F  0xD9, 0x22<br>Power up VDD Set Display Offset  Set VCOMH Deselect Level<br>(RES# as Low State)  0xD3, 0x00  0xDB, 0x40<br>Power Stabilized  Set Display Start Line  Set Entire Display On/Off<br>(Delay Recommended)  0x40  0xA4<br>Set RES# as High  Set Charge Pump  Set Normal/Inverse Display<br>(3μs Delay Minimum)  0x8D, 0x10  0xA6<br>Initialized State  Set Segment Re-Map<br>Clear Screen<br>(Parameters as Default)  0xA1<br>Set Display Off  Set COM Output Scan Direction Power up VCC<br>0xAE  0xC8  (100ms Delay Recommended)<br>Initial Settings  Set COM Pins Hardware Configuration Set Display On<br>Configuration  0xDA, 0x02  0xAF<br>Set Display Clock Divide Ratio/Oscillator Frequency  Set Contrast Control<br>Display Data Sent<br>0xD5, 0x80  0x81, 0x8F<br>**----- End of picture text -----**<br>


If the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function. 

<Power down Sequence> 

**==> picture [347 x 63] intentionally omitted <==**

**----- Start of picture text -----**<br>
Normal Operation Power down VCC B  VDD/VCC off State<br>(100ms Delay Recommended)<br>Set Display Off<br>0xAE  Power down VDD<br>**----- End of picture text -----**<br>


Page 11 of 14 

<Entering Sleep Mode> 

**==> picture [279 x 261] intentionally omitted <==**

**----- Start of picture text -----**<br>
Normal Operation Power down VCC<br>Set Display Off<br>0xAE  Sleep Mode<br>=<br><Exiting Sleep Mode><br>Set Display On<br>Sleep Mode 0xAF<br>Power up VCC<br>Normal Operation<br>(100ms Delay Recommended)<br>=<br>**----- End of picture text -----**<br>


Page 12 of 14 

## VCC Generated by Internal DC/DC Circuit 

<Power up Sequence> 

**==> picture [379 x 336] intentionally omitted <==**

**----- Start of picture text -----**<br>
Set Display Clock Divide Ratio/Oscillator Frequency  Set Contrast Control<br>VDD/VDDB off State<br>0xD5, 0x80 0x81, 0x8F<br>Power up VDD Set Multiplex Ratio  Set Pre-Charge Period<br>(RES# as Low State)  0xA8, 0x1F 0xD9, 0xF1<br>Power Stabilized  Set Display Offset  Set VCOMH Deselect Level<br>(Delay Recommended)  0xD3, 0x00  0xDB, 0x40<br>Power up VDDB Set Display Start Line  Set Entire Display On/Off<br>(100ms Delay Recommended) 0x40 0xA4<br>Set RES# as High  Set Charge Pump  Set Normal/Inverse Display<br>(3μs Delay Minimum) 0x8D, 0x14 0xA6<br>Initialized State  Set Segment Re-Map<br>Clear Screen<br>(Parameters as Default) 0xA1<br>Set Display Off  Set COM Output Scan Direction Set Display On<br>0xAE 0xC8 0xAF<br>Initial Settings  Set COM Pins Hardware Configuration<br>Display Data Sent<br>Configuration 0xDA, 0x02<br>**----- End of picture text -----**<br>


If the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function. 

## <Power down Sequence> 

**==> picture [349 x 109] intentionally omitted <==**

**----- Start of picture text -----**<br>
Power Stabilized<br>Normal Operation VDD/VDDB off State<br>(100ms Delay Recommended)<br>Set Display Off  Power down VDDB<br>0xAE (50ms Delay Recommended)<br>Set Charge Pump<br>0x8D, 0x10 Power down VDD<br>**----- End of picture text -----**<br>


Page 13 of 14 

<Entering Sleep Mode> 

**==> picture [417 x 261] intentionally omitted <==**

**----- Start of picture text -----**<br>
Set Charge Pump<br>Normal Operation Sleep Mode<br>0x8D, 0x10<br>Set Display Off<br>0xAE Power down VDDB<br>SS —<br><Exiting Sleep Mode><br>Set Charge Pump<br>Sleep Mode 0x8D, 0x14 Normal Operation<br>Power up VDDB Set Display On<br>(100ms Delay Recommended) 0xAF<br>|i<br>**----- End of picture text -----**<br>


Page 14 of 14 



## Links

- [View this product on Novapart](https://novapart.co/products/MCOT128032AY-BS/graphic-oled-128-x-32-pixels-blue-on-black-28v-spi)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/midas/mcot128032ay-bs/display-oled-tab-128x32-pixels/dp/2769696)
---

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