# Alphanumeric LCD, 16 x 2, White on Blue, 3V to 5V, I2C, English, Japanese, Transmissive
**URL**: https://novapart.co/products/MCCOG21605D6W-BNMLWI/alphanumeric-lcd-16-x-2-white-on-blue-3v-to-5v-i2c
**SKU**: MCCOG21605D6W-BNMLWI
**Manufacturer**: MIDAS DISPLAYS
**Category**: Optoelectronics & Displays || Displays || LCD Displays || Alphanumeric LCD Displays
**Price**: €6.8300
**Stock**: 100+
**Lead Time**: 120 days (indicative)
## Description
Character Count x Line:16 x 2; Display Appearance:White on Blue; Logic Voltage:3V to 5V; Interface Type:I2C; Font Set:English, Japanese; Display Mode:Transmissive; Character Size:4.67m
## Specifications
| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| Font Set | English, Japanese |
| Module Size | 62.8mm x 23mm |
| Display Mode | Transmissive |
| Logic Voltage | 3V to 5V |
| Product Range | MCCOG21605D6W |
| Character Size | 4.67mm |
| Interface Type | I2C |
| Lcd Display Type | BSTN |
| Display Appearance | White on Blue |
| Backlighting Colour | White |
| Display Construction | COG |
| Character Count X Line | 16 x 2 |
| Operating Temperature Max | 70°C |
| Operating Temperature Min | -20°C |
## Datasheet
📄 [Download PDF](https://novapart.co/datasheet/farnell:2063206/)
**Sauls Wharf House Crittens Road Great Yarmouth Norfolk NR31 0AG**
Telephone +44 (0)1493 602602 Email:sales@midasdisplays.com Email:tech@midasdisplays.com www.midasdisplays.com
|MCCOG21605D6W-BNMLWI|MCCOG21605D6W-BNMLWI|2 x 16|English/Japanese|LCD Module|
|---|---|---|---|---|
|**Specification **|||||
|Version: 2||Date: 26/09/2019|||
|**Revision**|||||
|1
2|01/08/2011
26/09/2019|First Issue.
Updated full spec.|||
|DisplayFeatures|DisplayFeatures|5V
(Vans|5V
(Vans|
|---|---|---|---|
|Character Count
~~a~~|2 x 16|||
|Appearance
~~a~~|White on Blue|||
|Logic Voltage
~~a~~|5V|||
|Interface
~~a~~|I2C|||
|Font Set
~~a~~|English/Japanese|||
|Character Height
~~a~~|4.67mm|||
|DisplayMode
~~a~~|Transmissive|||
|LC Type|BlueSTN|||
|Module Size|62.80 x 23.00 x 6.30mm|||
|OperatingTemperature|-20°C ~ +70°C|BoxQuantity|Weight / Display|
|Construction|COG|White
---|---|
|LED Backlight|White|||
* - For full design functionality, please use this specification inconjunction with the ST7032I specification. (Provided Separately)
|**Display Accessories**||**Optional Variants**||
|---|---|---|---|
|**Part Number **
**Description **
~~ee~~||**Appearances**|**Voltage**|
> Page 1 of 38 **01**
## **Contents**
|||Page|
|---|---|---|
|1.|Revision History|3|
|2.|General Specification|4|
|3.|Interface Pin Function|5|
|4.|Outline dimension|6|
|5.|Function Description|7|
|6.|Instruction Description|11|
|7.|Optical Characteristics|23|
|8.|Absolute Maximum Ratings|30|
|9.|Electrical Characteristics|30|
|10.|Backlight Information|31|
|11.|Reliability|32|
|12.|Inspection specification|33|
|13.|Precautions in use of LCD Modules|34|
|14.|Material List of Components for RoHs|38|
|15.|Recommendable storage|39|
> Page 2 of 38 **02**
## **1. Revision History**
|DATE|VERSION|REVISED PAGE NO.|REVISED PAGE NO.
Note|
|---|---|---|---|
|01/08/2011|1||First issue|
|26/09/2019|2||Updated full spec.|
> Page 3 of 38 **03**
## **2. General Specification**
The Features of the Module is description as follow:
- Module dimension: 62.8x 23.0 x6.3 (max.) mm3
- View area: 51.5 x 12.2 mm2
- Active area: 47.6 x 9.7 mm2
- Number of Characters: 16 characters x 2 Lines
- Dot size: 0.48 x 0.54 mm2
- Dot pitch: 0.53 x 0.59 mm2
- Character size: 2.60 x 4.67 mm2
- Character pitch: 3.00 x 5.07 mm2 LCD type: STN Negative, Blue Transmissive Duty: 1/16 , 1/5 Bias
- View direction: 6 o’clock
- Backlight Type: LED, White
> Page 4 of 38 **04**
## **3. Interface Pin Function**
|**Pin No. Symbol**|**Pin No. Symbol**|**Level**|**Description**|
|---|---|---|---|
|1|VOUT||DC/DC voltage converter. Connect a capacitor between
this terminal and VIN when the built-in booster is used.|
|2|CAP1N||For voltage booster circuit(VDD-VSS)
External capacitor about 0.1u~4.7uf|
|3|CAP1P|||
|4|VDD|3.0/5.0V|Power supply|
|5|VSS||GND|
|6|SDA||(In I2C interface DB7 (SDA) is input data.
SDA and SCL must connect to I2C bus (I2C bus is to
connect a resister between SDA/SCL and the power
of I2C bus).|
|7|SCL||(In I2C interface DB6 (SCL) is clock input.
SDA and SCL must connect to I2C bus (I2C bus is to
connect a resister between SDA/SCL and the power of
I2C bus).|
|8|RST||RESET|
> Page 5 of 38 **05**
## **4. Outline dimension**
> Page 6 of 38 **06**
## **Application schematic**
> Page 7 of 38 **07**
|**INITIALIZE: (3V)**||
|---|---|
|MOV
I2C_CONTROL,#00H ;WRITE COMMAND|I2C_CONTROL,#00H ;WRITE COMMAND|
|MOV
I2C_DATA,#38H|;Function Set|
|LCALL WRITE_CODE||
|MOV
I2C_CONTROL,#00H ;WRITE COMMAND|I2C_CONTROL,#00H ;WRITE COMMAND|
|MOV
I2C_DATA,#39H|;Function Set|
|LCALL WRITE_CODE||
|MOV
I2C_DATA,#14H|;Internal OSC frequency|
|LCALL WRITE_CODE||
|MOV
I2C_DATA,#74H|;Contrast set|
|LCALL WRITE_CODE||
|MOV
I2C_DATA,#54H|;Power/ICON control/Contrast set|
|LCALL WRITE_CODE||
|MOV
I2C_DATA,#6FH|;Follower control|
|LCALL WRITE_CODE||
|MOV
I2C_DATA,#0CH|;Display ON/OFF|
|LCALL WRITE_CODE||
|MOV
I2C_DATA,#01H|;Clear Display|
|LCALL WRITE_CODE||
> Page 8 of 38 **08**
## **INITIALIZE: (5V)**
|MOV|I2C_CONTROL,#00H|;WRITE COMMAND|
|---|---|---|
|MOV|I2C_DATA,#38H|;Function Set|
|LCALL|WRITE_CODE||
|MOV|I2C_CONTROL,#00H|;WRITE COMMAND|
|MOV|I2C_DATA,#39H|;Function Set|
|LCALL|WRITE_CODE||
|MOV|I2C_DATA,#14H|;Internal OSC frequency|
|LCALL|WRITE_CODE||
|MOV|I2C_DATA,#79H|;Contrast set|
|LCALL|WRITE_CODE||
|MOV|I2C_DATA,#50H|;Power/ICON control/Contrast set|
|LCALL|WRITE_CODE||
|MOV|I2C_DATA,#6CH|;Follower control|
|LCALL|WRITE_CODE||
|MOV|I2C_DATA,#0CH|;Display ON/OFF|
|LCALL|WRITE_CODE||
|MOV|I2C_DATA,#01H|;Clear Display|
|LCALL|WRITE_CODE||
> Page 9 of 38 **09**
## **5. Function Description**
## **System Interface**
This chip has all four kinds of interface type with MPU: 4-bit bus, 8-bit bus. 4-bit bus or 8-bit bus is selected by DL bit in the instruction register.
During read or write operation, two 8-bit registers are used. One is data register (DR); the other is instruction register (IR).
The data register (DR) is used as temporary data storage place for being written into or read from DDRAM/CGRAM/ICON RAM, target RAM is selected by RAM address setting instruction. Each internal operation, reading from or writing into RAM, is done automatically. So to speak, after MPU reads DR data, the data in the next DDRAM/CGRAM/ICON RAM address is transferred into DR automatically. Also after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM/ICON RAM automatically.
The Instruction register (IR) is used only to store instruction code transferred from MPU. MPU cannot use it to read instruction data.
Using RS input pin to select command or data in 4-bit/8-bit bus mode.
## **I2C interface**
It just only could write Data or Instruction to ST7032 by the IIC Interface.
It could not read Data or Instruction from ST7032 (except Acknowledge signal).
SCL: serial clock input
SDA: serial data input
## **Slaver address could only set to 0111110, no other slaver address could be set**
The I2C interface send RAM data and executes the commands sent via the I2C Interface. It could send data bit to the RAM.
The I2C Interface is two-line communication between different ICs or modules. The two lines are a Serial Data line (SDA) and a Serial Clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy.
## **BIT TRANSFER**
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse because changes in the data line at this time will be interpreted as a control signal. Bit transfer is illustrated in Fig.1.
> Page 10 of 38 **10**
## **START AND STOP CONDITIONS**
In the I2C line, while the clock is HIGH is defined as the START condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP condition (P). The START and STOP conditions are illustrated in Fig.2.
## **SYSTEM CONFIGURATION**
The system configuration is illustrated in Fig.3.
- Transmitter: the device, which sends the data to the bus
- Master: the device, which initiates a transfer, generates clock signals and terminates a transfer
- Slave: the device addressed by a master
- Multi-Master: more than one master can attempt to control the bus at the same time without corrupting
- the message
- Arbitration: procedure to ensure that, if more than one master simultaneously tries to control the bus,
- only one is allowed to do so and the message is not corrupted
- Synchronization: procedure to synchronize the clock signals of two or more devices.
## **ACKNOWLEDGE**
## **Acknowledge is not Busy Flag in I2C interface.**
Each byte of eight bits is followed by an acknowledge bit. The acknowledge bit is a HIGH signal put on the bus by the transmitter during which time the master generates an extra acknowledge related clock pulse. A slave receiver which is addressed must generate an acknowledge after the reception of each byte. A master receiver must also generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges must pull-down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse (set-up and hold times must be taken into consideration). A master receiver must signal an end-of-data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master to generate a STOP condition. Acknowledgement on the I2C Interface is illustrated in Fig.4.
> Page 11 of 38 **11**
## **I2C Interface protocol**
The ST7032 supports command, data write addressed slaves on the bus.
Before any data is transmitted on the I2C Interface, the device, which should respond, is addressed first. Only one 7-bit slave addresses (0111110) is reserved for the ST7032. The R/W is assigned to 0 for Write only.
The I2C Interface protocol is illustrated in Fig.5.
The sequence is initiated with a START condition (S) from the I2C Interface master, which is followed by the slave address.
All slaves with the corresponding address acknowledge in parallel, all the others will ignore the I2C Interface transfer. After acknowledgement, one or more command words follow which define the status of the addressed slaves.
A command word consists of a control byte, which defines Co and RS, plus a data byte. The last control byte is tagged with a cleared most significant bit (i.e. the continuation bit Co). After a control byte with a cleared Co bit, only data bytes will follow. The state of the RS bit defines whether the data byte is interpreted as a command or as RAM data. All addressed slaves on the bus also acknowledge the control and data bytes. After the last control byte, depending on the RS bit setting; either a series of display data bytes or command data bytes may follow. If the RS bit is set to logic 1, these display bytes are stored in the display RAM at the address specified by the data pointer. The data pointer is automatically updated and the data is directed to the intended ST7032i device. If the RS bit of the last control byte is set to logic 0, these command bytes will be decoded and the setting of the device will be changed according to the received commands. Only the addressed slave makes the acknowledgement after each byte. At the end of the transmission the I2C INTERFACE-bus master issues a STOP condition (P).
> Page 12 of 38 **12**
During write operation, two 8-bit registers are used. One is data register (DR), the other is instruction register (IR).
The data register (DR) is used as temporary data storage place for being written into
DDRAM/CGRAM/ICON
RAM, target RAM is selected by RAM address setting instruction. Each internal operation, writing into RAM, is done automatically. So to speak, after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM/ICON RAM automatically.
The Instruction register (IR) is used only to store instruction code transferred from MPU. MPU cannot use it to read instruction data.
To select register, use RS input in I2C interface.
## **Busy Flag (BF)**
When BF = "High”, it indicates that the internal operation is being processed. So during this time the next instruction cannot be accepted. BF can be read, when RS = Low and R/W = High (Read Instruction Operation), through DB7 port. Before executing the next instruction, be sure that BF is not High.
> Page 13 of 38 **13**
## **Address Counter (AC)**
Address Counter (AC) stores DDRAM/CGRAM/ICON RAM address, transferred from IR. After writing into (reading from) DDRAM/CGRAM/ICON RAM, AC is automatically increased (decreased)
by 1.
When RS = "Low" and R/W = "High", AC can be read through DB0 ~ DB6 ports.
## **Display Data RAM (DDRAM)**
Display data RAM (DDRAM) stores display data represented in 8-bit character codes. Its extended capacity is 80 x 8 bits, or 80 characters. The area in display data RAM (DDRAM) that is not used for display can be used as general data RAM. See Figure 7 for the relationships between DDRAM addresses and positions on the liquid crystal display.
The DDRAM address (ADD) is set in the address counter (AC) as hexadecimal.
## Ø **1-line display (N = 0) (Figure 8)**
When there are fewer than 80 display characters, the display begins at the head position. For example, if using only the ST7032, 16 characters are displayed. See Figure 8. When the display shift operation is performed, the DDRAM address shifts. See Figure 9.
> Page 14 of 38 **14**
## Ø **2-line display (N = 1) (Figure 10)**
Case 1: When the number of display characters is less than 40 2 lines, the two lines are displayed from the head. Note that the first line end address and the second line start address are not consecutive. See Figure 10.
Case 2: For a 16-character 2-line display See Figure 11.
When display shift operation is performed, the DDRAM address shifts. See Figure 11.
> Page 15 of 38 **15**
## **Character Generator ROM (CGROM)**
The character generator ROM generates 5 x 8 dot character patterns from 8-bit character codes. It can generate 240/250/248/256 5 x 8 dot character patterns (select by OPR1/2 ITO pin). User-defined character patterns are also available by mask-programmed ROM.
## **Character Generator RAM (CGRAM)**
In the character generator RAM, the user can rewrite character patterns by program. For 5 x 8 dots, eight character patterns can be written.
Write into DDRAM the character codes at the addresses shown as the left column of Table 3 to show the character patterns stored in CGRAM.
See Table 4 for the relationship between CGRAM addresses and data and display patterns. Areas that are not used for display can be used as general data RAM.
## **ICON RAM**
## **In the ICON RAM, the user can rewrite icon pattern by program.**
## **There are totally 80 dots for icon can be written.**
**See Table 5 for the relationship between ICON RAM address and data and the display patterns.**
## **Timing Generation Circuit**
The timing generation circuit generates timing signals for the operation of internal circuits such as DDRAM, CGROM and CGRAM. RAM read timing for display and internal operation timing by MPU access are generated separately to avoid interfering with each other. Therefore, when writing data to DDRAM, for example, there will be no undesirable interference, such as flickering, in areas other than the display area.(In I2C interface the reading function is invalid.)
## **LCD Driver Circuit**
LCD Driver circuit has 17 common and 80 segment signals for LCD driving. Data from CGRAM/CGROM/ICON is transferred to 80 bit segment latch serially, and then it is stored to 80 bit shift latch. When each common is selected by 17 bit common register, segment data also output through segment driver from 80 bit segment latch.
## **Cursor/Blink Control Circuit**
It can generate the cursor or blink in the cursor/blink control circuit. The cursor or the blink appears in the digit at the display data RAM address set in the address counter.
> Page 16 of 38 **16**
> Page 17 of 38 **17**
Notes:
1. Character code bits 0 to 2 correspond to CGRAM address bits 3 to 5 (3 bits: 8 types).
2. CGRAM address bits 0 to 2 designate the character pattern line position. The 8th line is the cursor position and its display is formed by a logical OR with the cursor. Maintain the 8th line data,
corresponding to the cursor display position, at 0 as the cursor display. If the 8th line data is 1, 1 bit will light up the 8th line regardless of the cursor presence.
3. Character pattern row positions correspond to CGRAM data bits 0 to 4 (bit 4 being at the left).
4. As shown Table 4, CGRAM character patterns are selected when character code bits 4 to 7 are all 0. However, since character code bit 3 has no effect, the R display example above can be selected by either character code 00H or 08H.
5. “1” for CGRAM data corresponds to display selection and “0” to non-selection,“-“ Indicates no effect.
6. Different OPR1/2 ITO option can select different CGRAM size.
> Page 18 of 38 **18**
When SHLS=1, ICON RAM map refer below table
|**ICON address**|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|
|---|---|---|---|---|---|---|---|---|
||D7|D6|DS|D4|D3|D2|DI|DO|
|OOH|.|.|.|S1|S2|S3|S4|SS|
|01H|~~.~~|~~.~~|~~.~~|SS|S7|SS|S9|S10|
|02H|~~.~~|~~-~~|~~.~~|S11|S12|S13|S14|S1S|
|03H|~~.~~|~~.~~|~~.~~|S16|S17|S18|S19|S20|
|04H|~~.~~|~~-~~|~~.~~|S21|S22|S23|S24|S2S|
|OSH|~~.~~|~~.~~|~~.~~|S26|S27|S28|S29|S30|
|06H|~~.~~|~~-~~|~~.~~|S31|S32|S33|S34|S3S|
|07H|~~.~~|~~.~~|~~.~~|S36|S37|S38|S39|S40|
|08H|~~.~~|~~-~~|~~.~~|S41|S42|S43|S44|S4S|
|09H|~~.~~|~~.~~|~~.~~|S46|S47|S48|S49|SS0|
|OAH|.|.|.|SS1|SS2|SS3|SS4|SSS|
|OBH|~~.~~|~~.~~|~~.~~|SSS|SS7|SSS|SS9|S60|
|OCH|~~.~~|~~-~~|~~.~~|S61|S62|S63|S64|SSS|
|ODH|~~.~~|~~-~~|~~.~~|SSS|S67|S68|S69|S70|
|0EH|~~.~~|~~.~~|~~.~~|S71|S72|S73|S74|S7S|
|OFH|~~.~~|~~.~~|~~.~~|S76|S77|S78|S79|S80|
## When SHLS=0, ICON RAM map refer below table
ICON RAM bits
|**ICON address**
OOH
01H|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|ICON RAM bits|
|---|---|---|---|---|---|---|---|---|
||D7
.
.|D6
.
.|DS
.
.|D4
S80
S7S|D3
S79
S74|D2
S78
S73|DI
S77
S72|DO
S76
S71|
|02H|~~.~~|~~.~~|~~.~~|S70|S69|S68|S67|SSS|
|03H|~~.~~|~~.~~|~~.~~|SSS|S64|S63|S62|S61|
|04H|.|.|~~.~~|S60|SS9|SSS|SS7|SSS|
|OSH|~~.~~|~~-~~|~~.~~|SSS|SS4|SS3|SS2|SS1|
|06H|~~.~~|~~.~~|~~.~~|SSO|S49|S48|S47|S46|
|07H|~~.~~|~~.~~|~~.~~|S4S|S44|S43|S42|S41|
|08H|~~.~~|~~-~~|~~.~~|S40|S39|S38|S37|S36|
|09H|~~.~~|~~.~~|~~.~~|S3S|S34|S33|S32|S31|
|OAH|~~.~~|~~.~~|~~.~~|S30|S29|S28|S27|S26|
|OBH|~~.~~|~~.~~|~~.~~|S2S|S24|S23|S22|S21|
|OCH|~~.~~|~~-~~|~~.~~|S20|S19|S18|S17|S16|
|ODH|~~.~~|~~.~~|~~.~~|S1S|S14|S13|S12|S11|
|0EH|~~.~~|~~-~~|~~.~~|S10|S9|SS|S7|SS|
|OFH|.|.|.|SS|S4|S3|S2|S1|
**Table 5. ICON RAM map**
**When ICON RAM clata is fillecl the corresponcling position clisplayecl is clescribecl as the following table.**
> Page 19 of 38 **19**
## **Instructions**
There are four categories of instructions that:
- **Designate ST7032 functions, such as display format, data length, etc.**
- **Set internal RAM addresses**
- **Perform data transfer with internal RAM**
- **Others**
Page 20 of 38
**20**
## **instruction table at “Normal mode”**
## Ø **instruction table at “Extension mode”**
(when “EXT” option pin connect to VSS, the instruction set follow below table)
> Page 21 of 38 **21**
## **6. Instruction Description**
Clear all the display data by writing "20H" (space code) to all DDRAM address, and set DDRAM address to "00H" into AC (address counter). Return cursor to the original status, namely, bring the cursor to the left edge on first line of the display. Make entry mode increment (I/D = "1").
Return Home is cursor return home instruction. Set DDRAM address to "00H" into the address counter. Return cursor to its original site and return display to its original status, if shifted. Contents of DDRAM do not change.
Set the moving direction of cursor and display.
## Ø **I/D : Increment / decrement of DDRAM address (cursor or blink)**
When I/D = "High", cursor/blink moves to right and DDRAM address is increased by 1.
When I/D = "Low", cursor/blink moves to left and DDRAM address is decreased by 1.
* CGRAM operates the same as DDRAM, when read from or write to CGRAM.
## Ø **S: Shift of entire display**
When DDRAM read (CGRAM read/write) operation or S = "Low", shift of entire display is not performed. If
S = "High" and DDRAM write operation, shift of entire display is performed according to I/D value (I/D = "1": shift left, I/D = "0" : shift right).
> Page 22 of 38 **22**
Control display/cursor/blink ON/OFF 1 bit register.
Ø **D : Display ON/OFF control bit**
When D = "High", entire display is turned on.
When D = "Low", display is turned off, but display data is remained in DDRAM.
Ø **C : Cursor ON/OFF control bit**
When C = "High", cursor is turned on.
When C = "Low", cursor is disappeared in current display, but I/D register remains its data.
Ø **B : Cursor Blink ON/OFF control bit**
When B = "High", cursor blink is on, that performs alternate between all the high data and display character at the cursor position.
When B = "Low", blink is off.
## Ø **S/C: Screen/Cursor select bit**
When S/C=”High”, Screen is controlled by R/L bit.
When S/C=”Low”, Cursor is controlled by R/L bit.
Page 23 of 38
**23**
## Ø **R/L: Right/Left**
When R/L=”High”, set direction to right.
When R/L=”Low”, set direction to left.
Without writing or reading of display data, shift right/left cursor position or display. This instruction is used to correct or search display data. During 2-line mode display, cursor moves to the 2nd line after 40th digit of 1st line. Note that display shift is performed simultaneously in all the line. When displayed data is shifted repeatedly, each line shifted individually. When display shift is performed, the contents of address counter are not changed.
## Ø **DL : Interface data length control bit**
When DL = "High", it means 8-bit bus mode with MPU.
When DL = "Low", it means 4-bit bus mode with MPU. So to speak, DL is a signal to select 8-bit or 4-bit bus mode.
When in 4-bit bus mode, it needs to transfer 4-bit data by two times.
## Ø **N : Display line number control bit**
When N = "High", 2-line display mode is set.
When N = "Low", it means 1-line display mode.
## Ø **DH : Double height font type control bit**
When DH = " High " and N= “Low”, display font is selected to double height mode(5x16 dot),RAM address can only use 00H~27H.
When DH= “High” and N= “High”, it is forbidden.
When DH = " Low ", display font is normal (5x8 dot).
> Page 24 of 38 **24**
## Ø **IS : normal/extension instruction select**
When IS=” High”, extension instruction be selected (refer extension instruction table) When IS=” Low”, normal instruction be selected (refer normal instruction table)
Set CGRAM address to AC.
This instruction makes CGRAM data available from MPU.
Set DDRAM address to AC.
This instruction makes DDRAM data available from MPU.
When 1-line display mode (N = 0), DDRAM address is from "00H" to "4FH".
In 2-line display mode (N = 1), DDRAM address in the 1st line is from "00H" to "27H", and DDRAM address in the 2nd line is from "40H" to "67H".
> Page 25 of 38 **25**
When BF = “High”, indicates that the internal operation is being processed. So during this time the next instruction cannot be accepted.
The address Counter (AC) stores DDRAM/CGRAM addresses, transferred from IR.
After writing into (reading from) DDRAM/CGRAM, AC is automatically increased (decreased) by 1.
Write binary 8-bit data to **CGRAM, DDRAM or ICON RAM**
The selection of RAM from DDRAM, CGRAM or ICON RAM, is set by the previous address set instruction
: DDRAM address set, CGRAM address set, ICON RAM address set. RAM set instruction can also determine the AC direction to RAM.
After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
Read binary 8-bit data from DDRAM/CGRAM/ICON RAM
The selection of RAM is set by the previous address set instruction. If address set instruction of RAM is not performed before this instruction, the data that read first is invalid, because the direction of AC is not determined. If you read RAM data several times without RAM address set instruction before read operation, you can get correct RAM data from the second, but the first data would be incorrect, because there is no time margin to transfer RAM data.
## ※ **Read data must be “set address” before this instruction.**
## Ø **BS: bias selection**
When BS=”High”, the bias will be 1/4
When BS=”Low”, the bias will be 1/5
BS will be invalid when external bias resistors are used (OPF1=1, OPF2=1)
## Ø **F2,F1,F0 : Internal OSC frequency adjust**
When CLS connect to high, that instruction can adjust OSC and Frame frequency.
> Page 26 of 38 **26**
Set ICON RAM address to AC.
This instruction makes ICON data available from MPU.
When IS=1 at Extension mode,
The ICON RAM address is from "00H" to "0FH".
## Ø **Ion: set ICON display on/off**
When Ion = "High", ICON display on.
When Ion = "Low", ICON display off.
## Ø **Bon: switch booster circuit**
Bon can only be set when internal follower is used (OPF1=0, OPF2=0).
When Bon = "High", booster circuit is turn on.
When Bon = "Low", booster circuit is turn off.
## Ø **C5,C4 : Contrast set(high byte)**
C5,C4,C3,C2,C1,C0 can only be set when internal follower is used (OPF1=0,OPF2=0).They can more precisely adjust the input reference voltage of V0 generator. The details please refer to the supply voltage for LCD driver.
Page 27 of 38
**27**
## Ø **Fon: switch follower circuit**
Fon can only be set when internal follower is used (OPF1=0,OPF2=0).
When Fon = "High", internal follower circuit is turn on.
When Fon = "Low", internal follower circuit is turn off.
## Ø **Rab2,Rab1,Rab0 : V0 generator amplified ratio**
Rab2,Rab1,Rab0 can only be set when internal follower is used (OPF1=0,OPF2=0).They can adjust the amplified ratio of V0 generator. The details please refer to the supply voltage for LCD driver.
## Ø **C3,C2,C1,C0:Contrast set(low byte)**
C5,C4,C3,C2,C1,C0 can only be set when internal follower is used (OPF1=0,OPF2=0).They can more precisely adjust the input reference voltage of V0 generator. The details please refer to the supply voltage for LCD driver.
Page 28 of 38
**28**
## **7. Optical Characteristics**
|**Item**|**Symbol**|**Condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|View Angle||CR≧2|20|－|40|deg|
||(H)φ|CR≧2|-30|－|30|deg|
|Contrast Ratio|CR|－|－|3|－|－|
|Response Time|T rise|－|－|250|400|ms|
||T fall|－|－|100|250|ms|
## **Definition of Operation Voltage (Vop) Definition of Response Time ( Tr , Tf )**
**==> picture [412 x 164] intentionally omitted <==**
**----- Start of picture text -----**
Non-selected Non-selected
Intensity Selected Wave Condition | S elected Condition Condition
100 ％ _ Non-selected Wave Intensity 1
!
J ‘ i
10%
i
Cr Max
Cr = Lon / Loff 90%
100%
\ '
' ;
Vop
Driving Voltage(V) T r T f
[positive type] 【 Positive type 】
**----- End of picture text -----**
## **Conditions:**
Operating Voltage: Vop Viewing Angle (θ ， φ): 0° ， 0° Frame Frequency: 64 HZ Driving Waveform: 1/N duty, 1/a bias
## **Definition of viewing angle (CR** ≧ **2)**
**==> picture [257 x 150] intentionally omitted <==**
**----- Start of picture text -----**
θ b
θ f = 180 °
θ l
θ r
: OONy 7 a 7
= 270 ° = 90 °
a |
.
= 0 °
**----- End of picture text -----**
> Page 29 of 38 **29**
**8. Absolute Maximum Ratings**
**Item Symbol Min Typ Max Unit** Operating Temperature TOP -20 － +70 ℃ Storage Temperature TST -30 － +80 ℃ Supply voltage for Logic VDD -0.3 － 6.0 V LCD Driver Voltage VLCD 7.0- VSS -0.3+ VSS V ~~ee~~ **9. Electrical Characteristics**
|**Item**|**Symbol**|**Condition**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Supply Voltage For Logic|VDD-VSS|－|3|3.3|5
(bon=1
max=3.5V)|max=3.5V)
V|
|Supply Voltage For LCD|VLCD|Ta=-20℃
Ta=25℃
Ta=70℃|－
－
－|－
4.5
－|－
－
－|V
V
V|
|Input High Volt.|VIH|－|0.7 VDD|－|VDD|V|
|Input Low Volt.|VIL|－|－|－|0.2 VDD|V|
|Output High Volt.|VOH|－|0.8 VDD|－|VDD|V|
|Output Low Volt.|VOL|－|－|－|0.2VDD|V|
|Supply Current
(No include LED Backlight)|IDD|－|－|0.18|－|mA|
> Page 30 of 38 **30**
## **10. Backlight Information**
## **Specification**
|**Specification**|||||||
|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL MIN**|**SYMBOL MIN**|**TYP**|**MAX**|**UNIT**|**TEST CONDITION**|
|**Supply Current ILED**|**Supply Current ILED**|**28.8**|**32**|**50**|**mA**|**V=3.5V**|
|**Supply Voltage V**|**Supply Voltage V**|**3.4**|**3.5**|**3.6**|**V**||
|**Reverse Voltage VR**|**Reverse Voltage VR**|－|－|**5**|**V**|－|
|**Luminous**
**Intensity**
**(Without LCD)**|**IV**|**441.6**|**552.0**|－|**CD/M2 ILED=32mA**|**ILED=32mA**|
|**LED Life Time**|－|－|**50000**|－|**Hr.**|**ILED**≦**32mA**|
|**Color**|**White**||||||
**Note: The LED of B/L is driven by current only. Driving voltage is only for reference To make driving current in safety area (waste current between minimum and maximum). Note1: 50K hours is only an estimate for reference.**
**==> picture [129 x 88] intentionally omitted <==**
**----- Start of picture text -----**
LED B\L Drive Method
Drive from A , K
R
A
B/L
K
**----- End of picture text -----**
Page 31 of 38
**31**
## **11. Reliability**
## **Content of Reliability Test (wide temperature, -20** ℃ **~70** ℃ **)**
|**Content of Reliability Test (wide temperature, -20y Test (wide temperature, -20 Test (wide temperature, -20perature, -20erature, -20**℃**~70**℃**)**|**Content of Reliability Test (wide temperature, -20y Test (wide temperature, -20 Test (wide temperature, -20perature, -20erature, -20**℃**~70**℃**)**|**Content of Reliability Test (wide temperature, -20y Test (wide temperature, -20 Test (wide temperature, -20perature, -20erature, -20**℃**~70**℃**)**|**Content of Reliability Test (wide temperature, -20y Test (wide temperature, -20 Test (wide temperature, -20perature, -20erature, -20**℃**~70**℃**)**|
|---|---|---|---|
|**Environmental Test**||||
|**Test Item**|**Content of Test**|**Condition Note**|**Condition Note**|
|High Temperature storage|Endurance test applying the high storage temperature for a long
time.|80℃
200hrs|2|
|Low Temperature storage|Endurance test applying the high storage temperature for a long
time.|-30℃
200hrs|1,2|
|High Temperature Operation|Endurance test applying the electric stress (Voltage & Current)
and the thermal stress to the element for a long time.|70℃
200hrs|-|
|Low Temperature Operation|Endurance test applying the electric stress under low
temperature for a long time.|-20℃
200hrs|1|
|High Temperature/
Humidity Operation|The module should be allowed to stand at 60℃,90%RH max
For 96hrs under no-load condition excluding the polarizer,
Then taking it out and drying it at normal temperature.|60℃,90%RH
96hrs|1,2|
|Thermal shock resistance|The sample should be allowed stand the following 10 cycles of
operation
-20℃
25℃
70℃
30min
5min
30min
1 cycle|-20℃/70℃
10 cycles|-|
|Vibration test|Endurance test applying the vibration during transportation and
using.|fixed
amplitude:
15mm
Vibration.
Frequency:
10~55Hz.
One cycle 60
seconds to 3
directions of
X,Y,Z for
Each 15
minutes|3|
|Static electricity test|Endurance test applying the electric stress to the terminal.|VS=800V,RS=
1.5kΩ
CS=100pF
1 time|VS=800V,RS=
——|
## **Note1: No dew condensation to be observed.**
**Note2: The function test shall be conducted after 4 hours storage at the normal temperature and humidity after remove from the test chamber.**
**Note3: Vibration test will be conducted to the product itself without putting it in a container.**
> Page 32 of 38 **32**
**12. Inspection specification** NO Item Criterion AQL 1.1 Missing vertical, horizontal segment, segment contrast defect. 1.2 Missing character, dot or icon. 1.3 Display malfunction. Electrical 01 1.4 No function or no display. 0.65 Testing 1.5 Current consumption exceeds product specifications. 1.6 LCD viewing angle defect. 1.7 Mixed product types. 1.8 Contrast defect. 2.1 White and black spots on display ≦ 0.25mm, no more Black or white than three white or black spots present. spots on LCD 02 2.2 Densely spaced: No more than two spots or lines within 2.5 (display only) 3mm ~~|~~ 3.1 Round type : As following drawing Φ=( x + y ) / 2 2.5 LCD black spots, white spots, 03 contamination (non-display) 3.2 Line type : (As following drawing) Length Width Acceptable Q TY --W ≦ 0.02 Accept no dense 2.5 L ≦ 3.0 0.02 ＜ W ≦ 0.03 2 L ≦ 2.5 0.03 ＜ W ≦ 0.05 ~~Press==~~ --0.05 ＜ W As round type If bubbles are visible, Size Φ Acceptable Q judge using black spot TY specifications, not ≦ 0.20 Accept no 04 Polarizer easy to find, must dense 2.5 bubbles check in specify 0.20 ＜ ≦ 0.50 3 direction. 0.50 ＜ ≦ 1.00 2 1.00 ＜ 0 Total Q TY 3 ~~Imm~~ Page 33 of 38 **33**
|NO
~~a~~
~~es~~|Item
~~ee~~|Criterion
~~ee~~|AQL
~~ee~~|
|---|---|---|---|
|05
~~es~~|Scratches|Follow NO.3 LCD black spots,white spots,contamination||
|06
~~es~~|Chipped
glass|Symbols Define:
x: Chip length
y: Chip width
z: Chip thickness
k: Seal width
t: Glass thickness a: LCD side length
L: Electrode pad length:
6.1 General glass chip :
6.1.1 Chip on panel surface and crack between panels:
☉If there are 2 or more chips, x is total length of each chip.
6.1.2 Corner crack:
☉If there are 2 or more chips, x is the total length of each chip.
z: Chipthickness
y: Chipwidth
x: Chiplength
Z≦1/2t
Not over viewing
area
x≦1/8a
1/2t＜z≦2t
Not exceed 1/3k
x≦1/8a
z: Chipthickness
y: Chipwidth
x: Chiplength
Z≦1/2t
Not over viewing
area
x≦1/8a
1/2t＜z≦2t
Not exceed 1/3k
x≦1/8a
,
XaN|2.5|
> Page 34 of 38 **34**
**==> picture [494 x 561] intentionally omitted <==**
**----- Start of picture text -----**
a NO a Item Criterion AQL
Symbols :
x: Chip length y: Chip width z: Chip thickness
k: Seal width t: Glass thickness a: LCD side length
L: Electrode pad length
6.2 Protrusion over terminal :
6.2.1 Chip on electrode pad :
Z
y: Chip width x: Chip length z: Chip thickness
y ≦ 0.5mm x ≦ 1/8a 0 ＜ z ≦ t
6.2.2 Non-conductive portion:
i L
Glass
06 2.5
crack te z Me ean ONE i
A A
y: Chip width x: Chip length z: Chip
thickness
y ≦ L x ≦ 1/8a 0 ＜ z ≦ t
☉ If the chipped area touches the ITO terminal, over 2/3 of the
ITO must remain and be inspected according to electrode
terminal specifications.
☉ If the product will be heat sealed by the customer, the
alignment mark not be damaged.
6.2.3 Substrate protuberance and internal crack.
4 y: width x: length
y ≦ 1/3L x ≦ a
**----- End of picture text -----**
> Page 35 of 38 **35**
|NO
~~oP~~|Item
~~oP~~|Criterion
~~oP~~|AQL
~~oP~~|
|---|---|---|---|
|07
~~oP~~|Cracked
glass
~~oP~~|The LCD with extensive crack is not acceptable.
~~oP~~|2.5
~~oP~~|
|08
~~oP~~
~~PP~~|Backlight
elements
~~oP~~
~~PP~~|8.1 Illumination source flickers when lit.
8.2 Spots or scratched that appear when lit must be judged.
Using LCD spot, lines and contamination standards.
8.3 Backlight doesn’t light or color wrong.
~~oP~~
|0.65
2.5
0.65
~~oP~~
|
|09
~~PP~~|Bezel
~~PPop~~|9.1 Bezel may not have rust, be deformed or have
fingerprints, stains or other contamination.
9.2 Bezel must complywithjob specifications.
~~op~~|2.5
0.65
~~op~~|
|10
~~PP~~|PCB、COB
~~PP~~|10.1 COB seal may not have pinholes larger than 0.2mm or
contamination.
10.2 COB seal surface may not have pinholes through to the 2.5
IC.
10.3 The height of the COB should not exceed the height
indicated in the assembly diagram.
10.4 There may not be more than 2mm of sealant outside
the seal area on the PCB. And there should be no more
than three places.
10.5 No oxidation or contamination PCB terminals.
10.6 Parts on PCB must be the same as on the production
characteristic chart. There should be no wrong parts,
missing parts or excess parts.
10.7 The jumper on the PCB should conform to the product
characteristic chart.
10.8 If solder gets on bezel tab pads, LED pad, zebra pad or
screw hold pad, make sure it is smoothed down.
10.9 The Scraping testing standard for Copper Coating of
PCB
**X**
**Y**
**X * Y<=2mm2**
|2.5
10.2 COB seal surface may not have pinholes through to the 2.5
0.65
2.5
2.5
0.65
0.65
2.5
2.5
|
|11|Soldering|11.1 No un-melted solder paste may be present on the PCB.
11.2 No cold solder joints, missing solder connections,
oxidation or icicle.
11.3 No residue or solder balls on PCB.
11.4 No short circuits in components on PCB.|2.5
2.5
2.5
0.65|
Page 36 of 38
**36**
|NO|Item|Criterion|AQL|
|---|---|---|---|
|12|General
appearance|12.1 No oxidation, contamination, curves or, bends on
interface Pin (OLB) of TCP.
12.2 No cracks on interface pin (OLB) of TCP.
12.3 No contamination, solder residue or solder balls on
product.
12.4 The IC on the TCP may not be damaged, circuits.
12.5 The uppermost edge of the protective strip on the
interface pin must be present or look as if it causes the
interface pin to sever.
12.6 The residual rosin or tin oil of soldering (component or
chip component) is not burned into brown or black color.
12.7 Sealant on top of the ITO circuit has not hardened.
12.8 Pin type must match type in specification sheet.
12.9 LCD pin loose or missing pins.
12.10 Product packaging must the same as specified on
packaging specification sheet.
12.11 Product dimension and structure must conform to
product specification sheet.|2.5
0.65
2.5
2.5
2.5
2.5
2.5
0.65
0.65
0.65
0.65|
## **13. Precautions in use of LCD Modules**
1. Avoid applying excessive shocks to the module or making any alterations or modifications to it.
2. Don’t make extra holes on the printed circuit board, modify its shape or change the components of LCD module.
3. Don’t disassemble the LCM.
4. Don’t operate it above the absolute maximum rating.
5. Don’t drop, bend or twist LCM.
6. Soldering: only to the I/O terminals.
7. Storage: please storage in anti-static electricity container and clean environment.
8. Midas have the right to change the passive components
- (Resistors, capacitors and other passive components will have different appearance and color caused by the different supplier.)
9. Midas have the right to change the PCB Rev.
> Page 37 of 38 **37**
## **14. Material List of Components for RoHs**
1. MIDAS Components Ltd. hereby declares that all of or part of products, including, but not limited to, the LCM, accessories or packages, manufactured and/or delivered to your company (including your subsidiaries and affiliated company) directly or indirectly by our company (including our subsidiaries or affiliated companies) do not intentionally contain any of the substances listed in all applicable EU directives and regulations, including the following substances.
## Exhibit A ： The Harmful Material List
|Material|(Cd)|(Pb)|(Hg)|(Cr6+)|PBBs|PBDEs|
|---|---|---|---|---|---|---|
|Limited
Value|100
ppm|1000
ppm|1000
ppm|1000
ppm|1000
ppm|1000
ppm|
|Above limited value is set upaccordingto RoHS.|||||||
2. Process for RoHS requirement ：
- Use the Sn/Ag/Cu soldering surface `;` the surface of Pb-free solder is rougher than we used before.
- Heat-resistance temp. ：
- Reflow ： 250 ℃ , 30 seconds Max.
Connector soldering wave or hand soldering ： 320 ℃ , 10 seconds max.
- Temp. curve of reflow, max. Temp. ： 235±5 ℃
Recommended customer’s soldering temp. of connector ： 280 ℃ , 3 seconds.
## **15. Recommendable storage**
1. Place the panel or module in the temperature 25°C±5°C and the humidity below 65% RH
2. Do not place the module near organics solvents or corrosive gases.
3. Do not crush, shake, or jolt the module
> Page 38 of 38 **38**
## Links
- [View this product on Novapart](https://novapart.co/products/MCCOG21605D6W-BNMLWI/alphanumeric-lcd-16-x-2-white-on-blue-3v-to-5v-i2c)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/midas/mccog21605d6w-bnmlwi/lcd-cog-2x16-neg-stn-w-b-l-i2c/dp/2063206)
---
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