MAXM17572AMC+
DC/DC POL Converter Synchronous Buck, Adjustable, 4.5 to 60V in, 0.9 to 12V/1A out, uSLIC-EP-12
- Manufacturer: ANALOG DEVICES
- Product type: DC / DC Non Isolated Board Mount Converters - Adjustable Output
- SVHC: No SVHC (21-Jan-2025)
- Depth: 3.5mm
- Width: 3.5mm
- Height: 2.3mm
- Topology: Synchronous Buck (Step Down)
- No. of Pins: 12Pins
- Product Range: MAXM17572 Series
- No. of Outputs: 1 Output
- Output Current: 1A
- Output Power Max: -
- Input Voltage Max: 60V
- Input Voltage Min: 4.5V
- Output Current Max: 1A
- Output Voltage Max: 12V
- Output Voltage Min: 900mV
- Switching Frequency: 2.2MHz
- Input Voltage DC Max: 60V
- Input Voltage DC Min: 4V
- DC / DC Converter Type: uSLIC-12, Module
- DC / DC Converter IC Case: uSLIC-EP
- Operating Temperature Max: 125°C
- Power Supply Applications: Industrial
- DC / DC Converter Output Type: Adjustable
| Delivery and price | |
|---|---|
| Units per pack | 500 |
| Price | 7.68 € |
| Current stock | 10+ |
| Lead time | 30 days |
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## **MAXM17572**
## _Click_ _**here** to ask an associate for production status of specific part numbers._ **4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module**
## **General Description**
The Himalaya series of voltage regulator ICs, power modules, and chargers enable cooler, smaller, and simpler power-supply solutions. The MAXM17572 is a high-efficiency, synchronous, Himalaya step-down DC-DC power module with integrated controller, MOSFETs, compensation components, and inductor that operates over a wide input-voltage range. The module operates from 4.5V to 60V input and delivers up to 1A output current over a programmable output voltage range of 0.9V to 12V. The module significantly reduces design complexity and manufacturing risks, and offers a true “plug-and-play” power supply solution, reducing the time-to-market. The MAXM17572 employs peak-current-mode control architecture.
The MAXM17572 offers programmable switching frequency, RESET output voltage monitoring, adjustable input undervoltage lockout, and programmable soft-start. The module also features hiccup-mode overload protection and a thermal shutdown function.
The MAXM17572 is available in a low-profile, compact, 12-pin 3.5mm x 3.5mm x 2.3mm uSLIC package. Simulation models are available.
## **Applications**
- ●Industrial Power Supplies
- Distributed Supply Regulation
## **Benefits and Features**
- Easy to use
- Wide 4.5V to 60V Input
- Adjustable 0.9V to 12V Output
- ±1.2% Feedback Accuracy
- Up to 1A Output Current
- Internally Control Loop Compensated
- All Ceramic Capacitors
- Flexible Design
- PWM Mode of Operation
- Adjustable Frequency with External Frequency Synchronization (400kHz to 2.2MHz)
- Programmable Soft-Start
- Open-Drain Power Good Output (RESET Pin)
- Programmable EN/UVLO threshold
- Auxiliary Bootstrap Supply (EXTVCC) for Improved Efficiency
- Robust Operation
- Over Temperature Protection
- Hiccup Over Current Protection
- High Industrial Ambient Operating Temperature Range (-40°C to +125°C)/Junction Temperature Range (-40°C to +150°C)
- Rugged
- Complies with CISPR32 (EN55032) Class B Conducted and Radiated Emissions.
- FPGA and DSP Point-of-Load Regulator
- Base Station Point-of-Load Regulator
- HVAC and Building Control
_**Ordering Information** appears at end of data sheet._
_19-101182; Rev 0; 9/21_
One Analog Way, Wilmington, MA 01887 U.S.A. | Tel: 781.329.4700 | © 202 1 Analog Devices, Inc. All rights reserved.
## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Typical Application Circuit**
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VIN (7V to 60V)<br>IN BST<br>C4<br>C1<br>0.1µF<br>4.7µF EN/UVLO LX<br>5V, 1A<br>MAXM17572 OUT<br>R2<br>C6<br>VCC EXTVCC 4.7Ω 22µF R3<br>FB C5 118kΩ<br>RT/SYNC FB 0.1µF<br>C2 FB<br>2.2µF R1 SS RESET<br>21.5kΩ C3 R4<br>PGND EP 25.5kΩ<br>5600pF<br>FSW : 900kHz<br>**----- End of picture text -----**<br>
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4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## MAXM17572
## TABLE OF CONTENTS
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Benefits and Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 12 PIN uSLIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Functional Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Linear Regulator (VCC, EXTVCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Enable/Undervoltage Lockout (EN/UVLO), Soft-Start (SS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 External Frequency Synchronization (SYNC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 RESET Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Startup into Prebiased Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Overcurrent Protection/Hiccup Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Thermal Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Operating Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Selection of Input Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Selection of Output Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Selection of Soft-Start Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Setting the Input Undervoltage-Lockout Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Setting the Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Setting the Switching Frequency (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Selection of Component Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Power Dissipation and Output-Current Derating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 PCB Layout Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Typical Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5V Output Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.3V Output Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
LIST OF FIGURES Figure 1. External Clock Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 2. Setting the Input Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 3. Adjusting Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 4. Layout Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module LIST OF TABLES Table 1. Switching Frequency vs. RT Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 2. Selection of Component Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Absolute Maximum Ratings**
|IN to PGND ............................................................ -0.3V to +65V|
|---|
|EN/UVLO to SGND ................................... -0.3V to +(VIN+ 0.3)V|
|EXTVCCto SGND ............... -0.3V to lower of (VIN+ 0.3V)/+26V|
|BST to PGND ......................................................... -0.3V to +70V|
|BST to LX .............................................................. -0.3V to +6.0V|
|BST to VCC............................................................. -0.3V to +65V|
|FB to SGND ............................................................. -0.3V to 1.5V|
|RT/ SYNC, SS,<br>RESET, VCCto SGND ................ -0.3V to +6.0V|
OUT to PGND ............................................-0.3V to +(VIN + 0.3)V PGND to SGND .....................................................-0.3V to +0.3V Output Short Circuit Duration ......................................Continuous Operating Temperature Range (Note 1) ............... -40C to +125C Junction Temperature .........................................-40°C to +150°C Storage Temperature Range ..............................-40°C to +125°C Soldering Temperature (reflow) ........................................+260°C Lead Temperature (soldering, 10s) ...................................+260°C
**Note 1:** Junction temperature greater than +125°C degrades operating lifetimes.
_Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability._
## **Package Information**
## **12 PIN uSLIC**
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Package Code M123A3+2<br>Outline Number 21-100356<br>Land Pattern Number 90-100113<br>Thermal Resistance Four Layer Board (Note 2)<br>Junction to Ambient (θJA) 42°C/W<br>**----- End of picture text -----**<br>
For the latest package outline information and land patterns (footprints), go to _www.maximintegrated.com/packages_ . Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
**Note 2:** Package thermal resistance is measured on an evaluation board with no airflow.
## **Electrical Characteristics**
(VIN = VEN/UVLO = 24V, RRT/SYNC = 40.2kΩ, CVCC = 2.2μF, VPGND = VSGND = VEXTVCC = 0, LX = SS = RESET = OUT = OPEN, VBST to VLX = 5V, VFB = 1V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted (Note3).)
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PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS<br>INPUT SUPPLY (VIN )<br>Input Voltage Range VIN 4.5 60 V<br>Input Shutdown Current IIN-SH VEN/UVLO = 0V (shutdown mode) 4.7 7.25 μA<br>Input Quiescent Current IQ_PWM Normal switching mode, VFB = 0.8V 11 mA<br>Enable/Under Voltage Lockout (EN/UVLO)<br>VENR VEN/UVLO rising 1.19 1.215 1.26<br>EN/UVLO Threshold V<br>VENF VEN/UVLO falling 1.068 1.09 1.131<br>EN/UVLO Input<br>Leakage Current IENLKG VEN/UVLO = 1.25V, TA = 25°C -50 +50 nA<br>LDO (VCC)<br>VRange CC Output Voltage VCC 6V ≤ VIN ≤ 60V; IVCC = 1mA 4.75 5 5.25 V<br>VCC Current Limit IVCC-MAX VCC = 4.3V, VIN = 7V 25 54 100 mA<br>VCC Dropout VVCC-DO VIN = 4.5V , IVCC = 15mA 0.35 V<br>**----- End of picture text -----**<br>
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Electrical Characteristics (continued)**
(VIN = VEN/UVLO = 24V, RRT/SYNC = 40.2kΩ, CVCC = 2.2μF, VPGND = VSGND = VEXTVCC = 0, LX = SS = RESET = OUT = OPEN, VBST to VLX = 5V, VFB = 1V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted (Note3).)
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PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS<br>VVCC-UVR VCC rising 4.05 4.2 4.3<br>VCC UVLO V<br>VVCC-UVF VCC falling 3.65 3.8 3.9<br>EXT LDO (EXTVCC)<br>EXTVCC Switch Over EXTVCC rising 4.56 4.7 4.84<br>V<br>Voltage EXTVCC falling 4.3 4.45 4.6<br>EXTVCC Dropout EXTVCC-DO VEXTVCC = 4.75V , IEXTVCC = 15mA 0.3 V<br>EXTVCC Current Limit EXTVCC_CILI VVCC = 4.5V, VEXTVCC = 7V 26.5 60 105 mA<br>M<br>SOFT-START (SS)<br>Soft Start Current ISS VSS = 0.5V 4.7 5 5.3 μA<br>CURRENT LIMIT<br>Peak Current-Limit<br>Threshold IPEAK-LIMIT 2.05 2.47 2.8 A<br>Runaway Current-Limit IRUNAWAY- 2.5 2.76 3.1 A<br>Threshold LIMIT<br>OUTPUT SPECIFICATIONS<br>FB Regulation Voltage VFB_REG 0.889 0.9 0.911 V<br>FB Input Bias Current IFB 0V ≤ VFB ≤ 1V, TA = +25°C -50 +50 nA<br>FB Undervoltage Trip<br>Level to Cause HICCUP VFB-HICF 0.56 0.58 0.65 V<br>HICCUP Timeout (Note 4) 32768 Cycles<br>RT/SYNC and Timings<br>RRT = OPEN 430 490 550<br>RRT = 51.1kΩ 370 400 430<br>Switching Frequency FSW kHz<br>RRT = 40.2kΩ 475 500 525<br>RRT = 8.06kΩ 1950 2200 2450<br>Synchronization<br>1.1 x 1.4 x<br>Frequency Capture Range FSW set by RRT FSW FSW<br>Synchronization Pulse<br>50 ns<br>Width<br>Synchronization VIH 2.1<br>V<br>Threshold VIL 0.8<br>Minimum On-Time tON_MIN 60 80 ns<br>Minimum Off-Time tOFF_MIN 140 150 160 ns<br>RESET<br>RESET Output Level<br>Low IRESET [= 10mA ] 400 mV<br>RESET Output Leakage<br>Current TA = TJ = +25°C, VRESET [= 5.5V ] -100 +100 nA<br>**----- End of picture text -----**<br>
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Electrical Characteristics (continued)**
(VIN = VEN/UVLO = 24V, RRT/SYNC = 40.2kΩ, CVCC = 2.2μF, VPGND = VSGND = VEXTVCC = 0, LX = SS = RESET = OUT = OPEN, VBST to VLX = 5V, VFB = 1V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted (Note3).)
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PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS<br>VRESET Assertion FB Threshold for VFB-OKF VFB falling 90.5 92 94.6 %<br>VRESET De-assertion FB Threshold for VFB-OKR VFB rising 93.8 95 97.8 %<br>RESET Delay after FB<br>Reaches 95% 1024 Cycles<br>Regulation<br>THERMAL SHUTDOWN<br>Thermal Shutdown<br>Threshold TSHDNR Temp rising 165 ºC<br>Thermal Shutdown<br>Hysteresis TSHDNHY 10 ºC<br>**----- End of picture text -----**<br>
**Note 2:** Electrical specifications are production tested at TA = +25°C. Specifications over the entire operating temperature range are guaranteed by design and characterization.
**Note 3:** See the _Overcurrent Protection / Hiccup Mode_ section for more details
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Typical Operating Characteristics**
(VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.)
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Typical Operating Characteristics (continued)**
(VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.)
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Typical Operating Characteristics (continued)**
(VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.)
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Typical Operating Characteristics (continued)**
(VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.)
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Typical Operating Characteristics (continued)**
(VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.)
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Typical Operating Characteristics (continued)**
(VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.)
## **Pin Configuration**
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TOP VIEW<br>—— ---<br>PGND 1 | \ 12 IN<br>_-_il J p-----7 LLL<br>—— / oo<br>LX _-t 2 | | | |— 11 EN/UVLO<br>| |<br>BST —--4 3 I | | r--I 10 RESET<br>_-_l | LLL<br>MAXM17572<br>EXTVCC ~~ 4 . | roo 9 SS<br>_-l | —<br>__, | | ---<br>OUT 5 | | 8 VCC<br>_-! | EP | —<br>Lo (SGND)<br>— ---<br>FB 6 | | 7 RT/SYNC<br>_-_il LLL<br>TDFN<br>3.5mm x 3.5mm<br>INDICATES PIN 1 OF THE MODULE<br>**----- End of picture text -----**<br>
## **Pin Description**
**PIN NAME FUNCTION** 1 PGND Power Ground Pin. Connect the PGND pin externally to the power ground plane.
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Pin Description (continued)**
**==> picture [504 x 306] intentionally omitted <==**
**----- Start of picture text -----**<br>
PIN NAME FUNCTION<br>2 LX Switching node of the inductor.<br>3 BST Bootstrap capacitor node.Connect a 0.1μF ceramic capacitor between BST and LX.<br>External Power Supply Input. Reduces the Internal-LDO Loss. Connect it to OUT when output<br>4 EXTVCC voltage is programmed between 5V to 12V. When EXTVCC is not used, connect it to SGND.<br>Module Output Pin. Connect a capacitor from OUT to PGND. See the PCB Layout Guidelines<br>5 OUT<br>section for more details.<br>Output Feedback Connection. Connect FB to a resistor-divider between OUT and SGND to set the<br>6 FB<br>output voltage.<br>Oscillator Timing Resistor Input. Connect a resistor from RT/SYNC to SGND to program the<br>switching frequency from 400kHz to 2.2MHz. Leave RT/SYNC open for the default 490 kHz<br>7 RT/SYNC frequency. An external pulse can be applied to RT/SYNC through a coupling capacitor to<br>synchronize the internal clock to the external pulse frequency. See the Setting the Switching<br>Frequency (RT) and External Frequency Synchronization (SYNC) sections for details.<br>8 VCC 5V LDO Output of the module. Bypass VCC with a 2.2μF ceramic capacitor to SGND.<br>9 SS Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time.<br>Open-Drain RESET Output. The RESET output is driven low if FB drops below 92% of its set<br>10 RESET<br>value. RESET goes high 1024 clock cycles after FB rises above 95% of its set value.<br>Enable/Under Voltage Lockout Input. Pull EN/UVLO to SGND to disable the module output.<br>11 EN/UVLO Connect EN/UVLO to IN for always-ON operation. Connect a resistor-divider between IN, EN/<br>UVLO, and SGND to program the input voltage at which the module turns on.<br>Power Supply Input. Decouple to PGND with a capacitor; place the capacitor close to IN and<br>12 IN<br>PGND pins.<br>Exposed Pad and Signal Ground (SGND). Connect a large copper plane below the module to<br>- EP improve heat dissipation capability. Add thermal vias below the exposed pad. Refer to the<br>MAXM17572 EV kit datasheet for a layout example.<br>**----- End of picture text -----**<br>
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Functional Block Diagrams**
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**----- Start of picture text -----**<br>
MAXM17572<br>VCC<br>EXTVCC<br>VCC LDO<br>IN<br>BST<br>EP<br>CURRENT<br>SENSE<br>SGND<br>HIGH SIDE<br>MOSFET DRIVER<br>EN/UVLO LX<br>1.215V<br>OUT<br>4.7µH<br>LOW SIDE<br>RT/SYNC OSCILLATOR<br>PEAK MOSFET DRIVER<br>CURRENT-MODE<br>CONTROLLER<br>THERMAL<br>SHUTDOWN<br>VCC PGND<br>HICCUP<br>SS<br>HICCUP<br>RESET<br>RESET<br>FB LOGIC<br>**----- End of picture text -----**<br>
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Detailed Description**
The MAXM17572 is a high-efficiency, synchronous, step-down DC-DC power module with integrated controller, MOSFETs, compensation components, and inductor that operates over a wide input-voltage range. The module operates from 4.5V to 60V input and delivers up to 1A output current over a programmable output voltage range of 0.9V to 12V. When EN/UVLO and the VCC threshold are ascertained to be higher than their respective rising threshold levels, an internal power-up sequence ramps up the error-amplifier reference, resulting in an output-voltage soft-start.
The FB pin monitors the output voltage through a resistor divider. The RESET pin transitions to a high-impedance state 1024 clock cycles after the output voltage reaches 95% of regulation. The module operates in pulse-width modulation (PWM) mode providing a constant frequency operation at all loads. The module features a RT/SYNC pin to program the switching frequency. A programmable soft-start feature allows users to reduce input inrush current. The module also incorporates an input enable/undervoltage lockout pin (EN/UVLO) that allows the user to turn on the module at the desired input-voltage level.
The module employs a peak-current-mode control architecture. An internal error amplifier compares the feedback voltage to a fixed reference voltage and generates an error voltage. The error voltage is compared to the sum of the currentsense voltage and slope-compensation voltage by a PWM comparator to set the on-time. At each rising edge of the clock, the high-side MOSFET turns on and remains on until either the appropriate or maximum duty cycle is reached, or the peak current limit is detected. During the high-side MOSFET’s on-time, the internal inductor current ramps up. During the rest of the switching cycle, the high-side MOSFET turns off and the low-side MOSFET turns on. The inductor in the module releases the stored energy as its current ramps down and provides current to the output.
## **Linear Regulator (VCC, EXTVCC)**
The module has two internal low-dropout regulators (LDOs) that power VCC. One LDO is powered from IN and the other LDO is powered from EXTVCC. Only one of the two LDOs is in operation at a time, depending on the voltage levels present at EXTVCC. If EXTVCC voltage is greater than 4.7V (typ), VCC is powered from EXTVCC. If EXTVCC is lower than 4.7V (typ), VCC is powered from IN. Powering VCC from EXTVCC increases efficiency at higher input voltages. EXTVCC voltage should not exceed (VIN + 0.3) and 26V.
Typical VCC output voltage is 5V. Bypass VCC to SGND with a 2.2μF low-ESR ceramic capacitor. VCC powers the internal blocks and the low-side MOSFET driver, and recharges the external bootstrap capacitor. The MAXM17572 employs an undervoltage-lockout circuit that forces both the regulators off when VCC falls below 3.8V (typ). The regulators can be immediately enabled again when VCC is higher than 4.2V (typ). The 400mV UVLO hysteresis prevents chattering on power-up/power-down.
In applications where the buck converter output is connected to the EXTVCC pin, if the output is shorted to ground, then transfer from EXTVCC LDO to the internal LDO happens seamlessly without any impact on the normal functionality.
## **Enable/Undervoltage Lockout (EN/UVLO), Soft-Start (SS)**
When EN/UVLO voltage is above 1.215V (typ), the internal error-amplifier reference voltage of the module starts to ramp up. The duration of the soft-start ramp is programmable through the choice of an external capacitor put at the SS pin, allowing a smooth increase of the output voltage. Driving EN/UVLO low disables both power MOSFETs as well as other internal circuitry and reduces IN shutdown current to below 4.7μA (typ). EN/UVLO can be used as an input-voltage UVLO adjustment input. An external voltage-divider between IN and EN/UVLO to SGND adjusts the input voltage at which the module turns on or turns off. If input UVLO programming is not desired, connect EN/UVLO to IN (see the _Electrical Characteristics_ table for EN/UVLO rising and falling threshold voltages).
## **External Frequency Synchronization (SYNC)**
The internal oscillator of the MAXM17572 can be synchronized to an external clock signal through the RT/ SYNC pin. The external clock should be coupled to the RT/SYNC pin using the circuit as shown in Figure 1. The external synchronization clock frequency must be between 1.1 × FSW and 1.4 × FSW, where FSW is the frequency programmed by the RT resistor (RRT). A resistor must be connected from the RT/SYNC pin to GND to be able to synchronize the MAXM17572 to an external clock. When an external clock is applied to the RT/SYNC pin, the internal oscillator frequency changes to the external clock frequency (from the original frequency based on the RT setting) after detecting 16 external clock edges. The minimum external clock high pulse width and amplitude should be greater than 50ns and 2.1V, respectively. The
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
maximum external clock low pulse amplitude should be less than 0.8V.
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**----- Start of picture text -----**<br>
MAXM17572<br>RT/SYNC<br>RRT<br>33.2kΩ C2<br>47pF<br>C1<br>100pF<br>CLOCK<br>SOURCE R1 D1<br>1kΩ<br>Vlogic_high<br>Vlogic_low<br>**----- End of picture text -----**<br>
_Figure 1. External Clock Synchronization_
## **RESET Output**
The module includes a RESET pin to monitor the output voltage. The open-drain RESET output requires an external pull-up resistor. RESET goes high impedance 1024 switching cycles after the regulator output increases above 95% of the designed nominal regulated voltage. RESET goes low when the regulator output voltage drops below 92% of the nominal regulated voltage. RESET also goes low during thermal shutdown.
## **Startup into Prebiased Output**
The module is capable of soft-start into a prebiased output, without discharging the output capacitor. Such a feature is useful in applications where digital integrated circuits with multiple rails are powered.
## **Overcurrent Protection/Hiccup Mode**
The module is provided with a robust overcurrent protection (OCP) scheme that protects the module under overload and output short-circuit conditions. A cycle-by-cycle peak current limit turns off the high-side MOSFET whenever the highside switch current exceeds an internal limit of IPEAK-LIMIT (2.47A typ). A runaway current limit on the high-side switch current at the IRUNAWAY-LIMIT (2.76A typ) protects the device under high input voltage and output short circuit conditions when there is insufficient output voltage available to restore the module current that was built up during the on period of the module. One occurrence of the runaway current limit triggers hiccup mode. In addition, hiccup mode is activated if the feedback voltage drops below 64.5% of the nominal value any time after soft-start is completed due to any fault. In hiccup mode, the module is protected by suspending switching for a hiccup timeout period of 32,768 clock cycles of half the switching frequency. Once the hiccup timeout period expires, soft-start is attempted again. Note that when soft-start is attempted under overload condition, if feedback voltage does not exceed 64.5% of the nominal value, the modules continue to switch at half the programmed switching frequency for the time duration of the programmed soft-start time and 1024 clock cycles. Hiccup mode of operation ensures low power dissipation under output short-circuit conditions.
The MAXM17572 is designed to support a maximum load current of 1A. The inductor ripple current is calculated as follows:
**==> picture [214 x 23] intentionally omitted <==**
Where
VOUT = Steady state output voltage
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
VIN = Operating input voltage
FSW = Switching Frequency in Hz
L = Power module output inductance (4.7µH ±20%)
IOUT = Required output (load) current
The following condition should be satisfied at the desired load current, IOUT: _I_ OUT +[∆] 2 _[I]_[< 2.05]
## **Thermal Overload Protection**
Thermal overload protection limits the total power dissipation in the module. When the junction temperature exceeds +165°C, an on-chip thermal sensor shuts down the module and turns off the internal power MOSFETs, allowing the module to cool down. The thermal sensor turns the module on after the junction temperature cools by 10°C.
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Applications Information**
## **Operating Input Voltage Range**
The minimum and maximum operating input voltages for a given output voltage should be calculated as follows:
**==> picture [79 x 10] intentionally omitted <==**
_V_ IN(MIN) = ( _I_ OUT × 0.3) + 1 −( _F_ SW(MAX) × _t_ OFF_MIN(MAX))
_V_ OUT _V_ IN(MAX) = _F_ SW(MAX) × _t_ ON_MIN(MAX)
Where
VOUT = Steady-state output voltage
IOUT = Maximum load current
FSW(MAX) = Worst-case switching frequency in Hz
tOFF_MIN(MAX) = Worst case minimum OFF time (160ns)
tON_MIN(MAX) = Worst case minimum ON time (80ns)
5.80 × 10[−3 ] × _F_ SW For D > 0.5, _V_ IN(MIN) = 3.09 × _V_ OUT + 1.66 × _I_ OUT − 500
Where FSW = Switching frequency in Hz
## **Selection of Input Capacitor**
The input capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the switching of the module. The input capacitor RMS current requirement (IRMS) is defined by the following equation:
_V_ OUT × ( _V_ IN − _V_ OUT) _I_ RMS = _I_ OUT(MAX) ×[√] _V_ IN
Where IOUT(MAX) is the maximum load current. IRMS has a maximum value when the input voltage equals twice the output voltage (VIN = 2 x VOUT), so:
**==> picture [98 x 19] intentionally omitted <==**
Choose an input capacitor that exhibits less than +10°C temperature rise at the RMS input current for optimal longterm reliability. Use low-ESR ceramic capacitors with high-ripple-current capability at the input. X7R capacitors are recommended in industrial applications for their temperature stability. Calculate the input capacitance using the following equation:
_I D_ × 1 − _D_ OUT(MAX) × ( ) _C_ IN = η × ∆ _V_ IN × _F_ SW
## Where
D is the operating duty cycle of the converter
∆VIN is the allowable input voltage ripple
FSW is the operating switching frequency in Hz
η is the efficiency of the converter
In applications where the source is located away and distant from the device input, an appropriate electrolytic capacitor should be added to provide necessary damping of potential oscillations caused by the inductance of the input power path and input ceramic capacitor.
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Selection of Output Capacitor**
X7R ceramic output capacitors are preferred due to their stability over temperature in industrial applications. The minimum recommended output capacitor values are listed in Table 1 for desired output voltages to support a dynamic step load of 50% of the maximum output current and to contain the output-voltage deviation to 3% of the output voltage. For additional adjustable output voltages and dynamic step load, the required output capacitance can be calculated from the following equation:
_I_ × _t_ STEP RESPONSE _C_ OUT = 2 × ∆ _V_ OUT
_t_ RESPONSE ≈[0.33] _fC_
Where
COUT is the required output capacitance
∆VOUT is the allowable output voltage deviation
ISTEP is the load current step
tRESPONSE is the response time of the controller
Select fC to be 1/9th of fSW if the switching frequency is less than or equal to 495kHz. If the switching frequency is more than 495kHz, select fC to be 55kHz. Derating of ceramic capacitors with DC-voltage at appropriate AC voltage (equal to the steady-state output voltage ripple) must be considered when selecting the output capacitor. Derating curves are available from all major ceramic capacitor manufacturers.
## **Selection of Soft-Start Capacitor**
The module implements an adjustable soft-start operation to reduce inrush current during startup. A capacitor (CSS) connected from the SS pin to SGND to program the soft-start time. The selected output capacitance (CSEL) and the output voltage (VOUT) determine the minimum value of CSS, as shown by the following equation: _C_ SS ≥56 × 10[−6] × _C_ SEL × _V_ OUT
The soft-start time (tSS) is related to the capacitor connected at SS (CSS) by the following equation:
_C_ SS _t_ SS = 5.55 × 10[−6]
For example, to program a 1ms soft-start time, a 5.6nF capacitor should be connected from the SS pin to SGND. Note that during start-up, the module operates at half the programmed switching frequency until the output voltage reaches 66.7% of set output nominal voltage.
## **Setting the Input Undervoltage-Lockout Level**
The module offers an adjustable input undervoltage-lockout level. Set the voltage at which the module turns on with a resistive voltage-divider connected from IN to SGND (see Figure 2). Connect the center node of the divider to EN/UVLO. Choose R1 to be 3.3MΩ (max) and then calculate R2 as follows:
**==> picture [71 x 23] intentionally omitted <==**
where VINU is the voltage at which the module is required to turn on. See Table 1 to set the proper VINU voltage greater than or equal to the minimum input voltage for each desired output voltage.
If the EN/UVLO pin is driven from an external signal source, it is recommended to place a series resistance of 1kΩ minimum between the signal source output and the EN/UVLO pin to reduce voltage ringing on the line.
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
**==> picture [504 x 153] intentionally omitted <==**
**----- Start of picture text -----**<br>
IN<br>R1<br>EN/UVLO<br>R2<br>SGND<br>**----- End of picture text -----**<br>
_Figure 2. Setting the Input Undervoltage Lockout_
## **Setting the Output Voltage**
Set the output voltage with resistive voltage-divider connected from the positive terminal of the output capacitor (VOUT) to SGND (see Figure 3). Connect the center node of the divider to the FB pin. Use the following procedure to choose the resistive voltage-divider values:
Calculate resistor RU from the output to the FB pin using the equation below:
85 _RU_ = _fC_ × _C_ OUT
Where
COUT (in F) is the actual derated value of the output capacitance used
RU is in kΩ
The minimum allowable value of RU (in kΩ) is (5.6×VOUT). If the value of RU calculated using the previous equation is less than (5.6×VOUT), increase the value of RU to at least (5.6×VOUT).
Use the following equation to calculate the RB:
_R_ × 0.9 _U RB_ = _V_ OUT −0.9
Where RB is in kΩ.
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OUT<br>RU<br>FB<br>RB<br>SGND<br>**----- End of picture text -----**<br>
_Figure 3. Adjusting Output Voltage_
## **Setting the Switching Frequency (RT)**
The switching frequency of the module can be programmed from 400kHz to 2.2MHz by using a resistor connected from
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
the RT/SYNC pin to SGND. The switching frequency (FSW) is related to the resistor (RRT) connected at the RT/SYNC pin by the following equation:
**==> picture [84 x 24] intentionally omitted <==**
where RRT is in kΩ and FSW is in Hz. Leave the RT/SYNC pin open to operate at the default switching frequency of 490kHz. See Table 1 for RRT resistor values for a few common switching frequencies.
**Table 1. Switching Frequency vs. RT Resistor**
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SWITCHING FREQUENCY (kHz) RT RESISTOR (kΩ)<br>400 51.1<br>490 OPEN<br>1000 19.1<br>2200 8.06<br>**----- End of picture text -----**<br>
## **Selection of Component Values**
## **Table 2. Selection of Component Values**
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**----- Start of picture text -----**<br>
VIN(MIN) (V) VIN(MAX) (V) V(V) OUT CIN COUT RU (kΩ) RB (kΩ) (kHz) FSW (kΩRRT )<br> 2 x 47μF/6.3V, 1210<br>1 x 10μF/50V, 1206<br>4.5 26 0.9 27.4 OPEN 400 51.1<br>TDK C3216X7R1H106K Murata GRM32ER70J476K<br>1 x 10μF/50V, 1206 2 x 47μF/6.3V, 1210<br>4.5 29 1 28 249 400 51.1<br>TDK C3216X7R1H106K Murata GRM32ER70J476K<br>1 x 10μF/50V, 1206 2 x 47μF/6.3V, 1210<br>4.5 31 1.2 28 84.5 450 45.3<br>TDK C3216X7R1H106K Murata GRM32ER70J476K<br>1 x 47μF/6.3V, 1210<br>1 x 10μF/50V, 1206<br>4.5 34 1.5 60.4 90.9 490 OPEN<br>TDK C3216X7R1H106K Murata GRM32ER70J476K<br>1 x 10μF/50V, 1206 1 x 47μF/6.3V, 1210<br>4.5 40 1.8 54.9 54.9 490 OPEN<br>TDK C3216X7R1H106K Murata GRM32ER70J476K<br>1 x 4.7μF/100V, 1206 1 x 47μF/6.3V, 1210<br>4.5 48 2.5 56.2 31.6 600 33.2<br>Murata GRM31CZ72A475K Murata GRM32ER70J476K<br>1 x 4.7μF/100V, 1206 1 x 22μF/25V, 1210<br>5 60 3.3 110 41.2 600 33.2<br>Murata GRM31CZ72A475K Murata GRM32ER71E226K<br>1 x 4.7μF/100V, 1206 1 x 22μF/25V, 1210<br>7 60 5 118 25.5 900 21.5<br>Murata GRM31CZ72A475K Murata GRM32ER71E226K<br>1 x 1μF/100V, 1206 1 x 10μF/16V, 1206<br>12 60 8 309 39.2 1500 12.4<br>AVX 12061C105KAT2A Murata GCM31CR71C106K<br>1 x 1μF/100V, 1206 1 x 10μF/16V, 1206<br>21 60 12 392 31.6 2200 8.06<br>AVX 12061C105KAT2A Murata GCM31CR71C106K<br>**----- End of picture text -----**<br>
## **Power Dissipation and Output-Current Derating**
The power dissipation inside the module leads to an increase in the junction temperature of the MAXM17572. The power loss inside the module at full load can be estimated as follows:
_P_ LOSS = _P_ OUT × [[1] η[−1]]
_P_ OUT = _V_ OUT × _I_ OUT
Where
POUT is the output power of the module
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
η is the efficiency of the power module at the desired operating conditions
See the _Typical Operating Characteristics_ for the power-conversion efficiency or measure the efficiency to determine the total power dissipation. An EE-Sim model is available for the MAXM17572 to simulate efficiency and power loss for the desired operating conditions. The junction temperature (TJ) of the module can be estimated at any given maximum ambient temperature (TA) from the following equation:
_TJ_ = _TA_ + [θJA × _P_ LOSS]
Where θJA is the junction to ambient thermal resistance. For the MAXM17572 evaluation board, the thermal resistance from junction-to-ambient (θJA) is 42°C/W. Operating the module at junction temperatures greater than +125°C degrades operating lifetimes.
## **PCB Layout Guidelines**
Careful PCB layout is critical to achieve low switching losses and stable operation. Use the following guidelines for good PCB layout:
- Keep the input capacitors as close as possible to the IN and PGND pins
- Keep the output capacitors as close as possible to the OUT and PGND pins
- Keep the resistive feedback divider as close as possible to the FB pin
- Connect all of the PGND connections to a copper plane area as large as possible on the bottom layer
- Connect EP to SGND plane on bottom layer
- Use multiple vias to connect internal PGND planes to the top layer PGND plane
- Do not keep any solder mask on EP on bottom layer. Keeping solder mask on exposed pads decreases the heat dissipating capability
- Refer to the MAXM17572 EV kit layout for first pass success
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
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**----- Start of picture text -----**<br>
VIN<br>IN BST<br>C1 R1 C4<br>LX<br>EN/UVLO<br>VOUT<br>R2 OUT<br>VCC C6<br>C2 EXTVCC R4<br>MAXM17572 C5<br>R5<br>RT/SYNC<br>R3 FB<br>R6<br>SS RESET<br>C3<br>PGND EP<br>GND PLANE C1 IN PLANE<br>PGND 1 12 IN<br>R1<br>LX 2 11 EN/UVLO<br>C4 R2<br>BST 3 10 RESET<br>C5 EP C3<br>EXTVCC 4 9 SS<br>C6 R4 C2<br>OUT 5 8 VCC<br>FB 6 7 RT/SYNC<br>OUT PLANE<br>R5 R6 R3<br>**----- End of picture text -----**<br>
_Figure 4. Layout Guidelines_
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Typical Application Circuits**
## **5V Output Typical Application Circuit**
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**----- Start of picture text -----**<br>
VIN (7V to 60V)<br>IN BST<br>C1 R1 C4<br>4.7µF 3.3MΩ 0.1µF<br>LX<br>EN/UVLO<br>R2<br>732kΩ 5V, 1A<br>OUT<br>C6<br>R6 22µF<br>4.7Ω<br>VCC EXTVCC<br>C2<br>C5<br>2.2µF<br>MAXM17572 0.1µF R3<br>118kΩ<br>RT/SYNC<br>R5<br>FB<br>21.5kΩ<br>R4<br>25.5kΩ<br>SS RESET<br>C3<br>5600pF<br>PGND EP C1 = 4.7µF/100V/1206/Murata GRM31CZ72A475K<br>C2 = 2.2µF/10V/0603/Murata GRM188R71A225K<br>C4 = 0.1µF/25V/0402/Murata GRM155R71E104K<br>C6 = 22µF/25V/1210/Murata GRM32ER71E226K<br>FSW : 900kHz<br>**----- End of picture text -----**<br>
## **3.3V Output Typical Application Circuit**
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**----- Start of picture text -----**<br>
VIN (5V to 60V)<br>IN<br>C1 R1 BST<br>4.7µF 3.3MΩ C4<br>0.1µF<br>LX<br>R2<br>1.1MΩ EN/UVLO<br>3.3V,1A<br>OUT<br>C5<br>C2 VCC EXTVCC 22µF R2<br>2.2µF MAXM17572 110kΩ<br>RT/SYNC FB<br>R5<br>33.2kΩ R3<br>RESET<br>41.2kΩ<br>SS<br>C3 PGND EP<br>C1 = 4.7µF/100V/1206/Murata GRM31CZ72A475K<br>5600pF<br>C2 = 2.2µF/10V/0603/Murata GRM188R71A225K<br>C4 = 0.1µF/25V/0402/Murata GRM155R71E104K<br>C5 = 22µF/25V/1210/Murata GRM32ER71E226K<br>FSW : 600kHz<br>**----- End of picture text -----**<br>
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
## **Ordering Information**
**==> picture [450 x 43] intentionally omitted <==**
**----- Start of picture text -----**<br>
PART NUMBER TEMP RANGE PIN PACKAGE<br>MAXM17572AMC+ -40°C to +125°C 12-pin 3.5mm x 3.5mm x 2.3mm uSLIC Package<br>MAXM17572AMC+T -40°C to +125°C 12-pin 3.5mm x 3.5mm x 2.3mm uSLIC Package<br>**----- End of picture text -----**<br>
_+Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel._
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## MAXM17572
## 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module
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Analog Devices | 28
Updated at April 10, 2026
Since its inception in 1965, Analog Devices has established itself as a global leader in the design and manufacturing of high-performance analog, mixed-signal, and digital signal processing (DSP) integrated circuits. The company is renowned for solving complex engineering challenges by providing critical technologies that seamlessly convert real-world phenomena into precise electrical signals for the industrial, automotive, communications, and consumer markets. Within its extensive portfolio, Analog Devices provides highly reliable clock, timing, and frequency management solutions, featuring a comprehensive array of precision timers, oscillators, and pulse generators. Complementing this core lineup is a robust offering of driver and interface ICs, particularly high-performance I/O expanders that enable seamless connectivity and streamline complex electronic system architectures. Beyond these foundational integrated circuits, Analog Devices leads the industry in sensor innovation, delivering advanced MEMS accelerometers and integrated MEMS modules designed for exceptional precision in motion sensing. To support complete hardware designs, the company's specialized offerings also encompass discrete bipolar transistors, sub-2.4GHz RF transceivers, temperature-compensated oscillators, and dedicated power management components such as DC/DC converters and LED driver ICs.
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