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MAT14ARZ
Bipolar Transistor Array, Quad NPN, 40 V, 30 mA
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- Manufacturer: ANALOG DEVICES
- Product type: Bipolar Junction Transistor Arrays - BJT
- MSL: MSL 1 - Unlimited
- SVHC: No SVHC (25-Jun-2025)
- No. of Pins: 14Pins
- Product Range: -
- Qualification: -
- Transistor Mounting: Surface Mount
- Transistor Polarity: Quad NPN
- Power Dissipation NPN: -
- Power Dissipation PNP: -
- Transistor Case Style: SOIC
- Transition Frequency NPN: 300MHz
- Transition Frequency PNP: -
- Operating Temperature Max: 85°C
- DC Current Gain hFE Min NPN: 300hFE
- DC Current Gain hFE Min PNP: -
- Continuous Collector Current NPN: 30mA
- Continuous Collector Current PNP: -
- Collector Emitter Voltage Max NPN: 40V
- Collector Emitter Voltage Max PNP: -
| Delivery and price | |
|---|---|
| Units per pack | 504 |
| Price | 8.48 € |
| Current stock | 25+ |
| Lead time | 7 days |
Datasheet
**==> picture [159 x 45] intentionally omitted <==** ## **Matched Monolithic Quad Transistor MAT14** ## **FEATURES** **Low offset voltage: 400 µV maximum High current gain: 300 minimum Excellent current gain match: 4% maximum Low voltage noise density at 100 Hz, 1 mA 3 nV/** √ **Hz maximum** **Excellent log conformance Bulk resistance (rBE) = 0.6 Ω maximum Guaranteed matching for all transistors** ## **PIN CONFIGURATION** **==> picture [99 x 92] intentionally omitted <==** **----- Start of picture text -----**<br> C1 1 14 C4<br>B1 2 13 B4<br>E1 3 MAT14 12 E4<br>SUB 4 TOP VIEW 11 SUB<br>E2 5 (Not to Scale) 10 E3<br>B2 6 9 B3<br>C2 7 8 C3<br>Figure 1.<br>09045-001<br>**----- End of picture text -----**<br> ## **APPLICATIONS** **Low noise op amp front end Current mirror and current sink/source Low noise instrumentation amplifiers Voltage controlled attenuators Log amplifiers** ## **GENERAL DESCRIPTION** The MAT14 is a quad monolithic NPN transistor that offers excellent parametric matching for precision amplifier and nonlinear circuit applications. Performance characteristics of the MAT14 include high gain (300 minimum) over a wide range of collector current, low noise (3 nV/ √ Hz maximum at 100 Hz, IC = 1 mA), and excellent logarithmic conformance. The MAT14 also features a low offset voltage of 100 µV typical and tight current gain matching to within 4%. Each transistor of the MAT14 is individually tested to data sheet specifications. For matching parameters (offset voltage, input offset current, and gain match), each of the dual transistor combinations are verified to meet stated limits. Device performance is guaranteed at an ambient temperature of 25°C and over the industrial temperature range. The long-term stability of matching parameters is guaranteed by the protection diodes across the base emitter junction of each transistor. These diodes prevent degradation of beta and matching characteristics due to reverse bias, base emitter current. The superior logarithmic conformance and accurate matching characteristics of the MAT14 make it an excellent choice for use in log and antilog circuits. The MAT14 is an ideal choice in applications where low noise and high gain are required. **Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.** **One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved.** ## **MAT14* Product Page Quick Links** Last Content Update: 11/01/2016 ## Comparable Parts View a parametric search of comparable parts ## Discussions View all MAT14 EngineerZone Discussions ## Documentation ## **Data Sheet** ## Sample and Buy Visit the product page to see pricing options - MAT14: Matched Monolithic Quad Transistor Data Sheet ## Technical Support ## Design Resources - MAT14 Material Declaration Submit a technical question or find your regional support number - PCN-PDN Information - Quality And Reliability - Symbols and Footprints * This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page does not constitute a change to the revision number of the product data sheet. This content may be frequently modified. ## **MAT14** ## **TABLE OF CONTENTS** Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configuration ............................................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Electrical Characteristics ............................................................. 3 Absolute Maximum Ratings ............................................................ 4 Thermal Resistance .......................................................................4 ESD Caution...................................................................................4 Typical Performance Characteristics ..............................................5 Theory of Operation .........................................................................8 Applications Information .............................................................8 Outline Dimensions ..........................................................................9 Ordering Guide .............................................................................9 ## **REVISION HISTORY** ## **12/10—Rev. 0 to Rev. A** Changes to General Description .................................................... 1 Changes to Operating Temperature Range in Table 2 ................. 4 Updated Outline Dimensions ......................................................... 9 Changes to Ordering Guide ............................................................ 9 **10/10—Revision 0: Initial Version** Rev. A | Page 2 of 12 **MAT14** ## **SPECIFICATIONS** ## **ELECTRICAL CHARACTERISTICS** TA = 25°C, unless otherwise specified. **Table 1.** |**Table 1.**||||| |---|---|---|---|---| |**Parameter**|**Symbol**|**Test Conditions/Comments**|**Min**<br>**Typ**<br>**Max**|**Unit**| |DC AND AC CHARACTERISTICS<br>Current Gain<br>Current Gain Match<br>Noise Voltage Density<br>Offset Voltage<br>Offset Voltage Change vs. VCBChange<br>Offset Voltage Change vs. ICChange<br>Offset Voltage Drift<br>Breakdown Voltage<br>Gain-Bandwidth Product<br>Collector Leakage Current<br>Base<br>Substrate<br>Emitter<br>Input Current<br>Bias<br>Offset<br>Offset Drift<br>Collector Saturation Voltage<br>Output Capacitance<br>Bulk Resistance<br>Input Capacitance|hFE<br>ΔhFE<br>eN<br>VOS<br>ΔVOS/ΔVCB<br>ΔVOS/ΔIC<br>ΔVOS/ΔT<br>BVCEO<br>fT<br>ICBO<br>ICS<br>ICES<br>IB<br>IOS<br>ΔIOS/ΔT<br>VCE(SAT)<br>COBO<br>rBE<br>CEBO|10 µA ≤ IC≤ 1 mA<br>0 V ≤ VCB≤ 30 V1<br>−40°C ≤ TA≤ +85°C<br>IC= 100 µA2<br>0 V ≤ VCB≤ 30 V<br>IC= 1 mA, VCB= 03<br>fO= 10 Hz<br>fO= 100 Hz<br>fO= 1 kHz<br>10 µA ≤ IC≤ 1 mA4<br>0 V ≤ VCB≤ 30 V<br>−40°C ≤ TA≤ +85°C<br>0 V ≤ VCB≤ 30 V4<br>10 µA ≤ IC≤ 1 mA<br>10 µA ≤ IC≤ 1 mA4, VCB= 0 V<br>−40°C ≤ TA≤ +85°C<br>IC= 100 µA, VCB= 0 V<br>IC= 10 µA<br>−40°C ≤ TA≤ +85°C<br>IC= 1 mA, VCE= 10 V<br>VCB= 40 V<br>−40°C ≤TA≤ +85°C<br>VCS= 40 V<br>−40°C ≤ TA≤ +85°C<br>VCE= 40 V<br>−40°C ≤ TA≤ +85°C<br>IC= 100 µA, 0 V ≤ VCB≤ 30 V<br>−40°C ≤ TA≤ +85°C<br>IC= 100 µA, VCB= 0 V<br>−40°C ≤ TA≤ +85°C<br>IC= 100 µA<br>−40°C ≤ TA≤ +85°C<br>IC= 1 mA, IB= 100 µA<br>VCB= 15 V, IE<br>5= 0, f = 1 MHz<br>10 µA ≤ IC≤ 10 mA,VCB= 0 V6<br>VCB= 15 V, IE= 0, f = 1 MHz|300<br>600<br>200<br>500<br>1<br>4<br>2<br>4<br>1.8<br>3<br>1.8<br>3<br>100<br>400<br>120<br>520<br>100<br>200<br>10<br>50<br>0.4<br>2<br>40<br>40<br>300<br>5<br>0.5<br>0.5<br>0.7<br>3<br>5<br>165<br>330<br>200<br>500<br>2<br>13<br>8<br>40<br>100<br>0.03<br>0.06<br>10<br>0.4<br>0.6<br>40|%<br>nV/√Hz<br>nV/√Hz<br>nV/√Hz<br>µV<br>μV<br>µV<br>µV<br>µV/°C<br>V<br>V<br>MHz<br>pA<br>nA<br>nA<br>nA<br>nA<br>nA<br>nA<br>nA<br>nA<br>nA<br>pA/°C<br>V<br>pF<br>Ω<br>pF| 1 Current gain measured at IC = 10 µA, 100 µA, and 1 mA. 2 Current gain match (ΔhFE) defined as: ΔhFE = (100(ΔIB)(hFE min)/IC). 3 Sample tested. 4 Measured at IC = 10 µA and guaranteed by design over the specified range of IC. 5 See Table 2 for the emitter current rating. 6 Guaranteed by design. Rev. A | Page 3 of 12 ## **MAT14** ## **ABSOLUTE MAXIMUM RATINGS** ## **THERMAL RESISTANCE** ## **Table 2.** |**Table 2.**|| |---|---| |**Parameter**|**Rating**| |Voltage<br>Collector-to-Base Voltage (BVCBO)<br>Collector-to-Emitter Voltage (BVCEO)<br>Collector-to-Collector Voltage (BVCC)<br>Emitter-to-Emitter Voltage (BVEE)<br>Current<br>Collector Current (IC)<br>Emitter Current (IE)<br>Temperature<br>Storage Temperature Range<br>Operating Temperature Range<br>Junction Temperature Range|40 V<br>40 V<br>40 V<br>40 V<br>30 mA<br>30 mA<br>−65°C to +150°C<br>−40°C to +85°C<br>−65°C to +150°C| θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. ## **Table 3. Thermal Resistance** |**Table 3. Thermal Resistance**|||| |---|---|---|---| |**Package Type **|**θJA**|**θJC**|**Unit**| |14-Lead SOIC|115|36|°C/W| ## **ESD CAUTION** **==> picture [242 x 62] intentionally omitted <==** Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 4 of 12 **MAT14** ## **TYPICAL PERFORMANCE CHARACTERISTICS** **==> picture [214 x 167] intentionally omitted <==** **----- Start of picture text -----**<br> 700<br>680<br>660<br>640<br>620<br>600 TA = 125°C<br>580<br>560<br>540 TA = 85°C<br>520<br>500<br>480<br>460 TA = 25°C<br>440<br>420<br>400<br>380<br>360<br>340<br>320<br>300<br>0.001 0.01 0.1 1<br>COLLECTOR CURRENT (mA)<br>CURRENT GAIN (β)<br>09045-002<br>**----- End of picture text -----**<br> _Figure 2. Current Gain vs. Collector Current_ **==> picture [214 x 362] intentionally omitted <==** **----- Start of picture text -----**<br> 700<br>680<br>660<br>640<br>620<br>600<br>580 VCB = 20V<br>560<br>540<br>520<br>500 VCB = 0V<br>480<br>460<br>440<br>420<br>400<br>380<br>360<br>340<br>320<br>300<br>–50 –25 0 25 50 75 100 125 150<br>TEMPERATURE (°C)<br>Figure 3. Current Gain vs. Temperature<br>3.0<br>2.5<br>2.0<br>1.5<br>1.0<br>NOISE = 100Hz<br>0.5<br>NOISE = 10Hz<br>0<br>0 2 4 6 8 10 12<br>COLLECTOR CURRENT (IC)<br>CURRENT GAIN (β)<br>09045-003<br>VOLTAGE NOISE DENSITY (nV/srtHz)<br>09045-004<br>**----- End of picture text -----**<br> _Figure 4. Voltage Noise Density vs. Collector Current_ **==> picture [222 x 562] intentionally omitted <==** **----- Start of picture text -----**<br> 0.70<br>0.65<br>0.60<br>0.55<br>0.50<br>0.45<br>0.40<br>0.35<br>0.30<br>0.001 0.01 0.1 1 10<br> COLLECTOR CURRENT (mA)<br>Figure 5. Base Emitter-On-Voltage vs. Collector Current<br>100<br>10<br>1<br>0.1<br>0.01<br>0.001<br>0.001 0.01 0.1 1 10<br> COLLECTOR CURRENT (mA)<br>Figure 6. Small Signal Input Resistance vs. Collector Current<br>1m<br>0.1m<br>0.01m<br>1µ<br>0.1µ<br>0.01µ<br>1µ 0.01m 0.1m 1m 0.01 0.1 1<br>COLLECTOR CURRENT (A)<br>BASE EMITTER-ON-VOLTAGE (V)<br>09045-005<br>ANCE (MΩ)<br>INPUT RESIST<br>09045-006<br>( )<br>CONDUCTANCE<br>09045-007<br>**----- End of picture text -----**<br> _Figure 7. Small Signal Output Conductance vs. Collector Current_ Rev. A | Page 5 of 12 **MAT14** **==> picture [215 x 168] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>1<br>T A = 125°C<br>0.1<br>T A = 85°C<br>TA = 25°C<br>0.01<br>0.01 0.1 1 10 100<br> COLLECTOR CURRENT (mA)<br>SATURATION VOLTAGE (V)<br>09045-008<br>**----- End of picture text -----**<br> _Figure 8. Saturation Voltage vs. Collector Current_ **==> picture [215 x 169] intentionally omitted <==** **----- Start of picture text -----**<br> 100<br>10µA<br>10<br>1mA<br>1<br>1 10 100 1k 10k<br>FREQUENCY (Hz)<br>√Hz)<br>NOISE DENSITY (nV<br>09045-009<br>**----- End of picture text -----**<br> _Figure 9. Noise Voltage Density vs. Frequency_ **==> picture [216 x 367] intentionally omitted <==** **----- Start of picture text -----**<br> 200<br>160<br>120<br>100kΩ<br>80<br>10kΩ<br>40<br>1kΩ<br>0<br>0.001 0.01 0.1 1<br>COLLECTOR CURRENT (mA)<br>Figure 10. Total Noise vs. Collector Current<br>20<br>18<br>16<br>14<br>12<br>10<br>8<br>6<br>4<br>2<br>0<br>0 1 2 3 4 5 6 7 8 9 10<br>COLLECTOR-TO-BASE VOLTAGE (V)<br>√Hz)<br>TOTAL NOISE (nV/<br>09045-010<br>COLLECTOR-TO-BASE CAPACITANCE (pF)<br>09045-011<br>**----- End of picture text -----**<br> _Figure 11. Collector-to-Base Capacitance vs. Collector-to-Base Voltage_ Rev. A | Page 6 of 12 **MAT14** **==> picture [218 x 369] intentionally omitted <==** **----- Start of picture text -----**<br> 40<br>35<br>30<br>25<br>20<br>15<br>10<br>5<br>0<br>0 1 2 3 4 5 6 7 8 9 10<br>COLLECTOR-TO-SUBSTRATE VOLTAGE (V)<br>Figure 12. Collector-to-Substrate Capacitance vs.<br>Collector-to-Substrate Voltage<br>10<br>1<br>0.1<br>0.01<br>0.001<br>25 50 75 100 125<br>TEMPERATURE (°C)<br>COLLECTOR-TO-SUBSTRATE CAPACITANCE (pF)<br>09045-012<br> CURRENT (nA)<br>ICBO<br>09045-013<br>**----- End of picture text -----**<br> **==> picture [218 x 167] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>1<br>0.1<br>0.01<br>0.001<br>25 50 75 100 125<br>TEMPERATURE (°C)<br> CURRENT (nA)<br>ICC<br>09045-014<br>**----- End of picture text -----**<br> _Figure 14. Collector-to-Collector Leakage vs. Temperature_ _Figure 13. Collector-to-Base Leakage vs. Temperature_ Rev. A | Page 7 of 12 ## **MAT14** ## **THEORY OF OPERATION APPLICATIONS INFORMATION** To minimize coupling between devices, tie one of the substrate pins (Pin 4 or Pin 11) to the most negative circuit potential. Note that Pin 4 and Pin 11 are internally connected. ## _**Applications Current Sources**_ MAT14 can be used to implement a variety of high impedance current mirrors as shown in Figure 15, Figure 16, and Figure 17. These current mirrors can be used as biasing elements and load devices for amplifier stages. **==> picture [121 x 121] intentionally omitted <==** **----- Start of picture text -----**<br> IREF IOUT = IREF<br>Q1 Q2<br>Q3 Q4<br>V–<br>09045-015<br>**----- End of picture text -----**<br> _Figure 15. Unity-Gain Current Mirror, IOUT = IREF_ The unity-gain current mirror shown in Figure 15 has an accuracy of better than 1% and an output impedance of more than 100 MΩ at 100 μA. Figure 16 and Figure 17 each show a modified current mirror; Figure 16 is designed for a current gain of two (2), and Figure 17 is designed for a current gain of one-half (½). The accuracy of these mirrors is reduced from that of the unity-gain source due to base current errors but remains better than 2%. **==> picture [129 x 108] intentionally omitted <==** **----- Start of picture text -----**<br> IREF IOUT = 2(IREF)<br>Q1<br>Q2 Q4<br>Q3<br>V–<br>09045-016<br>**----- End of picture text -----**<br> _Figure 16. Current Mirror, IOUT = 2(lREF)_ **==> picture [133 x 108] intentionally omitted <==** **----- Start of picture text -----**<br> IREF IOUT = 1/2(IREF)<br>Q1<br>Q2 Q4<br>Q3<br>V–<br>09045-017<br>**----- End of picture text -----**<br> _Figure 17. Current Mirror, IOUT = ½(IREF)_ Figure 18 is a temperature independent current sink that has an accuracy of better than 1% at an output current of 100 μA to 1 mA. A Schottky diode acts as a clamp to ensure correct circuit startup at power-on. Use 1% metal film type resistors in this circuit. **==> picture [314 x 190] intentionally omitted <==** **----- Start of picture text -----**<br> +15V<br>2<br>ADR01 6<br>IOUT = [10V] R<br>4 R IOUT IOUT IOUT<br>100pF<br>R 2 7<br>OP1177 6 2 1 6 7 9 8 13 14 MAT14<br>3 3 5 10 12<br>4<br>HP<br>5082-2811 R R R R<br>–15V 09045-018<br>**----- End of picture text -----**<br> _Figure 18. Temperature Independent Current Sink, IOUT = 10 V/R_ Rev. A | Page 8 of 12 **MAT14** ## **OUTLINE DIMENSIONS** **==> picture [273 x 124] intentionally omitted <==** **----- Start of picture text -----**<br> 8.75 (0.3445)<br>8.55 (0.3366)<br>4.00 (0.1575) 141 8 6.20 (0.2441)<br>3.80 (0.1496) 7 5.80 (0.2283)<br>1.27 (0.0500)BSC 0.50 (0.0197) 45°<br>1.75 (0.0689) 0.25 (0.0098)<br>0.25 (0.0098) 1.35 (0.0531) 8°<br>0.10 (0.0039) 0°<br>COPLANARITY SEATING<br>0.10 0.51 (0.0201) PLANE 0.25 (0.0098) 1.27 (0.0500)<br>0.31 (0.0122) 0.17 (0.0067) 0.40 (0.0157)<br>**----- End of picture text -----**<br> **COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.** _Figure 19. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14)_ _Dimensions shown in millimeters and (inches)_ ## **ORDERING GUIDE** |**Model1**|**Temperature Range **|**Package Description**|**Package Option**| |---|---|---|---| |MAT14ARZ<br>MAT14ARZ-R7<br>MAT14ARZ-RL|−40°C to +85°C<br>−40°C to +85°C<br>−40°C to +85°C|14-Lead Standard Small Outline Package [SOIC_N]<br>14-Lead Standard Small Outline Package [SOIC_N]<br>14-Lead Standard Small Outline Package [SOIC_N]|R-14<br>R-14<br>R-14| 1 Z = RoHS Compliant Part. Rev. A | Page 9 of 12 **MAT14** ## **NOTES** Rev. A | Page 10 of 12 **MAT14** ## **NOTES** Rev. A | Page 11 of 12 **MAT14** ## **NOTES** **©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09045-0-12/10(A)** Rev. A | Page 12 of 12
Updated at March 9, 2026
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