# Power MOSFET, N Channel, 30 V, 65 A, 0.0063 ohm, TO-252AA, Surface Mount

![Product image](https://novapart.co/image/farnell:2726024/)

**URL**: https://novapart.co/products/IRLR8721TRPBF/power-mosfet-n-channel-30-v-65-a-00063-ohm-to
**SKU**: IRLR8721TRPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.1500
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Power Dissipation | 65W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 65W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.0063ohm |
| Transistor Case Style | TO-252AA |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 65A |
| Drain Source On State Resistance | 0.0063ohm |
| Gate Source Threshold Voltage Max | 1.9V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2726024/)

## **Applications** 

High Frequency Synchronous Buck Converters for Computer Processor Power High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial Use Lead-Free 

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HEXFET ® Power MOSFET<br>VDSS RDS(on) max Qg<br>30V 8.4m 8.5nC<br>oa |<br>**----- End of picture text -----**<br>


## **Benefits** 

Very Low RDS(on) at 4.5V VGS Ultra-Low Gate Impedance Fully Characterized Avalanche Voltage and Current 

|||D-Pak|D-Pak|I-Pak|
|---|---|---|---|---|
|||IRLR8721PbF||IRLU8721PbF|
||||||
|**G**|||**D**|**S**|
|Gate|||Drain|Source|



|**Base Part Number**<br>**Package Type**<br>**Standard Pack**<br>**Orderable part number**|**Base Part Number**<br>**Package Type**<br>**Standard Pack**<br>**Orderable part number**|
|---|---|
||**Form**<br>**Quantity**|
|IRLR8721PbF<br>D-Pak<br>Tube<br>75<br>IRLR8721PbF||
||Tape and Reel<br>2000<br>IRLR8721TRPbF|
||Tape and Reel Left<br>3000<br>IRLR8721TRLPbF|
||Tape and Reel Right<br>3000<br>IRLR8721TRRPbF|
|IRLU8721PbF<br>I-Pak<br>Tube<br>75<br>IRLU8721PbF||
|**Absolute Maximum Ratings**||
||**Parameter**<br>**Units**<br>**Max.**|
|VDS|Drain-to-Source Voltage<br>V<br>30<br>~~A~~|
|VGS<br>ID@ TC= 25°C<br>ID @ TC= 100°C<br>IDM<br>PD @TC= 25°C<br>PD@TC= 100°C|Gate-to-Source Voltage<br>Continuous Drain Current, VGS@ 10V<br>Continuous Drain Current, VGS@ 10V<br>A<br>Pulsed Drain Current<br>Maximum Power Dissipation<br>Maximum Power Dissipation<br>65<br>46<br>260<br>± 20<br>W<br>65<br>33<br>~~a~~<br>~~Pf~~<br>~~———e~~<br>~~on~~<br>~~a~~<br>~~a~~<br>~~Ne~~|
|TJ<br>TSTG|Linear Derating Factor<br>W/°C<br>Operating Junction and<br>°C<br>Storage Temperature Range<br>-55  to + 175<br>0.43<br>~~eeee~~|



## **Thermal Resistance** 

||**Parameter**|**Typ.**|**Max.**|**Units**|
|---|---|---|---|---|
|RJC<br>~~a~~|Junction-to-Case<br>~~a~~<br>~~a~~|–––<br>~~a~~<br>~~a~~|2.3<br>~~a~~<br>~~a~~|°C/W<br>~~a~~|
|RJA<br>~~a~~|Junction-to-Ambient (PCB Mount)<br>~~a~~|–––<br>~~a~~|50<br>~~a~~||
|RJA<br>~~a~~|Junction-to-Ambient<br>~~a~~<br>~~a~~|–––<br>~~a~~<br>~~a~~|110<br>~~a~~<br>~~a~~||



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## **Static @ TJ = 25°C (unless otherwise specified)** 

||**Parameter**|**Min.**|**Typ.**|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|BVDSS|Drain-to-Source Breakdown Voltage|30|–––|–––|V|VGS= 0V, ID= 250μA|
|VDSS/TJ|Breakdown Voltage Temp. Coefficient|–––|21|–––|mV/°C|Reference to 25°C, ID= 1mA|
|RDS(on)|Static Drain-to-Source On-Resistance|–––|6.3|8.4|m|VGS= 10V, ID= 25A�|
|||–––|10.1|11.8||VGS= 4.5V, ID= 20A�|
|VGS(th)|Gate Threshold Voltage|1.35|1.9|2.35|V|VDS= VGS, ID= 25μA|
|VGS(th)|Gate Threshold Voltage Coefficient|–––|-6.8|–––|mV/°C||
|IDSS|Drain-to-Source Leakage Current|–––|–––|1.0|μA|VDS= 24V, VGS= 0V|
|||–––|–––|150||VDS= 24V, VGS= 0V, TJ= 125°C|
|IGSS|Gate-to-Source Forward Leakage|–––|–––|100|nA|VGS= 20V|
||Gate-to-Source Reverse Leakage|–––|–––|-100||VGS= -20V|
|gfs|Forward Transconductance|46|–––|–––|S|VDS= 15V, ID= 20A|
|Qg|Total Gate Charge|–––|8.5|13|nC|See Fig. 16<br>VGS= 4.5V<br>ID= 20A<br>VDS= 15V|
|Qgs1|Pre-Vth Gate-to-Source Charge|–––|1.9|–––|||
|Qgs2|Post-Vth Gate-to-Source Charge|–––|1.2|–––|||
|Qgd|Gate-to-Drain Charge|–––|3.4|–––|||
|Qgodr|Gate Charge Overdrive|–––|2.0|–––|||
|Qsw|Switch Charge (Qgs2+ Qgd)|–––|4.6|–––|||
|Qoss|Output Charge|–––|7.9|–––|nC|VDS= 16V, VGS= 0V|
|RG|Gate Resistance|–––|2.3|3.8|||
|td(on)|Turn-On DelayTime|–––|8.8|–––|ns|RG= 1.8<br>VDD= 15V, VGS= 4.5V�<br>ID= 20A<br>See Fig. 14|
|tr|Rise Time|–––|30|–––|||
|td(off)|Turn-Off DelayTime|–––|9.4|–––|||
|tf|Fall Time|–––|6.5|–––|||
|Ciss|Input Capacitance|–––|1030|–––|pF|VGS= 0V<br>VDS= 15V<br>ƒ= 1.0MHz|
|Coss|Output Capacitance|–––|350|–––|||
|Crss|Reverse Transfer Capacitance|–––|110|–––|||



## **Avalanche Characteristics** 

||**Parameter**|**Typ.**|**Max.**|**Units**|
|---|---|---|---|---|
|EAS|Single Pulse Avalanche Energy��|–––|93|mJ|
|IAR|Avalanche Current��|–––|20|A|
|EAR|Repetitive Avalanche Energy�|–––|6.5|mJ|



## **Diode Characteristics** 

||**Parameter**|**Min.**|**Typ.**|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|IS|Continuous Source Current<br>(Body Diode)|–––|–––|65�|A|S<br>D<br>G<br>MOSFET symbol<br>showing  the<br>integral reverse<br>p-n junction diode.|
|ISM|Pulsed Source Current<br>(Body Diode)���|–––|–––|260|||
|VSD|<br>Diode Forward Voltage|–––|–––|1.0|V|TJ= 25°C, IS= 20A, VGS= 0V�<br>|
|trr|Reverse RecoveryTime|–––|17|26|ns|TJ= 25°C, IF= 20A, VDD= 15V<br>di/dt = 300A/μs�|
|Qrr|Reverse RecoveryCharge|–––|24|36|nC||
|ton|Forward Turn-On Time|Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)|||||



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1000 1000<br>VGS VGS<br>TOP           10V TOP           10V<br>8.0V5.0V Ae 8.0V5.0V |<br>4.5V 4.5V<br>100 4.0V3.5V eeCees eee) 4.0V3.5V foo G<br>3.0V 100 3.0V<br>BOTTOM 2.7V BOTTOM 2.7V<br>10 AA TTT) fr<br>10<br>1<br>ELSS et feecan= 2.7V aSeatac<br>= 2.7V a<br>pp 60μs PULSE WIDTH 60μs PULSE WIDTH<br>Tj = 25°C Tj = 175°C<br>0.1 ar tii 1 PL ail<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics Fig 2.   Typical Output Characteristics<br>1000 2.0<br>ID = 25A<br>V GS  = 10V<br>a es = — ae J<br>100 TJ = 175°C<br>== aaeee4e<br>1.5<br>esif,ee 2 es es Y<br>10<br>J | ff | || || y y ULLYZ<br>ee 0 2 ee ee ee eee 1.0 ZI<br>T = 25°C<br>1 J<br>Seo VDS = 15V LETT TIT<br>0.1 |t]eee 60μs PULSE WIDTH eee 0.5<br>0 2 4 6 8 10 -60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>VGS, Gate-to-Source Voltage (V)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 3.** Typical Transfer Characteristics 

**Fig 4.** Normalized On-Resistance vs. Temperature 

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10000 5.0<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED ID= 20A VDS= 24V<br>C rss    = C gd  VDS= 15V<br>a Coss   = Cds + Cgd 4.0 V DS = 6.0V<br>C<br>1000 ee iss Fife<br>C 3.0<br>oss<br>PR ARH po / LL)<br>HE Crss 2.0 j<br>100<br>1.0<br>10 e s e| | 0.0 J) | | fo<br>1 10 100 0 2 4 6 8 10<br>VDS, Drain-to-Source Voltage (V)  QG,  Total Gate Charge (nC)<br>Fig 5.   Typical Capacitance vs. Fig 6.   Typical Gate Charge vs.<br>Drain-to-Source Voltage Gate-to-Source Voltage<br>1000 1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>100μsec<br>100 100<br>T = 175°C<br>J<br>1msec<br>pF Pope te |<br>T = 25°C<br>10 J  10<br>Hf fo SOS DN<br>10msec<br>1 1<br>|__| __ So Tc = 25°C<br>VGS = 0V Tj = 175°CSingle Pulse<br>0.1 ey ss 0.1 | ea<br>0.0 0.5 1.0 1.5 2.0 0 1 10 100<br>VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)<br>C, Capacitance (pF)<br>VGS, Gate-to-Source Voltage (V)<br>ISD, Reverse Drain Current (A) ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Source-Drain Diode Forward Voltage 

**Fig 8.** Maximum Safe Operating Area 

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70 2.5<br>Limited By Package<br>60<br>CE<br>2.0<br>50 Po | Lf PS ttt<br>PTA EEN<br>40 ID = 25μA<br>1.5<br>CINE aN<br>30<br>TENE EEEEEEENAEE<br>20<br>1.0<br>10 PNG\ BreNDIN<br>Ne<br>0 0.5<br>25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175 200<br> TC , Case Temperature (°C) TJ , Temperature ( °C )<br>VGS(th), Gate Threshold Voltage (V)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

**Fig 10.** Threshold Voltage vs. Temperature 

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10<br>1 D = 0.50<br>0.20<br>0.10<br>0.1 ae 0.05 ae R1 R1 R2 R2 R3 R3 rl. Ri (°C/W)   i (sec)<br>0.02 J  J C 0.3501     0.000072 +4<br>0.01  1 1  2  2  3 3 1.1877     0.001239<br>0.01 Ci=  Ci iRi iRi 0.7635     0.010527<br>Notes:<br>SINGLE PULSE<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>| meine 2. Peak Tj = P dm x Zthjc + Tc il<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


**Fig 11.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

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400<br>ID<br>PEELE<br>350 TOP         1.1A<br>1.4A<br>ALLL<br>300 ALLL BOTTOM 20A<br>250<br>200<br>AGUS Snnne<br>150<br>NAT<br>100<br>PSN<br>50<br>Baan S\QRR EE<br>0 PELEEL Pes<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


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15V PEELE<br>350<br>VDS L DRIVER<br>ALLL<br>300<br>RG D.U.T + 250 ALLL<br>| - [V][DD]<br>IAS A<br>i 20V tp 0.01 200 AGUS<br>150<br>Fig 12a.   Unclamped Inductive Test Circuit<br>100<br>PSN<br>V(BR)DSS 50<br>> tp Baan S\QRR<br>0 EL<br>/| 25 50 75 100<br>Fig 12c.<br>vs. Drain Current<br>/ \<br>IAS<br>= .<br>Vos<br>Fig 12b.  Current Unclamped Inductive WaveformsRegulator Veses D.UT..UT.NWNUT.<br>Same Type as D.U.T.<br>Pulse Widths <br>| 50K Duty Factor <br>12V .2F | a6<br>.3F : Fig 14a. )+ Ves Ves<br>|<br>+<br>D.U.T. -VDS VDSDS<br>90%<br>VGS<br>3mA PIL<br>10%<br>OF | VGSGS<br>IG ID<br>td(on)d(on) trr td(off)d(off)<br>Current Sampling Resistors<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 12a.** Unclamped Inductive Test Circuit 

**Fig 12c.** Maximum Avalanche Energy vs. Drain Current 

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Veses Vos D.UT..UT.NWNUT. |<br>Pulse Widths <br>Duty Factor <br>a6<br>)+ Ves Ves<br>Fig 14a.   Switching Time Test Circuit<br>VDSDS<br>90%<br>|<br>10%<br>VGSGS<br>td(on)d(on) trr td(off)d(off) tf<br>**----- End of picture text -----**<br>


**Fig 13.** Gate Charge Test Circuit 

**Fig 14b.** Switching Time Waveforms 

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100<br>See ee a | ee ca cee |<br>Allowed avalanche Current vs avalanche<br>Ht INSIST E pulsewidth, tav, assuming Tj = 150°C and  enh<br>Tstart =25°C (Single Pulse)<br>10<br>Duty Cycle = Single Pulse<br>PEI PNET | Ps Se<br>ry me eaall<br>1 A SN<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  j = 25°C and<br>Tstart = 150°C.<br>©eeEEE EHH<br>0.1 LI IE TP<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 15.** Typical Avalanche Current vs. Pulsewidth 

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Driver Gate Drive<br>P.W.<br>D.U.T + { P.W. + Period ——— + D = —— Period<br>Circuit Layout Considerations V | GS=10V<br>(A [©)]  | t<br><br>| =] - LowGround StrayPla I n eductance<br> Low Leakage Inductance ® D.U.T. ISD Waveform<br>+<br>Reverse<br>Recovery Body Diode Forward<br>ar - [l] Current Transformer - ® + Current r Current di/dt NN<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 +> VDD<br>v<br> Re-Applied<br> Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re (A  dvidt controlled by Re Vo p - Inductor Curent L_<br> D.U.T. - Device Under Test SCO |<br>Isp controlled by Duty Factor "D" ® Ripple   5% ISD<br>**----- End of picture text -----**<br>


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Fig 15.  Peak Diode Recovery dv/dt Test Circuit or N-Channel<br>HEXFET ® Power MOSFETs<br>**----- End of picture text -----**<br>


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Id<br>Vds<br>Vgs<br>Vgs(th)<br>gp g p i gro op tg p i<br>Qgodr Qgd Qgs2 Qgs1<br>**----- End of picture text -----**<br>


**Fig 16.** Gate Charge Waveform 

## **Power MOSFET Selection for Non-Isolated DC/DC Converters** 

## **Control FET** 

## **Synchronous FET** 

The power loss equation for Q2 is approximated by; 

This can be expanded and approximated by; 

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*dissipated primarily in Q1. 

For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant.  Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs’ susceptibility to Cdv/dt turn on. 

The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of  Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Q /Q must be minimized to reduce the gd gs1 potential for Cdv/dt turn on. 

Figure A:  Qoss Characteristic 

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PbF<br>| IRLR/U8721PbF<br>**----- End of picture text -----**<br>


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| 10 | www.irf.com © 2012 International Rectifier<br>**----- End of picture text -----**<br>


## December 4, 2012 

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[<4Ry [iN] IRLR/U8721PbF<br>l-Pak (TO-251AA) Package Outline<br>Dimensions are shown in millimeters (inches)<br>E AN a A<br>, 1A: A | {$[-o10 [e [0.2 PAN 5] c]A]a) 1 t .an NO TE S:<br>i oA 3 “EL i 21.-, - DIMDIM EEN NSIONSIONI NG AR EA NS D HOWNTOLERINANCIINCH NGE SPE[MILLIMR ASM ETERE Y S].14,5M-1994<br>A > ae A DIM EN S ION D  & E DO NOT I N CL UDE M OL D FLASH. M OL D FLASH SHAL L N O T EX C EED . 005 [0.13] P E R<br>a na a p a 1i A THESIDE .RM ALTH ESP EA DDIMCONEN SIT OURONS OPA R TI E ONMEAWI SUR T H INEDDIMA TE NSIONTHE OUb4,TMOSL2,T £1E XT&RED1MES OF THE PLASTIC BODY.<br>L i As LEA D DIM E NSION UNCONTROLL ED IN L3.<br>elile ! As DIM E NSION b1, 63 & cl A PPLY TO B A S E M ETA L ONLY.<br>i 7 .- OUTLIN E CON F ORMS TO JE D E C OUTLIN E T O - 251 AA (Do t e 06/02).<br>j<br>_ . 4 8.— CONTROLLING DIMENSION : INCHES.<br>3x b Ss<br>v er o L\ M 9<br> 1 et THE RM AL P A D 8 4<br>\ A 218 2.39 086 094<br>ot ZX Al 0.89 114 035, .045<br>b 0.64 0.89 025 .035<br>XI b 2t | 0. 7665 0.791.14 .0 25,30 045,O31 6<br>(D AT UM A ) b3 | 0.76 | 1.04 || 030 | .o41 | 6<br>b4 4.95 5.46 195, 215 4<br>c 0.46 0.61 018 024<br>ef 0.41 0.56 .016, 022 6<br>c2 | 0.46 0.89 018 .035<br>D 5.97 6.22 5235, 245 3<br>t o1 5.21 - .205 - 4<br>B A S E M ETA L V IEoO,A W AnA~ PLATING E1E e. | 6.35[age4.32 7 6.739.65 - 11 .250170350 7 .265seo - 34 LEAD ASSIGNMENTS<br>|<br>OU. ¥ \<Gyyys (o.02) N d ia L2us|02Lu} || 0.89tas1.9125° ||| 2.291.2715235° ||||| 0451s03525°  ||| .og0.050oo35° || 4 H 2 134 EX.-,—.— FETGSSOURCDR A h . T AIaE nN E<br>S E CTION B - B & C - C<br>Il-Pak (TO-251AA) Part Marking Information<br>EXAMPLE:. THIS IS AN IRFU120 INTERNATIONAL —— _ PART NUMBER<br>WITH ASSEMBLY<br>ASSEMBLEDLOT CODE 5678 RECTIFIERLOGO TORIRA 116A)20 YEARDATE CODE1 = 2001<br>IN ON WW 19, 2001 Ta WEEK 19<br> THE ASSEMBLY LINE 'A' LINE A<br>ASSEMBLY<br>LOT CODE<br>Note: '"P" in assembly line position<br>indicates Lead-Free"<br>OR<br>PART NUMBER<br>INTERNATIONAL oc ’<br>RECTIFIER IRFUi20 DATE CODE<br>LOGO TOR Pris P = DESIGNATES LEAD-FREE<br>OTB PRODUCT (OPTIONAL)<br>ASSEMBLY YEAR [1] [=] [2001]<br>LOT CODE WEEK 19<br>A = ASSEMBLY SITE CODE<br>**----- End of picture text -----**<br>


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Note: For the most current drawing please refer to IR website at http://www. irf.com/package/<br>| ott | www.irf.com © 2012 International Rectifier<br>**----- End of picture text -----**<br>


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December 4, 2012<br>**----- End of picture text -----**<br>


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TR TRR TRL<br>eoGoGG G0) | ee¢oo / |<br>16.3 ( .641 ) 16.3 ( .641 )<br>15.7 ( .619 ) 15.7 ( .619 )<br>12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 ) FEED DIRECTION<br>11.9 ( .469 ) 7.9 ( .312 )<br>NOTES :<br>1.  CONTROLLING DIMENSION : MILLIMETER.<br>2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).<br>3.  OUTLINE CONFORMS TO EIA-481 & EIA-541.<br>  13 INCH<br>@ CS<br>16 mm<br>|X QQ ) | b k<br>NOTES :<br>1. OUTLINE CONFORMS TO EIA-481.<br>**----- End of picture text -----**<br>


Notes: ® Repetitive rating;  pulse width limited by ® Calculated continuous current based on maximum allowable max. junction temperature. junction temperature. Package limitation current is 50A. @ Starting TJ = 25°C, L = 0.47mH ® When mounted on 1" square PCB (FR-4 or G-10 Material). RG = 25, IAS = 20A. 

® Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 50A. ® When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 

Pulse width  400μs; duty cycle  2%. 

**IR WORLD HEADQUARTERS:** 101 N. Sepulveda Blvd., El Segundo, California 90245 To contact International Rectifier, please visit http://www.irf.com/whoto-call/ Visit us at www.irf.com for sales contact information **.** 



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- [Supplier page](https://es.farnell.com/en-ES/infineon/irlr8721trpbf/mosfet-n-ch-30v-65a-to-252aa/dp/2726024)
---

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