# Power MOSFET, N Channel, 100 V, 8.4 A, 0.22 ohm, TO-252 (DPAK), Surface Mount

![Product image](https://novapart.co/image/farnell:1505183/)

**URL**: https://novapart.co/products/IRLR120ATF/power-mosfet-n-channel-100-v-84-a-022-ohm-to-252
**SKU**: IRLR120ATF
**Manufacturer**: ONSEMI
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.2260
**Stock**: 10+

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:8.4A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.22ohm; Rds(on) Test Voltage Vgs:5V; Threshold Voltage Vgs:2V; Power Dissipation

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 35W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 5V |
| Transistor Case Style | TO-252 (DPAK) |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 8.4A |
| Drain Source On State Resistance | 0.22ohm |
| Gate Source Threshold Voltage Max | 2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1505183/)

**IRLR/U120A** 

$GYDQFHG 3RZHU 026)(7 

## **FEATURES** 

- ♦  Avalanche  Rugged  Technology 

- ♦  Rugged  Gate  Oxide  Technology 

- ♦  Lower  Input  Capacitance 

- ♦  Improved  Gate  Charge 

- ♦  Extended  Safe  Operating  Area 

- ♦  Lower  Leakage  Current: 10µA (Max.)  @  VDS = 100V 

- ♦  Lower  RDS(ON): 0.176Ω (Typ.) 

||BVDSS=  100 V|=  100 V|=  100 V|=  100 V|=  100 V|
|---|---|---|---|---|---|
||RDS(on)|DS(on)=  0.22||=  0.22|=  0.22Ω|
||ID=  8.4 A|||=  8.4 A||
|||||||
||**D-PAK**||||**I-PAK**|
||ED|**2**|||gi|
|||||||
|**1**<br>**3**||||**1**|**3**<br>**2**|



**1. Gate  2. Drain  3. Source** 

## **Absolute  Maximum  Ratings** 

|**Symbol**<br>VDSS|Drain-to-Source Voltage<br>**Characteristic**|100<br>**Value**|**Units**<br>V|
|---|---|---|---|
|ID|Continuous  Drain  Current  (TC=25°C)|8.4|A|
||Continuous  Drain  Current  (TC=100°C)|5||
|IDM|Drain  Current-Pulsed(1)|29|A|
|VGS|Gate-to-Source  Voltage|±20|V|
|EAS|Single  Pulsed  Avalanche  Energy (2)|94|mJ|
|IAR|Avalanche  Current(1)|8.4|A|
|EAR|Repetitive  Avalanche  Energy (1)|3.5|mJ|
|dv/dt|Peak  Diode  Recovery  dv/dt   (3)|6.5|V/ns|
|PD|Total  Power  Dissipation(TA=25°C)<br>*|2.5|W|
||Total  Power  Dissipation  (TC=25°C)<br>Linear  Derating  Factor|35<br>0.28|W<br>W/°C|
|TJ, TSTG|Operating  Junction  and<br>Storage  Temperature  Range|- 55  to  +150|°C|
|TL|Maximum  Lead  Temp.  for  Soldering<br>Purposes,  1/8 from  case  for  5-seconds|300||



## **Thermal  Resistance** 

|**Symbol**|**Characteristic**|**Typ.**|**Max.**|**Units**|
|---|---|---|---|---|
|RθJC|Junction-to-Case|--|3.5|°C/W|
|RθJA|Junction-to-Ambient<br>*|--|50||
|RθJA|Junction-to-Ambient|--|110||



*   When  mounted  on  the  minimum  pad  size  recommended (PCB  Mount). 

Rev. B 

©1999 Fairchild Semiconductor Corporation 

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**IRLR/U120A** 

## **Electrical Characteristics** (TC=25°C unless  otherwise  specified) 

|**Electri**|**cal Characteristics**(TC=25°C|unle|ss  ot|herwi|se  sp|ecified)|
|---|---|---|---|---|---|---|
|**Symbol**|**Characteristic**|**Min.**|**Typ.**|**Max. **|**Units**|**Test  Condition**|
|BVDSS|Drain-Source  Breakdown  Voltage|100|--|--|V|VGS=0V,ID=250µA|
|∆BV/∆TJ|Breakdown  Voltage  Temp.  Coeff.|--|0.01|--|V/°C|ID=250µA**See Fig 7**|
|VGS(th)|Gate  Threshold  Voltage|1.0|--|2.0|V|VDS=5V,ID=250µA|
|IGSS|Gate-Source  Leakage ,  Forward|--|--|100|nA|VGS=20V|
||Gate-Source  Leakage ,  Reverse|--|--|-100||VGS=-20V|
|IDSS|Drain-to-Source  Leakage  Current|--|--|10|µA|VDS=100V|
|||--|--|100||VDS=80V,TC=125°C|
|RDS(on)|Static  Drain-Source<br>On-State  Resistance|--|--|0.22|Ω|VGS=5V,ID=4.2A (4)|
|gfs|Forward  Transconductance|--|7.5|--|Ω|VDS=40V,ID=4.2A (4)|
|Ciss<br>Coss|Input  Capacitance<br>Output  Capacitance|--<br>--|90<br>340|440<br>115|pF|VGS=0V,VDS=25V,f =1MHz<br> **See Fig 5**|
|Crss|Reverse  Transfer  Capacitance|--|39|50|||
|td(on)|Turn-On  Delay  Time|--|5|20|ns|VDD=50V,ID=9.2A,<br>RG=9Ω<br> **See Fig 13**(4) (5)|
|tr|Rise  Time|--|10|30|||
|td(off)|Turn-Off  Delay  Time|--|19|50|||
|tf|Fall  Time|--|9|30|||
|Qg|Total  Gate  Charge|--|10.2|15|nC|VDS=80V,VGS=5V,<br>ID=9.2A<br>**See Fig 6 & Fig 12**(4) (5)|
|Qgs|Gate-Source  Charge|--|1.7|--|||
|Qgd|Gate-Drain ( Miller )  Charge|--|6.0|--|||



## **Source-Drain  Diode  Ratings  and  Characteristics** 

**==> picture [410 x 91] intentionally omitted <==**

**----- Start of picture text -----**<br>
Symbol Characteristic Min. Typ. Max. Units Test  Condition<br>IS Continuous  Source  Current -- -- 8.4 Integral reverse pn-diode<br>A<br>ISM Pulsed-Source  Current              (1) -- -- 29 in the MOSFET<br>VSD Diode  Forward  Voltage             (4) -- -- 1.5 V TJ=25°C,IS=8.4A,VGS=0V<br>trr Reverse  Recovery  Time -- 98 -- ns TJ=25°C,IF=9.2A<br>Qrr Reverse  Recovery  Charge -- 0.34 -- µC diF/dt=100A/Ωs             (4)<br>**----- End of picture text -----**<br>


## **Notes;** 

(1)  Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature 

(2)  L=2mH, IAS=8.4A, VDD=25V, RG=27Ω, Starting TJ =25°C 

- (3)  ISD ≤ 9.2A, di/dt ≤ 300A/µs, VDD ≤ BVDSS , Starting TJ =25°C 

- (4)  Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2% 

- (5)  Essentially Independent of Operating Temperature 

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**IRLR/U120A** 

**==> picture [431 x 343] intentionally omitted <==**

**----- Start of picture text -----**<br>
Fig 1.  Output Characteristics Fig 2.  Transfer Characteristics<br>                     VGS<br>Top  :          7.0 V<br>                   6.0 V<br>                   5.5 V<br>10 [1]                    5.0 V 10 [1]<br>                   4.5 V<br>                   4.0 V<br>                   3.5 V<br>Bottom  :    3.0 V<br>150 oC<br>10 [0] 10 [0]<br>25 oC @ Notes :<br>  1. VGS = 0 V<br>@ Notes :  1. 250   2. TC = 25  µ s Pulse TestoC - 55 oC   2. V  3. 250 DS = 40 V µ s Pulse Test<br>10 [-1] 10 [-1]<br>10 [-1] 10 [0] 10 [1] 0 2 4 6 8 10<br>VDS , Drain-Source Voltage  [V] VGS , Gate-Source Voltage  [V]<br>Fig 3.  On-Resistance vs. Drain Current Fig 4.  Source-Drain Diode Forward Voltage<br>0.4<br>0.3 VGS = 5 V 10 [[1]]<br>0.2<br>10 [[0]]<br>0.1 VGS = 10 V @ Notes :<br>150 oCoCC   1. VGS = 0 VGS = 0 V = 0 V<br>@ Note : TJ = 25  [o] C 25 oCoCC   2. 250  µ s Pulse Test<br>0.0 10 [[-1]]<br>0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2<br>ID , Drain Current  [A] VSD , Source-Drain Voltage  [V]  , Source-Drain Voltage  [V]<br> , Drain Current  [A]ID  , Drain Current  [A]ID<br>]<br>Ω<br>  , [<br>DS(on)<br>R<br>Drain-Source On-Resistance  , Reverse Drain Current  [A]DRDR<br>I<br>**----- End of picture text -----**<br>


**==> picture [198 x 136] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 [[1]]<br>10 [[0]]<br>@ Notes :<br>150 oCoCC   1. VGS = 0 VGS = 0 V = 0 V<br>25 oCoCC   2. 250  µ s Pulse Test<br>10 [[-1]]<br>0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2<br>VSD , Source-Drain Voltage  [V]<br> , Reverse Drain Current  [A]DRDR<br>I<br>**----- End of picture text -----**<br>


**==> picture [196 x 165] intentionally omitted <==**

**----- Start of picture text -----**<br>
Fig 5.  Capacitance vs. Drain-Source Voltage<br>600<br>Ciss= Cgs+ Cgd ( Cds= shorted )<br>Coss= Cds+ Cgd<br>480 C iss Crss= Cgd<br>360 C oss<br>240 @ Notes :<br>C rss   1. V  2. f = 1 MHzGS = 0 V<br>120<br>0<br>10 [0] 10 [1]<br>VDS , Drain-Source Voltage [V]<br>Capacitance  [pF]<br>**----- End of picture text -----**<br>


**Fig 6.  Gate Charge vs. Gate-Source Voltage** 

**==> picture [192 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
6<br>V  = 20 V<br>DS<br>V  = 50 V<br>DS<br>V  = 80 V<br>DS<br>4<br>2<br>@ Notes : ID = 9.2 A<br>0<br>0 2 4 6 8 10 12<br>QG , Total Gate Charge  [nC]<br> , Gate-Source Voltage  [V]<br>GS<br>V<br>**----- End of picture text -----**<br>


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## **IRLR/U120A** 

**==> picture [432 x 159] intentionally omitted <==**

**----- Start of picture text -----**<br>
Fig 7.  Breakdown Voltage vs. Temperature Fig 8.  On-Resistance vs. Temperature<br>1.2 2.5<br>2.0<br>1.1<br>1.5<br>1.0<br>1.0<br>0.9 @ Notes : @ Notes :<br>  1. VGS = 0 V 0.5   1. VGS = 5 V<br>  2. ID = 250  µ A   2. ID = 4.6 A<br>0.8 0.0<br>-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Junction Temperature  [ [o] C] TJ , Junction Temperature  [ [o] C]<br> , (Normalized)  , (Normalized)<br>DSS<br>BV DS(on)<br>R<br>Drain-Source On-Resistance<br>Drain-Source Breakdown Voltage<br>**----- End of picture text -----**<br>


**==> picture [427 x 346] intentionally omitted <==**

**----- Start of picture text -----**<br>
10 [2] Fig 9.  Max. Safe Operating Area 10 Fig 10.  Max. Drain Current vs. Case Temperature<br>Operation in This Area<br>is Limited by R DS(on)<br>8<br>100  µ s<br>10 [1]<br>1 ms<br>6<br>10 ms<br>DC<br>@ Notes : 4<br>10 [0]   1. TC = 25  [o] C<br>  2. TJ = 150  [o] C<br>  3. Single Pulse 2<br>10 [-1] 0<br>10 [0] 10 [1] 10 [2] 25 50 75 100 125 150<br>VDS , Drain-Source Voltage  [V] Tc , Case Temperature  [ [o] C]<br>Fig 11.  Thermal Response<br>10 [1]<br>D=0.5<br>10 [0]<br>0.2<br>@ Notes :<br>0.1   1. Z θ JC (t)=3.5 oC/W Max.<br>0.05   2. Duty Factor, D=t1/t2<br>10 [-1] 0.010.02 single pulse   3. TPDMJM -TC =PDM *Z θ JC (t)<br>t1<br>t2<br>10 [-2]<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 10 [0] 10 [1]<br>t1 , Square Wave Pulse Duration  [sec]<br> , Drain Current  [A]ID  , Drain Current  [A]ID<br>(t) ,  Thermal Response<br>Z JC θ<br>**----- End of picture text -----**<br>


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**IRLR/U120A** 

## **Fig 12.  Gate Charge Test Circuit  &  Waveform** 

**==> picture [438 x 516] intentionally omitted <==**

**----- Start of picture text -----**<br>
Current Regulator<br>Same Type VGS<br>50k Ω as DUT<br>Qg<br>12V 200nF<br>300nF 10V<br>VDS<br>VGS Qgs Qgd<br>DUT<br>3mA<br>R1 R2<br>Charge<br>Current Sampling (IG) Current Sampling (ID)<br>Resistor Resistor<br>Fig 13.  Resistive Switching Test Circuit  &  Waveforms<br>RL<br>Vout Vout 90%<br>Vin VDD<br>( 0.5 rated VDS )<br>RG<br>DUT<br>10%<br>Vin<br>10V<br>td(on) tr td(off) tf<br>t on t off<br>Fig 14.  Unclamped Inductive Switching Test Circuit  &  Waveforms<br>LL EAS = ----1 LL IAS [2] --------------------BVDSS<br>VDS 2 BVDSS -- VDD<br>Vary tp to obtain ID BVDSS<br>required peak ID IAS<br>RG C VDD ID (t)<br>DUT<br>VDD VDS (t)<br>5V<br>t p t p Time<br>**----- End of picture text -----**<br>


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**IRLR/U120A** 

**Fig 15.  Peak Diode Recovery dv/dt Test Circuit  &  Waveforms** 

**==> picture [309 x 490] intentionally omitted <==**

**----- Start of picture text -----**<br>
DUT +<br>VDS<br>--<br>I S<br>L<br>Driver<br>VGS<br>RG Same Type as DUT VDD<br>VGS  dv/dt controlled by RG<br> IS controlled by Duty Factor D<br>VGS D = --------------------------Gate Pulse Period [Gate Pulse Width] 10V<br>( Driver )<br>IFM , Body Diode Forward Current<br>I<br> S<br>di/dt<br>( DUT )<br>IRM<br> Body Diode Reverse Current<br>V<br>DS<br>( DUT ) Body Diode Recovery dv/dt<br>Vf VDD<br>Body Diode<br>Forward Voltage Drop<br>**----- End of picture text -----**<br>


6 

## **TRADEMARKS** 

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 

|ACEx™|ISOPLANAR™|
|---|---|
|CoolFET™|MICROWIRE™|
|CROSSVOLT™|POP™|
|E2CMOSTM|PowerTrench™|
|FACT™|QS™|
|FACT Quiet Series™|Quiet Series™|
|FAST®|SuperSOT™-3|
|FASTr™|SuperSOT™-6|
|GTO™|SuperSOT™-8|
|HiSeC™|TinyLogic™|



## **DISCLAIMER** 

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 

## **LIFE SUPPORT POLICY** 

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 

## **PRODUCT STATUS DEFINITIONS** 

## **Definition of Terms** 

|**Definition of Terms**|||
|---|---|---|
|**Datasheet Identification**|**Product Status**|**Definition**|
|Advance Information|Formative or<br>In Design|This datasheet contains the design specifications for<br>product development. Specifications may change in<br>any manner without notice.|
|Preliminary|First Production|This datasheet contains preliminary data, and<br>supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make<br>changes at any time without notice in order to improve<br>design.|
|No Identification Needed|Full Production|This datasheet contains final specifications. Fairchild<br>Semiconductor reserves the right to make changes at<br>any time without notice in order to improve design.|
|Obsolete|Not In Production|This datasheet contains specifications on a product<br>that has been discontinued by Fairchild semiconductor.<br>The datasheet is printed for reference information only.|





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