# Power MOSFET, P Channel, 55 V, 14 A, 0.093 ohm, TO-220FP, Through Hole

![Product image](https://novapart.co/image/farnell:9933867/)

**URL**: https://novapart.co/products/IRLIB9343PBF/power-mosfet-p-channel-55-v-14-a-0093-ohm-to-220fp
**SKU**: IRLIB9343PBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.7670
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Channel Type | P Channel |
| Power Dissipation | 33W |
| Transistor Mounting | Through Hole |
| Transistor Polarity | P Channel |
| Power Dissipation Pd | 33W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.093ohm |
| Transistor Case Style | TO-220FP |
| Drain Source Voltage Vds | 55V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 14A |
| Drain Source On State Resistance | 0.093ohm |
| Gate Source Threshold Voltage Max | 1V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:9933867/)

## IRLIB9343PbF 

## **Features** 

Advanced Process Technology 

Key Parameters Optimized for Class-D Audio Amplifier Applications 

Low RDSON for Improved Efficiency 

> Efficiency ° Low Qg and Qsw for Better THD and Improved . Low Qrr for Better THD and Lower EMI 

° 175°C Operating Junction Temperature for Ruggedness 

Repetitive Avalanche Capability for Robustness and Reliability 

Lead-Free 

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||||||
|---|---|---|---|---|
|Key Parameters|
|VDS|-55|V|
|RDS(ON) typ. @ VGS = -10V|93|m|
|ee|ee|
|RDS(ON) typ. @ VGS = -4.5V|ee|150|m|
|Qg typ.|ee|31|nC|
|TJ max|ee|175|ee|°C|
|D|
|G|
|S|TO-220 Full-Pak|

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## **Description** 

This Digital Audio HEXFET[®] is specifically designed for Class-D audio amplifier applications. This MosFET utilizes the latest processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery and internal Gate resistance are optimized to improve key Class-D audio amplifier performance factors such as efficiency, THD and EMI. Additional features of this MosFET are 175°C operating junction temperature and repetitive avalanche capability. These features combine to make this MosFET a highly efficient, robust and reliable device for Class-D audio amplifier applications. 

## **Absolute Maximum Ratings** 

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|||||||
|---|---|---|---|---|---|
|Parameter|Max.|Units|
|VDS|ee|Drain-to-Source Voltage|-55|V|
|VGS|Gate-to-Source Voltage|±20|
|—|st|
|ID @ TC = 25°C|ee|Continuous Drain Current, VGS @ -10V|-14|A|
|ID @ TC = 100°C|es|Continuous Drain Current, VGS @ -10V|-10|
|IDM|Pulsed Drain Current|-60|
|ee|
|PD @TC = 25°C|Power Dissipation|33|W|
|PD @TC = 100°C|esSS|Power Dissipation|20|
|Linear Derating Factor|0.26|W/°C|
|TJ|Operating Junction and|-40  to + 175|°C|
|TSTG|Storage Temperature Range|
|ee|Mounting Torque, 6-32 or M3 screw|10 (1.1)|lbf|in (N|m)|
|Thermal Resistance|
|Parameter|Typ.|Max.|Units|
|RθJC|es|Junction-to-Case|–––|3.84|°C/W|
|RθJA|Junction-to-Ambient|–––|65|
|7|fp|

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> Notes ® hrough © are on page 7 

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## **Electrical Characteristics @ TJ = 25°C (unless otherwise specified)** 

||**Parameter**|**Min.**|**Typ.**|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|BVDSS|Drain-to-Source Breakdown Voltage|-55<br>~~GO~~|–––<br>~~GO~~|–––<br>~~GO~~|V<br>~~(~~|VGS= 0V, ID= -250µA<br>~~(~~|
|∆ΒVDSS/∆TJ|Breakdown Voltage Temp. Coefficient<br>~~es~~|–––<br>~~es~~<br>~~GO~~|-52<br>~~es~~<br>~~GO~~|–––<br>~~es~~<br>~~GO~~|mV/°C<br>~~es~~<br>~~(~~|Reference to 25°C, ID= -1mA<br>~~es~~<br>~~(~~|
|RDS(on)|Static Drain-to-Source On-Resistance<br>~~CE~~<br>~~**e**e~~|–––<br>~~GO~~<br>~~CE~~|93<br>~~GO~~<br>~~CE~~|105<br>~~GO~~<br>~~CE~~|mΩ<br>~~(~~<br>~~CE~~<br>|VGS= -10V, ID= -3.4A<br>~~(~~<br>~~CE~~|
|||–––<br>~~CE~~<br>|150<br>~~CE~~<br>|170<br>~~CE~~<br>||VGS= -4.5V, ID= -2.7A<br>~~CE~~|
|VGS(th)|Gate Threshold Voltage<br>~~**e**e~~|-1.0<br><br>~~ee~~|–––<br>|–––<br>|V<br>|VDS= VGS, ID= -250µA|
|∆VGS(th)/∆TJ|Gate Threshold Voltage Coefficient<br>~~**e**es~~|–––<br>~~s~~<br>~~ee~~<br>~~SE~~|-3.7<br>~~s~~<br>~~SE~~|–––<br>~~s~~|mV/°C<br>~~s~~||
|IDSS|Drain-to-Source Leakage Current<br>~~**e**e~~<br>~~BE~~|–––<br><br>~~ee~~<br>~~BE~~<br>~~SE~~|–––<br><br>~~BE~~<br>~~SE~~|-2.0<br><br>~~BE~~|µA<br><br>~~BE~~|VDS= -55V, VGS= 0V<br>~~BE~~|
|||–––<br>~~BE~~<br>~~SE~~|–––<br>~~BE~~<br>~~SE~~|-25<br>~~BE~~||VDS= -55V, VGS= 0V, TJ= 125°C<br>~~BE~~|
|IGSS|Gate-to-Source Forward Leakage<br>~~a~~|–––<br>~~SE~~<br>~~a~~|–––<br>~~SE~~<br>~~a~~|-100<br>~~a~~|nA<br>~~a~~|VGS= -20V<br>~~a~~|
||Gate-to-Source Reverse Leakage<br>~~a~~|–––<br>~~a~~<br>~~PTT~~<br>~~Gs~~|–––<br>~~a~~<br>~~PTT~~|100<br>~~a~~<br>~~PTT~~||VGS= 20V<br>~~a~~|
|gfs|Forward Transconductance<br>~~a~~<br>~~rs~~|5.3<br>~~a~~<br>~~PTT~~<br>~~rs~~<br>~~Gs~~<br>~~ee~~|–––<br>~~a~~<br>~~PTT~~<br>~~rs~~<br>~~es~~|–––<br>~~a~~<br>~~PTT~~<br>~~rs~~|S<br>~~a~~<br>~~rs~~|VDS= -25V, ID= -14A<br>~~a~~<br>~~rs~~|
|Qg|Total Gate Charge<br>~~rs~~<br>~~es~~|–––<br>~~rs~~<br>~~Gs~~<br>~~es~~<br>~~ee~~|31<br>~~rs~~<br>~~es~~<br>~~es~~|47<br>~~rs~~<br>~~es~~|~~rs~~|VGS= -10V<br>ID= -14A<br>See Fig. 6 and 19<br>VDS= -44V<br>~~rs~~<br>@|
|Qgs|Pre-Vth Gate-to-Source Charge|–––<br>~~ee ~~<br>~~ee~~|7.1<br> ~~es~~<br>~~es~~|–––|||
|Qgd|Gate-to-Drain Charge<br>~~ee~~<br>~~es~~|–––<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>|8.5<br>~~ee~~<br>~~es~~<br>|–––<br>~~ee~~|||
|Qgodr|Gate Charge Overdrive<br>~~es~~<br>~~es ee~~|–––<br>~~ee ~~<br>~~es~~<br>~~ee~~<br>~~ee~~|15<br> ~~es~~<br>~~es~~<br>~~es~~|–––<br>~~es~~|||
|td(on)|Turn-On DelayTime<br>~~es~~<br>~~es ee~~|–––<br>~~es~~<br>~~ee~~<br>~~ee~~|9.5<br>~~es~~<br>~~es~~|–––<br>~~es~~|ns|ID= -14A<br>RG= 2.5Ω<br>VDD= -28V, VGS= -10V<br>@|
|tr|Rise Time<br>~~es ee~~|–––<br>~~ee~~<br>~~ee ~~<br>~~ee~~|24<br> ~~es~~<br>~~es~~|–––|||
|td(off)|Turn-Off DelayTime<br>~~ee~~|–––<br>~~ee~~<br>~~ee~~<br>~~ee~~|21<br>~~ee~~<br>~~es~~|–––<br>~~ee~~|||
|tf|Fall Time<br>~~es~~|–––<br>~~ee ~~<br>~~es~~<br>~~ee~~<br>~~ee~~|9.5<br> ~~es~~<br>~~es~~<br>~~es~~|–––<br>~~es~~|||
|Ciss|Input Capacitance<br>~~es~~<br>~~es~~|–––<br>~~es~~<br>~~ee~~<br>~~es~~<br>~~ee~~|660<br>~~es~~<br>~~es~~<br>~~es~~|–––<br>~~es~~<br>~~es~~|pF|ƒ= 1.0MHz,          See Fig.5<br>VGS= 0V<br>VDS= -50V|
|Coss|Output Capacitance|–––<br>~~ee ~~<br>~~ee~~|160<br> ~~es~~<br>~~es~~|–––|||
|Crss|Reverse Transfer Capacitance<br>~~ee~~|–––<br>~~ee~~<br>~~ee~~<br>~~ee~~|72<br>~~ee~~<br>~~es~~<br>~~ee~~|–––<br>~~ee~~|||
|Coss|Effective Output Capacitance<br>~~ee~~|–––<br>~~ee ~~<br>~~ee~~<br>~~ee~~|280<br> ~~es~~<br>~~ee~~<br>~~ee~~|–––<br>~~ee~~||VGS= 0V, VDS= 0V to -44V|
|LD|Internal Drain Inductance<br>~~ff~~|–––<br>~~ee ~~<br>~~ff~~|4.5<br> ~~ee~~<br>~~ff~~|–––<br>~~ff~~|nH<br>~~ff~~|Between  lead,<br>6mm (0.25in.)<br>from package<br>and center of die contact<br>~~ff~~|
|LS|Internal Source Inductance<br>~~ff~~<br>~~PE~~|–––<br>~~ff~~<br>~~PE~~|7.5<br>~~ff~~<br>~~PE~~|–––<br>~~ff~~<br>~~PE~~|||



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100 100<br>VGS VGS<br>TOP           -15V TOP           -15V<br>Elie Cal -12V-10V Rl eee - -12V-10V<br>-8.0V -8.0V<br>nai Zan -5.5V +H ag -5.5V<br>10 -4.5V-3.0V 10 -4.5V-3.0V<br>BOTTOM -2.5V BOTTOM -2.5V<br>a” 27 20 ee |_| | yey} 1 tt et<br>YO ep te || | lgWil<br>1 1<br>Z a et\\\ | PF  Ze -2.5V eS<br>lap =*:... -2.5V ee SABE ee ee ll<br>≤ 60µs PULSE WIDTH ≤ 60µs PULSE WIDTH<br>Tj = 25°C Tj = 175°C<br>0.1 iilPeal aaa | 0.1 ntein een |<br>0.1 1 10 100 0.1 1 10 100<br>-VDS, Drain-to-Source Voltage (V) -VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics Fig 2.   Typical Output Characteristics<br>100.0 2.0<br>TJ = 25°CJ = 25°C= 25°C ID = -14A<br>a> TJ J  am = 175°C VGS = -10V ETL LLL<br>10.0 _ii aoe 1.5 EEL ELLA.Wa<br>1.0 ee 1.0 LAE<br>ff V = -25V LLL<br>DS<br>≤ 60µs PULSE WIDTH 60µs PULSE WIDTH<br>0.1<br>oli 0.5 TEEELE EEL EL<br>0.0 5.0 10.0 15.0<br>-60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>-VGS, Gate-to-Source Voltage (V)<br>TJ , Junction Temperature (°C)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>-ID, Drain-to-Source Current (A) -ID, Drain-to-Source Current (A)<br>)(Α(Α<br>-ID, Drain-to-Source Current<br>**----- End of picture text -----**<br>


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100.0<br>TJ = 25°CJ = 25°C= 25°C<br>a> TJ J  am = 175°C<br>10.0 _ii aoe<br>1.0 ee<br>ff V = -25V<br>DS<br>≤ 60µs PULSE WIDTH 60µs PULSE WIDTH<br>0.1<br>oli<br>0.0 5.0 10.0 15.0<br>-VGS, Gate-to-Source Voltage (V)<br>Fig 3.   Typical Transfer Characteristics<br>10000<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED<br>C  = C<br>rss   gd<br>= Coss  = Cds + Cgd<br>1000 oon<br>Ciss<br>Coss<br>PI E Crss EH TI<br>100 Ee lll)<br>ee ee<br>a ee ee<br>| |<br>10<br>1 10 100<br>-VDS, Drain-to-Source Voltage (V)<br>C, Capacitance (pF)<br>)(Α(Α<br>-ID, Drain-to-Source Current<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

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20<br>I = -14A<br>D<br>VDS= -44V<br>16 VDS= -28V Ko<br>VDS= -11V<br>= —7a<br>12<br>8<br>ptwy AAe<br>4 Lf | FOR TEST CIRCUIT<br>SEE FIGURE 19<br>0 Aan<br>0 10 20 30 40 50<br> QG  Total Gate Charge (nC)<br>-VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs.Drain-to-Source Voltage 

**Fig 6.** Typical Gate Charge vs.Gate-to-Source Voltage 

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100.0<br>T = 175°C<br>J<br>A<br>10.0<br>ner ¢aneen<br>PRP<br>TJ = 25°C<br>1.0 ie<br>V = 0V<br>GS<br>|PPof tet |<br>0.1<br>0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0<br>-VSD, Source-to-Drain Voltage (V)<br>-ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Source-Drain Diode Forward Voltage 

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16<br>12<br>8 P ANEL<br>BNG<br>\<br>4<br>0<br>25 50 75 100 125 150 175<br>TJ , Junction Temperature (°C)<br>-ID  , Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

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1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>All<br>100<br>ASll<br>100µsec<br>fea eeseae<br>10<br>A TS TTC<br>1msec<br>Tc = 25°C<br>Tj = 175°C 10msec<br>Single Pulse<br>1 Trenre THTTH<br>1 10 100 1000<br>-VDS  , Drain-toSource Voltage (V)<br>Fig 8.   Maximum Safe Operating Area<br>2.5<br>2.0<br>aiaceSOT ID = -250µA TT<br>PEPE RAN<br>1.5<br>PEELING<br>TELL ELLR<br>1.0<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>-ID,  Drain-to-Source Current (A)<br>-VGS(th) Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 10.** Threshold Voltage vs. Temperature 

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10<br>D = 0.50 1 aSaee<br>1<br>0.20<br>0.10<br>0.05 R1 R1 R2 R2 R3R3 Ri (°C/W)    τi (sec)<br>0.1 0.02 τJ τJ τCτ 0.8737     0.000799<br>0.01 τ1τ1 τ2 τ2 τ3τ3 0.877       0.068578<br>T T T T T -— |<br>ee ee a ee ee Ci= Ciτi/Rii/Ri [| 2.089       2.593 |<br>0.01 ae TT<br>SINGLE PULSE Notes:<br>( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2<br>ALT P E 2. Peak Tj = P dm x Zthjc + Tc<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z thJC )<br>**----- End of picture text -----**<br>


**Fig 11.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

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1000<br>600<br>                 I<br>I = -14A D<br>D<br>TOP          -5.0A<br>500 800                 -5.6A<br>BOTTOM   -10A<br>400<br>Cw a CE<br>600<br>300<br>A EE<br>400 EL<br>200 T = 125°C<br>J<br>200<br>100<br>N EE |<br>T = 25°C<br>J<br>0 0 s s<br>4.0 6.0 8.0 10.0 25 50 75 100 125 150 175<br>-VGS, Gate-to-Source Voltage (V) Starting TJ, Junction Temperature (°C)<br>Fig 12.    On-Resistance Vs. Gate Voltage Fig 13.   Maximum Avalanche Energy Vs. Drain Current<br>1000<br>Allowed avalanche Current vs<br>avalanche  pulsewidth,  tav<br>100 Duty Cycle = Single Pulse assuming  ∆ Tj = 25°C due to<br>avalanche losses. Note: In no<br>case should Tj be allowed to<br>exceed Tjmax<br>0 .01<br>10<br>0.05<br>0.1 0<br>1<br>0.1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14.   Typical Avalanche Current Vs.Pulsewidth<br>Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>200 (For further info, see AN-1005 at www.irf.com)<br>TOP          Single Pulse                 1. Avalanche failures assumption:<br>BOTTOM   1% Duty Cycle   Purely a thermal phenomenon and failure occurs at a<br>160 ID = -10A     temperature far in excess of Tjmax. This is validated for<br>T C     every part type.<br>2. Safe operation in Avalanche is allowed as long asTjmax is<br>  not exceeded.<br>120<br>3. Equation below based on circuit and waveforms shown in<br>N NO   Figures 17a, 17b.<br>4. PD (ave) = Average power dissipation per single<br>80     avalanche pulse.<br>H EDSNCUREEE<br>5. BV = Rated breakdown voltage (1.3 factor accounts for<br>    voltage increase during avalanche).<br>40 6. Iav = Allowable avalanche current.<br>N E 7. ∆T = Allowable rise in junction temperature, not to exceed<br>    Tjmax (assumed as 25°C in Figure 14, 15).<br>0 L EEDS   tav = Average time in avalanche.<br>25 50 75 100 125 150 175   D = Duty cycle in avalanche =  tav ·f<br>  ZthJC(D, tav) = Transient thermal resistance, see figure 11)<br>Starting TJ , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = T/ ZthJCthJC<br>)Ω<br>RDS(on),  Drain-to -Source On Resistance (m<br>EAR , Avalanche Energy (mJ)<br>EAS, Single Pulse Avalanche Energy (mJ)<br>-Avalanche Current (A)<br>**----- End of picture text -----**<br>


**PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = T/ ZthJCthJC** 

**Iav = 2 T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav** 

**Fig 15.** Maximum Avalanche Energy Vs. Temperature 

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Driver Gate Drive<br>P.W.<br>D.U.T + Period — D = ——<br>+ P.W. Period<br>) [©)]    •  Circuit Layout Considerations ] V it GS=10V<br> •<br>| =] - LowGroundS'  PlaneInd<br> •   CurrentLow LeakageTransformerInductance ® D.U.T. ISD Waveform<br>+<br>= ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>00 ©) D.U.T. VDS Waveform Diode Recoverydv/dt \ ny<br>VDD<br>Re •  •   dv/dtDrivercontrolledsame typebyasRgD.U.T. DD + Re-AppliedVoltage Body Diode  Forward Drop<br>•   - Inducto<br>•<br>D.U.T. - Device Under Test Cc es ee<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" @ r<br>**----- End of picture text -----**<br>


## for P-Channel 

## **Fig 16.** 

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HEXFET ® Power MOSFETs<br>VDS L<br>Vpsy —<br>RG D.U.T il VDD Rp<br>IAS A<br>DRIVER<br>5 aeTF + Re VicS D.U.T.<br>tp 0.01Ω -<br>+<br>i -10V<br>Pulse Width ≤ 1  ys<br>Duty Factor ≤ 0.1 %<br>15V<br>Fig 17a. Unclamped Inductive Test Circuit Fig 18a. Switching Time Test<br>IAS<br>td(on)d(on) trr td(off)d(off)<br>VGSGS<br>| fo<br>\ 10% il a >| |+>\+>\\<br>90% JA<br>tp VDSDS<br>V(BR)DSS<br>Fig 17b. Unclamped Inductive Waveforms Fig 18b. Switching Time<br>Vds<br>L<br>VCC<br>DUT<br>0<br>Vgs(th)<br>1K<br>**----- End of picture text -----**<br>


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td(on)d(on) trr td(off)d(off) tf<br>VGSGS<br>| fo<br>10% il a >| |+>\+>\\<br>90% JA<br>VDSDS<br>Fig 18b. Switching Time Waveforms<br>Id<br>Vds<br>Vgs<br>Vgs(th)<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 19b** Gate Charge Waveform 

**Fig 19a.** Gate Charge Test Circuit 

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## TO-220 Full-Pak Package Outline 

Dimensions are shown in millimeters (inches) 

## TO-220 Full-Pak Part Marking Information 

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E XAMPL E : T H IS  IS  AN IR F I840G<br>WIT H  AS S E MB L Y<br>PAR T  NU MB E R<br>L OT  CODE  3432 INT E R NAT IONAL<br>AS S E MB L E D ON WW 24 1999 R E CT IF IE R IRF I840G<br>IN T H E  AS S E MB L Y L INE  "K " L OGO 924K<br> 34         32 DAT E  CODE<br>Note:   "P" in assembly line<br>position indicates "Lead-Free" AS S E MB L Y YE AR  9 =  1999<br>L OT  CODE WE E K  24<br>L INE  K<br>**----- End of picture text -----**<br>


## **TO-220 FullPak packages are not recommended for Surface Mount Application.** 

Repetitive rating;  pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 3.89mH, 

RG = 25Ω, IAS = -10A. Pulse width ≤ 400µs; duty cycle ≤ 2%. 

Rθ is measured at TJ of approximately 90°C. 

Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive avalanche information 

Data and specifications subject to change without notice. This product has been designed  for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 08/04 

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Note:  For the most current drawings please refer to the IR website at: http://www.irf.com/package/ 



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- [Supplier page](https://es.farnell.com/en-ES/infineon/irlib9343pbf/mosfet-p-to-220-isol/dp/9933867)
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