# Power MOSFET, N Channel, 40 V, 478 A, 800 µohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2986494RL/)

**URL**: https://novapart.co/products/IRL40SC209/power-mosfet-n-channel-40-v-478-a-800-ohm-to-263
**SKU**: IRL40SC209
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.9000
**Stock**: 500+
**Lead Time**: 64 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:478A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0006ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 7Pins |
| Channel Type | N Channel |
| Product Range | StrongIRFET |
| Qualification | - |
| Power Dissipation | 375W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 478A |
| Drain Source On State Resistance | 800µohm |
| Gate Source Threshold Voltage Max | 2.4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2986494RL/)

## ~~Cinfineon~~ 

## IR MOSFET Strong _IR_ FET™ IRL40SC209 ~~a~~ 

**Application** HEXFET[® ] Power MOSFET  Brushed Motor drive applications  BLDC Motor drive applications D **VDSS 40V** Battery powered circuits Battery powered circuits **RDS(on) typ. 0.6m**   Half-bridge and full-bridge topologies **max 0.8m**   Synchronous rectifier applications G  Resonant mode power supplies **ID (Silicon Limited) 478A**  S  OR-ing and redundant power switches  DC/DC and AC/DC converters ~~Ei==~~ **ID (Package Limited) 300A**  DC/AC Inverters D **Benefits**  Optimized for Logic Level Drive S S[S S ]  Improved  Gate, Avalanche and Dynamic dV/dt Ruggedness G[S S ]  Fully Characterized Capacitance and Avalanche SOA D2PAK-7Pin  Enhanced body diode dV/dt and dI/dt Capability IRL40SC209  Lead-Free*  RoHS Compliant, Halogen-Free **G D S** Gate Drain Source ~~=~~ **Standard Pack Base Part Number Package Type Orderable Part Number Form Quantity** IRL40SC209 D2PAK-7Pin Tape and Reel Left 800 IRL40SC209 

## **Application** 

- Brushed Motor drive applications 

- BLDC Motor drive applications 

- Battery powered circuits Battery powered circuits 

- Half-bridge and full-bridge topologies 

- Synchronous rectifier applications 

- Resonant mode power supplies 

- OR-ing and redundant power switches 

- DC/DC and AC/DC converters 

- DC/AC Inverters 

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5.0 500<br>ID = 100A Limited By  Package<br>4.0 400<br>ines MAL<br>3.0 WEEE 300 Pee<br>2.0 AEE ELL 200 PTT TN<br>TJ = 125°C<br>1.0 100<br>ATE {itt<br>TJ = 25°C<br>0.0 0<br>/HERREEEE EERE<br>2 4 6 8 10 12 14 16 18 20 25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>VGS, Gate -to -Source Voltage  (V)<br>)<br><br>RDS(on),  Drain-to -Source On Resistance (m<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 1.** Typical On-Resistance vs. Gate Voltage 

**Fig 2.** Maximum Drain Current vs. Case Temperature 

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IRL40SC209 

## **Absolute Maximum Rating** 

|**Symbol**|**Parameter**|**Max.**|**Max.**||**Units**|
|---|---|---|---|---|---|
|ID @TC= 25°C|Continuous Drain Current,VGS@10V(Silicon Limited)|478||||
|ID @TC= 100°C<br>ID @TC= 25°C|Continuous Drain Current,VGS @10V(Silicon Limited)<br>Continuous Drain Current,VGS @10V(Wire Bond Limited)|338<br>300|||A|
|IDM|Pulsed Drain Current|1200||||
|PD @TC= 25°C|Maximum Power Dissipation|375|||W|
||Linear DeratingFactor|2.5|||W/°C|
|VGS|Gate-to-Source Voltage|± 20|||V|
|TJ|Operating Junction and|||||
|TSTG|Storage Temperature Range|-55  to + 175|||°C|
||SolderingTemperature,for 10 seconds (1.6mm fromcase)|300||||
|**Avalanche Characteristics**||||||
|EAS (Thermally limited)<br>EAS(Thermallylimited)|SinglePulseAvalancheEnergy <br>Single Pulse Avalanche Energy|728<br>1404|||mJ|
|IAR<br>EAR|Avalanche Current<br>Repetitive Avalanche Energy|See Fig 15, 16, 23a, 23b||See Fig 15, 16, 23a, 23b|A<br>mJ|
|**Thermal Resistance**||||||
|**Symbol**|**Parameter**|**Typ.**||**Max.**|**Units**|
|RJC|Junction-to-Case|–––||0.4||
|RCS|Case-to-Sink,Flat Greased Surface|0.50||–––|°C/W|
|RJA|Junction-to-Ambient|–––||62||



**Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**<br>~~—————~~|**Parameter**<br>~~——————_—————~~|**Min.**<br>~~—_—————~~|**Typ. Max.**<br>~~—_—————~~|**Typ. Max.**<br>~~—_—————~~|**Units**<br>~~—_—————~~|**Conditions**<br>~~—_—————~~|
|---|---|---|---|---|---|---|
|V(BR)DSS<br>~~—————~~|Drain-to-Source Breakdown Voltage<br>~~——————_—————~~|40<br>~~—_—————~~|–––<br>~~—_—————~~|–––<br>~~—_—————~~|V<br>~~—_—————~~|VGS= 0V,ID= 250µA<br>~~—_—————~~|
|V(BR)DSS/TJ<br>~~—————~~<br>~~i~~|JBreakdown Voltage Temp. Coefficient<br>~~——————_—————~~<br>~~—~~|––– 0.031 –––<br>~~—_—————~~<br>~~—~~|––– 0.031 –––<br>~~—_—————~~<br>~~—~~|––– 0.031 –––<br>~~—_—————~~<br>~~—~~|V/°C<br>~~—_—————~~<br>~~———~~|Reference to 25°C,ID= 5mA<br>~~—_—————~~<br>~~———~~|
|RDS(on)<br>~~—————~~<br>~~i~~|Static Drain-to-Source On-Resistance<br>~~——————_—————~~<br>~~—~~|–––<br>~~—_—————~~<br>~~—~~|0.6<br>~~—_—————~~<br>~~—~~|0.8<br>~~—_—————~~<br>~~—~~|m<br>~~—_—————~~<br>~~———~~|VGS= 10V,ID= 100A<br>~~—_—————~~<br>~~———~~|
|||–––<br>~~—~~|0.8<br>~~—~~|1.1<br>~~—~~||VGS =4.5V, ID =50A<br>~~———~~|
|VGS(th)<br>~~i~~<br>~~=~~|GateThresholdVoltage<br>~~—~~<br>~~=~~|1.0<br>~~—~~<br>~~=~~|–––<br>~~—~~<br>~~=~~|2.4<br>~~— ~~<br>~~=~~|V<br> ~~———~~<br>~~=~~|VDS= VGS,ID= 250µA<br>~~———~~<br>~~=~~|
|GS(th)<br>IDSS<br>~~=~~|Drain-to-Source Leakage Current<br>~~=~~|–––<br>~~=~~|–––<br>~~=~~|1.0<br>~~=~~|µA<br>~~=~~|VDS =40 V, VGS =0V<br>~~=~~|
|||–––<br>~~=~~|–––<br>~~=~~|150<br>~~=~~||VDS= 40V,VGS=0V,TJ=125°C<br>~~=~~|
|IGSS<br>~~a~~<br>~~ee~~|Gate-to-Source Forward Leakage<br>~~a~~<br>~~———~~<br>|–––<br>~~a~~<br>~~———~~<br>|–––<br>~~a~~<br>~~———~~<br>|100<br>~~a~~<br>~~———~~<br>|nA<br>~~a~~<br>~~———~~<br><br>~~S(O~~|VGS= 20V<br>~~a~~<br>~~———~~<br>|
||Gate-to-Source Reverse Leakage<br>~~a~~<br>~~———~~<br>|–––<br>~~a~~<br>~~———~~<br><br>~~Is~~|–––<br>~~a~~<br>~~———~~<br><br>~~Is~~|-100<br>~~a~~<br>~~———~~<br><br>~~(I~~||VGS = -20V<br>~~a~~<br>~~———~~<br><br>~~S(O~~|
|RG<br>~~ee~~|Gate Resistance<br>~~———~~<br>~~nD~~|–––<br>~~———~~<br>~~nD~~<br>~~Is~~|2.1<br>~~———~~<br>~~nD~~<br>~~Is~~|–––<br>~~———~~<br>~~nD~~<br>~~(I~~|<br>~~———~~<br>~~nD~~<br>~~S(O~~|~~———~~<br>~~nD~~<br>~~S(O~~|



> Current imitations arising from heating of the device leads may occur with some  lead mounting arrangements. (Refer to AN-1140) 

- Repetitive rating;  pulse width limited by max. junction temperature. 

- Limited by TJmax, starting TJ = 25°C, L = 0.146mH, RG = 50, IAS = 100A, VGS =10V. 

- ISD  100A, di/dt  954A/µs, VDD  V(BR)DSS, TJ  175°C. 

- Pulse width  400µs; duty cycle  2%. 

- Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 

- Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. 

- R is measured at TJ approximately 90°C. 

-    Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 53A, VGS =10V. 

-    Pulse drain current is limited to 1200A by source bonding technology. 

- When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques 

- refer to application note #AN-994: http://www.infineon.com/technical-info/appnotes/an-994.pdf 

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IRL40SC209 

**Dynamic  Electrical Characteristics @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**<br>~~GO~~|**Parameter**<br>~~GO~~|**Min.**<br>~~GO~~|**Typ. **<br>~~GO~~|**Max. Units**<br>~~GO ~~|**Max. Units**<br> ~~OO~~|**Max. Units**<br>**Conditions**<br>~~OO~~|
|---|---|---|---|---|---|---|
|gfs<br>~~a~~<br>~~——————~~|Forward Transconductance<br>~~——————~~|244<br>~~——————~~|–––|–––|S<br>~~ee~~|VDS= 10V,ID= 100A<br>~~ee~~|
|Qg<br>~~a~~<br>~~——————~~|Total Gate Charge<br>~~——————~~|–––<br>~~——————~~|178|267|nC<br>~~ee~~|ID=  100A<br>VDS= 20V<br>VGS= 4.5V<br>~~ee~~|
|Qgs<br>~~a~~<br>~~a——————~~|Gate-to-Source Charge<br>~~——————~~|–––<br>~~——————~~|49|–––|||
|Qgd<br>~~——————~~|Gate-to-Drain Charge<br>~~——————~~|–––<br>~~——————~~|88|–––|||
|Qsync<br>~~——————~~<br>~~a~~|Total Gate Charge Sync.(Qg–Qgd)<br>~~——————~~|–––<br>~~——————~~|90|–––|||
|td(on)<br>~~——————~~<br>~~a~~|Turn-On DelayTime<br>~~——————~~|–––<br>~~——————~~|63|–––|ns<br>~~ee~~<br>|VDD= 20V<br>ID= 30A<br>RG= 2.7<br>VGS= 4.5V<br>~~ee~~<br>|
|tr<br>~~a~~<br>~~a~~|Rise Time<br>~~a~~|–––<br>~~a~~|182<br>~~a~~|–––<br>~~a~~|||
|td(off)|Turn-Off DelayTime|–––|182|–––|||
|tf<br>~~a~~<br>~~——<—~~|Fall Time<br><br>~~——<—~~|–––<br><br>~~——<—~~|138<br>|–––<br>|||
|Ciss<br>~~———~~<br>~~——<—~~|Input Capacitance<br>~~———~~<br>~~——<—~~|–––<br>~~———~~<br>~~——<—~~|15270<br>~~———~~|–––<br>~~———~~|pF<br> <br>|VGS= 0V<br>VDS= 25V<br>ƒ= 1.0MHz,  See Fig.7<br> ~~ee~~|
|Coss<br>~~———~~<br>~~a~~<br>~~——<—~~|Output Capacitance<br>~~———~~<br>~~——<—~~|–––<br>~~———~~<br>~~——<—~~|1960<br>~~———~~|–––<br>~~———~~|||
|Crss<br>~~———~~<br>~~a——<—~~|Reverse Transfer Capacitance<br>~~———~~<br>~~——<—~~|–––<br>~~———~~<br>~~——<—~~|1370<br>~~———~~|–––<br>~~——— ~~|||
|Coss eff.(ER)<br>~~——<—~~|Effective Output Capacitance (Energy Related)<br>~~——<—~~|–––<br>~~——<—~~|2305<br>~~GO~~|–––<br>~~GO~~||VGS= 0V, VDS = 0V to 32V<br>~~DO~~|
|Coss eff.(TR) <br>~~——<—~~<br>~~a~~|Output Capacitance(Time Related)<br>~~——<—~~<br>~~Ge~~|–––<br>~~——<—~~<br>~~Ge~~|2935<br>~~Ge~~<br>~~GO~~|–––<br>~~Ge~~<br>~~GO~~||VGS= 0V,VDS = 0V to 32V<br>~~DO~~|
|**Diode Characteristics**<br>~~——<—~~<br>~~GO DO~~<br>~~pO~~|||||||
|**Symbol**<br>~~pOer~~|**Parameter **<br>~~er~~|**Min.**|**Typ. **|**Max.**<br>~~ee~~|**Units**<br>~~ee~~|**Conditions**<br>~~ee~~|
|IS<br>~~pOer~~|Continuous Source Current<br>(Body Diode)<br>~~er~~|–––|–––|478<br>~~ee~~|A<br>~~ee~~<br>~~a~~|D<br>S<br>G<br>MOSFET symbol<br>showing  the<br>integral reverse<br>p-njunctiondiode.<br>~~ee~~<br>~~a=~~|
|ISM<br>~~er~~<br>~~a~~|Pulsed Source Current<br>(BodyDiode)<br>~~er~~<br>~~a~~|–––<br>~~a~~|–––<br>~~a~~|1200<br>~~ee~~<br>~~a~~|||
|VSD<br>~~er~~<br>~~a~~<br>~~pop~~|Diode Forward Voltage<br>~~er~~<br>~~a~~<br>~~pop~~|–––<br>~~a~~|–––<br>~~a~~<br>~~GG~~|1.2<br>~~ee~~<br>~~a~~<br>~~GG~~|V<br>~~ee~~<br>~~a~~<br>~~GG~~|TJ= 25°C,IS=100A,VGS= 0V<br>~~ee~~<br>~~a~~|
|dv/dt<br>~~a~~<br>~~pop~~|Peak Diode Recoverydv/dt<br>~~a~~<br>~~BG~~<br>~~pop~~|–––<br>~~a~~<br>~~BG~~|2.2<br>~~a~~<br>~~BG~~<br>~~GG~~|–––<br>~~a~~<br>~~BG~~<br>~~GG~~|V/ns T<br>~~a~~<br>~~BG~~<br>~~GG~~|V/ns TJ= 175°C,IS= 100A,VDS= 40V<br>~~a~~<br>~~BG~~|
|trr<br>~~pop~~|Reverse Recovery Time<br>~~pop~~|–––|51<br>~~GG~~|–––<br>~~GG~~|ns<br>~~GG~~|TJ =25°CVDD= 34V<br>TJ =125°CIF= 100A,<br>TJ =25°Cdi/dt = 100A/µs<br>TJ =125°C <br>TJ= 25°C|
|||–––<br>~~|~~|53<br>~~GG~~<br>~~|~~|–––<br>~~GG~~<br>~~|~~|||
|Qrr<br>~~pop~~<br>~~ce~~<br>~~a~~|Reverse Recovery Charge<br>~~pop~~<br>~~ce~~|–––<br>~~|~~<br>~~ce~~|79<br>~~GG~~<br>~~|~~<br>~~ce~~|–––<br>~~GG~~<br>~~|~~<br>~~ce~~|nC<br>~~GG~~<br>~~ce~~||
|||–––<br>~~ce~~<br>~~a~~|82<br>~~ce~~<br>~~ee~~|–––<br>~~ce~~|||
|IRRM<br>~~ce~~<br>~~a~~|Reverse Recovery Current<br>~~ce~~|–––<br>~~ce~~<br>~~a ~~|2.5<br>~~ce~~<br> ~~ee~~|–––<br>~~ce~~|A<br>~~ce~~||



3 ~~=~~ 

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IRL40SC209 ~~Sees~~ 

## ~~Cinfineon~~ 

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1000 1000<br>3.25V<br>3.25V<br>100 100<br>VGS VGS<br>TOP           15V TOP           15V<br>10V 10V<br>6.0V 5.0V 60µs PULSE WIDTH 6.0V 5.0V<br>60µs PULSE WIDTH 4.5V Tj = 175°C 4.5V<br>Tj = 25°C 4.0V 4.0V<br>3.5V 3.5V<br>BOTTOM 3.25V BOTTOM 3.25V<br>10 10<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 3.   Typical Output Characteristics  Fig 4.   Typical Output Characteristics<br>1000 2.2<br>ID = 100A<br>VGS = 10V<br>100 Ty 1.8 Cy<br>TJ = 175°C<br>10 TJ = 25 ° C 1.4<br>1 oeTH/igs 1.0 annea<br>VDS = 10V<br>60µs PULSE WIDTH<br>we) EREae<br>0.1 0.6<br>0 1 2 3 4 5 -60 -20 20 60 100 140 180<br>TJ , Junction Temperature (°C)<br>VGS, Gate-to-Source Voltage (V)<br>Fig 5.   Typical Transfer Characteristics  Fig 6.   Normalized On-Resistance vs. Temperature<br>1000000 VGS   = 0V,       f = 1 MHZ 14<br>Ciss   = Cgs + Cgd,  Cds SHORTED ID= 100A<br>100000 LC] CC rss  oss    = C= C ds gd  + C gd 1210 Fae VVDS DS = 32V= 20V<br>VDS= 8V<br>C iss 8<br>Hi<br>10000<br>60 Coss Et 6 ESS<br>Crss<br>TN 4 A<br>1000<br>2<br>100 0<br>0.1 CTT) 1 10 100 «= 0 eB 50 100 150 200 250 300 350 400 450<br>VDS, Drain-to-Source Voltage (V)  QG,  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


**Fig 4.** Typical Output Characteristics 

**Fig 6.** Normalized On-Resistance vs. Temperature 

**Fig 7.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 8.** Typical Gate Charge vs. Gate-to-Source Voltage 

2017-05-12 

4 

IRL40SC209 ~~__L~~ 

## ~~Cinfineon~~ 

**==> picture [214 x 201] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000 fFA<br>100<br>TJ = 175 ° C<br>TJ = 25°C<br>10<br>/ /<br>1 AL<br>V GS  = 0V<br>Cl<br>EelrGeeee<br>0.1<br>0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1<br>VSD, Source-to-Drain Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Typical Source-Drain Diode Forward Voltage 

**==> picture [209 x 209] intentionally omitted <==**

**----- Start of picture text -----**<br>
52<br>Id = 5.0mA<br>50<br>48<br>46<br>44<br>42<br>40<br>-60 -20 20 60 100 140 180<br>TJ , Temperature ( °C )<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


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OPERATION IN THIS AREA<br>LIMITED BY R DS (on)<br>1000<br>100µsec<br>riot tataguubct tt<br>100<br>Limited by Package<br>1msec<br>Soe<br>10<br>10msec<br>.<br>1 Tc = 25°C DC<br>Tj = 175°C<br>Single Pulse<br>PEN<br>0.1 N<br>0.1 1 10<br>VDS, Drain-toSource Voltage (V)<br>Fig 10.   Maximum Safe Operating Area<br>1.6<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>0.4<br>0.2<br>0.0<br>0 10 20 30 40<br>VDS, Drain-to-Source Voltage (V)<br>ID,  Drain-to-Source Current (A)<br>Energy (µJ)<br>**----- End of picture text -----**<br>


**Fig 11.** Drain-to-Source Breakdown Voltage 

**Fig 12.** Typical Coss Stored Energy 

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**----- Start of picture text -----**<br>
2.0<br>VGS = 3.5V<br>VGS = 4.5V<br>VGS = 6.0V<br>1.6 VGS = 8.0V<br>VGS = 10V<br>1.2<br>+ CE<br>=e<br>0.8<br>NY<br>a a —<br>0.4<br>0 50 100 150 200<br>ID, Drain Current (A)<br>)<br><br>m<br>RDS(on),  Drain-to -Source On Resistance (<br>**----- End of picture text -----**<br>


**Fig 13.** Typical On-Resistance vs. Drain Current 

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**----- Start of picture text -----**<br>
IRL40SC209<br>Gafineon La<br>1<br>D = 0.50<br>0.1<br>0.20<br>ass 0.10 Tn<br>0.05<br>0.01 Sf 0.02 enver enn<br>0.001 ieee emer 0.01 SINGLE PULSE UT AUT Ut<br>( THERMAL RESPONSE )<br>Notes:<br>1. Duty Factor D = t1/t2<br>2. Peak Tj = P dm x Zthjc + Tc<br>Ue a a ama<br>0.0001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 14.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>1000<br>1<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming Tj = 150°C and<br>Tstart = 25°C (Single Pulse)<br>Se |<br>100<br>10 i<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  j = 25°C and<br>Tstart = 150°C.<br>1 e ammaemmmmamae ea aniHiNienmaiaeeal<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>Avalanche Current (A)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


tav (sec) 

**Fig 15.** Avalanche Current vs. Pulse Width 

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800<br>TOP          Single Pulse<br>700 BOTTOM   1.0% Duty Cycle<br>ID = 100A<br>600 Nin a<br>NG<br>500<br>400 aN<br>TINT<br>300<br>NG<br>200<br>PTS<br>100<br>PTS<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.infineon.com)** 

1.Avalanche failures assumption: 

   - Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 23a, 23b. 

4. PD (ave) = Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6. Iav = Allowable avalanche current. 

7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). 

   - tav = Average time in avalanche. 

   - D = Duty cycle in avalanche =  tav ·f 

   - ZthJC(D, tav) = Transient thermal resistance, see Figures 14) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC 

      - Iav = 2T/ [1.3·BV·Zth] 

EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav= PD (ave)·tavD (ave)·tavtavav 

**Fig 16.** Maximum Avalanche Energy vs. Temperature EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav= PD (ave)·tavD (ave)·tavtavav 6 2017-05-12 ~~=~~ 

IRL40SC209 ~~_[LL]~~ 

## ~~Gafineon~~ 

**==> picture [504 x 202] intentionally omitted <==**

**----- Start of picture text -----**<br>
2.5 21<br>IF = 60A<br>18 V R  = 34V<br>2.0<br>TJ = 25°C<br>15 T J  = 125°C<br>1.5 Rn EG<br>12<br>9<br>1.0<br>TUN an<br>ID = 250µA<br>ID = 1.0mA 6<br>ID = 1.0A<br>0.5<br>3<br>0.0 be-all ALEELD 0 eaeT_T<br>-75 -25 25 75 125 175 0 200 400 600 800<br>TJ , Temperature ( °C ) diF /dt (A/µs)<br>IRRM (A)<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 17.** Threshold Voltage vs. Temperature 

**==> picture [209 x 201] intentionally omitted <==**

**----- Start of picture text -----**<br>
18<br>IF = 100A<br>15 VR = 34V<br>Ty.<br>TJ = 25°C<br>12 T J  = 125°C<br>me<br>|<br>9<br>6 | ge |<br>x | | |<br>3<br>0 Pt [| | |<br>0 200 400 600 800<br>diF /dt (A/µs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**Fig 18.** Typical Recovery Current vs. dif/dt 

**==> picture [214 x 200] intentionally omitted <==**

**----- Start of picture text -----**<br>
1500<br>IF = 60A<br>1250 VR = 34V<br>Ty<br>TJ = 25°C<br>1000 T J  = 125°C<br>anes<br>750 ry<br>500 |<br>250 fo<br>0 ae|<br>0 200 400 600 800<br>diF /dt (A/µs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


**Fig 19.** Typical Recovery Current vs. dif/dt 

**Fig 20.** Typical Stored Charge vs. dif/dt 

**==> picture [545 x 257] intentionally omitted <==**

**----- Start of picture text -----**<br>
1000<br>IF = 100A<br>VR = 34V<br>750 T J = 25°C<br>TJ = 125°C<br>500 | as<br>|<br>250<br>E4nn<br>0<br>0 200 400 600 800<br>diF /dt (A/µs)<br>Fig 21.   Typical Stored Charge vs. dif/dt<br>7  2017-05-12<br>=H<br>QRR (nC)<br>**----- End of picture text -----**<br>


~~Cinfir~~ 

IRL40SC209 ~~_~~ 

**Fig 22.** Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET[® ] Power MOSFETs 

**==> picture [157 x 90] intentionally omitted <==**

**----- Start of picture text -----**<br>
15V<br>VDS L DRIVER<br>R G D.U.T +<br>- [V][DD]<br>IAS<br>20V ae tp 0.01<br>JL<br>**----- End of picture text -----**<br>


**Fig 23a.** Unclamped Inductive Test Circuit 

**==> picture [182 x 106] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS<br>< tp ><br>IAS<br>**----- End of picture text -----**<br>


**Fig 23b.** Unclamped Inductive Waveforms 

**Fig 24a.** Switching Time Test Circuit 

**==> picture [21 x 8] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDD<br>**----- End of picture text -----**<br>


**Fig 24b.** Switching Time Waveforms 

**==> picture [172 x 117] intentionally omitted <==**

**----- Start of picture text -----**<br>
Id<br>Vds<br>Vgs<br>Vgs(th) ! |!<br>I ! \ ' !<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 25a.** Gate Charge Test Circuit 

**Fig 25b.** Gate Charge Waveform 

8 

2017-05-12 

IRL40SC209 ~~_LLL~~ 

**D[2] Pak - 7 Pin Package Outline** (Dimensions are shown in millimeters (inches)) 

## **D[2] Pak - 7 Pin Part Marking Information** 

**==> picture [87 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
PART NUMBER<br>**----- End of picture text -----**<br>


**==> picture [322 x 115] intentionally omitted <==**

**----- Start of picture text -----**<br>
INTERNATIONAL<br>P<br>RECTIFIER LOGO   F1324S-7P<br>aN<br>YWWP<br>~<br>17 89 DATE CODE<br>A<br>ASSEMBLY  Y = YEAR<br>LOT CODE W = WEEK<br>P =  LEADFREE<br>**----- End of picture text -----**<br>


9 

2017-05-12 

IRL40SC209 **Qualification Information** Industrial **Qualification Level** (per JEDEC JESD47F)[† ] MSL1 **Moisture Sensitivity Level** D2PAK-7Pin (per JEDEC J-STD-020D[†] ) **RoHS Compliant** Yes ~~—~~ † Applicable version of JEDEC standard at the time of product release. **Revision History Date Comments** ~~|~~ 05/12/2017  Corrected package picture added “s” on pin number 4 - page 1. **Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved.** 

## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 

10 

2017-05-12 



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- [Supplier page](https://es.farnell.com/infineon/irl40sc209/mosfet-n-ch-40v-478a-375w-to-263/dp/2986494RL)
---

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