# Power MOSFET, N Channel, 150 V, 21 A, 0.042 ohm, TO-251AA, Through Hole

![Product image](https://novapart.co/image/farnell:1698297/)

**URL**: https://novapart.co/products/IRFU4615PBF/power-mosfet-n-channel-150-v-21-a-0042-ohm-to
**SKU**: IRFU4615PBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.8300
**Stock**: 1000+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:21A; Drain Source Voltage Vds:150V; On Resistance Rds(on):0.034ohm; Rds(o; Available until stocks are exhausted Alternative available

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (21-Jan-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 144W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-251AA |
| Drain Source Voltage Vds | 150V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 21A |
| Drain Source On State Resistance | 0.042ohm |
| Gate Source Threshold Voltage Max | 5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:1698297/)

HEXFET ® Power MOSFET **Applications** D **VDSS 150V** ~~°~~ High Efficiency Synchronous Rectification in SMPS **RDS(on)   typ. 34m** Uninterruptible Power Supply G **max. 42m** ~~:~~ High Speed Power Switching[Q] Hard Switched and High Frequency Circuits **ID 33A** S 

## **Applications** 

## **Benefits** 

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability Lead-Free 

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D D<br>S<br>S D<br>G G<br>DPak IPAK<br>IRFR4615PbF IRFU4615PbF<br>**----- End of picture text -----**<br>


|**G**|**D**|**S**|
|---|---|---|
|Gate|Drain|Source|



|**Form**<br>**Quantity**<br>**Base Part  Number**<br>**Package Type**<br>**Standard Pack**<br>**Orderable Part Number**|
|---|
|IRFR4615PbF<br>Tube/Bulk<br>75<br>IRFR4615PbF|
|IRFR4615TRLPbF<br>Tape and Reel Left<br>3000<br>IRFR4615TRLPbF<br>D-PAK|
|IRFU4615PbF<br>I-PAK<br>Tube/Bulk<br>75<br>IRFU4615PbF|
|**Absolute Maximum Ratings**|
|**Symbol**<br>**Parameter**<br>**Units**<br>**Max.**|
|ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V<br>ID@ TC= 100°C<br>Continuous Drain Current, VGS@ 10V<br>IDM<br>Pulsed Drain Current<br>PD@TC= 25°C<br>Maximum Power Dissipation<br>W<br>33<br>24<br>140<br>A<br>144<br>~~nD~~<br>~~nD~~<br>~~———~~<br>~~en~~<br>~~nD~~|
|Linear DeratingFactor<br>W/°C<br>VGS<br>Gate-to-Source Voltage<br>V<br>dv/dt<br>Peak Diode Recovery<br>V/ns<br>0.96<br>38<br>± 20<br>~~nD~~<br>~~nD~~<br>~~Pee~~|
|TJ<br>Operating Junction and<br>TSTG<br>Storage Temperature Range<br>Soldering Temperature, for 10 seconds<br>(1.6mm from case)<br>**Avalanche Characteristics**<br>EAS(Thermallylimited)<br>Single Pulse Avalanche Energy<br>mJ<br>IAR<br>Avalanche Current<br>A<br>EAR<br>Repetitive Avalanche Energy<br>mJ<br>300<br>°C<br>109<br>See Fig. 14, 15, 22a, 22b,<br>-55  to + 175<br>~~ie~~<br>~~a~~|
|**Thermal Resistance**|
|**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**|
|RθJC<br>Junction-to-Case<br>–––<br>1.045<br>RθJA<br>Junction-to-Ambient(PCB Mount)<br>–––<br>50<br>°C/W<br>~~Po~~<br>~~Oeeeeeeeaeseaesesa~~<br>~~ae~~<br>~~oe)~~|
|RθJA<br>Junction-to-Ambient<br>–––<br>110<br>~~sn~~|
|Notes<br>hrough<br>are on page 11<br>oO)|



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**Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**|**Parameter**|**Min. **|**Min. **|**Typ. **|**Max. **|**Units**|**Units**|**Conditions**||
|---|---|---|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-to-Source Breakdown Voltage||150|–––|–––|V||VGS= 0V, ID= 250μA||
|ΔV(BR)DSS/ΔTJ|Breakdown Voltage Temp. Coefficient||–––|0.19|–––|V/°C||Reference to 25°C, ID= 5mA�||
|RDS(on)|Static Drain-to-Source On-Resistance||–––|34|42|mΩ||VGS= 10V, ID= 21A�||
|VGS(th)|Gate Threshold Voltage||3.0|–––|5.0|V||VDS= VGS, ID= 100μA||
|IDSS|Drain-to-Source Leakage Current||–––<br>–––|–––<br>–––|20<br>250|μA||VDS= 150V, VGS= 0V<br>VDS= 150V, VGS= 0V, TJ= 125°C||
|IGSS|Gate-to-Source Forward Leakage<br>Gate-to-Source Reverse Leakage||–––<br>–––|–––<br>–––|100<br>-100|nA||VGS= 20V<br>VGS= -20V||
|RG(int)|Internal Gate Resistance||–––|2.7|–––|Ω||||
|**Dynamic @ TJ = 25°C (unless otherwise specified)**||||||||||
|**Symbol**|**Parameter**|**Min. **||**Typ. **|**Max. **|**Units**||**Conditions**||
|gfs|Forward Transconductance||35|–––|–––|S||VDS= 50V, ID= 21A||
|Qg|Total Gate Charge||–––|26||||ID= 21A||
|Qgs<br>Qgd|Gate-to-Source Charge<br>Gate-to-Drain("Miller")Charge||–––<br>–––|8.6<br>9.0|–––<br>–––|nC||VGS= 10V�<br>VDS= 75V||
|Qsync|Total Gate Charge Sync. (Qg- Qgd)||–––|17|–––|||ID= 21A, VDS=0V, VGS= 10V||
|td(on)|Turn-On DelayTime||–––|15|–––|||VDD= 98V||
|tr|Rise Time||–––|35|–––|||ID= 21A||
|td(off)|Turn-Off DelayTime||–––|25|–––|ns||RG= 7.3Ω||
|tf|Fall Time||–––|20|–––|||VGS= 10V�||
|Ciss|Input Capacitance||–––|1750|–––|||VGS= 0V||
|Coss|Output Capacitance||–––|155|–––|||VDS= 50V||
|Crss|Reverse Transfer Capacitance||–––|40|–––|pF||ƒ= 1.0MHz(See Fig.5)||
|Cosseff. (ER)|Effective Output Capacitance(EnergyRelated)�|�|–––|179|–––|||VGS= 0V, VDS= 0V to 120V�(See Fig.11)||
|Cosseff. (TR)|Effective Output Capacitance(Time Related)�||–––|382|–––|||VGS= 0V, VDS= 0V to 120V�||



## **Diode Characteristics** 

|**Symbol**|**Parameter**|**Min. **|**Typ. **|**Max. **|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|IS|Continuous Source Current<br>(BodyDiode)|–––|–––|33|A|S<br>D<br>G<br>integral reverse<br>p-njunction diode.<br>MOSFET symbol<br>showing  the|
|ISM|Pulsed Source Current<br>(BodyDiode)��|–––|–––|140|||
|VSD|Diode Forward Voltage|–––|–––|1.3|V|TJ= 25°C, IS= 21A, VGS= 0V�|
|trr|Reverse Recovery Time|–––|70|–––|ns|TJ= 25°C<br>VR= 100V,<br>TJ= 125°C<br>IF= 21A<br>TJ= 25°C<br>di/dt = 100A/μs�<br>TJ= 125°C<br>TJ= 25°C|
|||–––|83|–––|||
|Qrr|Reverse Recovery Charge|–––|177|–––|nC||
|||–––|247|–––|||
|IRRM|Reverse RecoveryCurrent|–––|4.9|–––|A||
|ton|Forward Turn-On Time|Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)|||||



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1000<br>VGS<br>TOP           15V<br>12V<br>100 10V<br>8.0V<br>7.0V<br>6.0V<br>5.5V<br>10 BOTTOM 5.0V<br>ee neen nail<br>1<br>pe nel<br>5.0V<br>0.1<br>≤ 60μs PULSE WIDTH<br>Tj = 25°C<br>0.01 SSS So<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics<br>1000<br>Py tT cP dT dT<br>100 oo<br>TJ = 175°C<br>a 4S ==<br>a) a<br>T J  = 25°C<br>10 Ft ff ft<br>en ee ee ee eee ee<br>1<br>Ato<br>VDS = 50V<br>≤ 60μs PULSE WIDTH<br>0.1 rTPETEAttpe FE<br>2 4 6 8 10 12 14 16<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 3.** Typical Transfer Characteristics 

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1000<br>VGS<br>TOP           15V<br>12V<br>10V<br>8.0V<br>100 7.0V<br>6.0V<br>5.5V<br>BOTTOM 5.0V<br>10<br>===> A aa eee<br>5.0V<br>ee oti eeeee<br>1<br>≤ 60μs PULSE WIDTH<br>Tj = 175°C<br>0.1 ir nail!<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>3.0<br>I D  = 21A<br>PITTI Ly<br>VGS = 10V<br>2.5<br>FILPLTITTIITALAL<br>2.0 FELELLLT WT!<br>1.5<br>1.0 PLETE<br>0.5 CERTPZanne EEEEEE<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

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100000 14.0<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED ID= 21A<br>C  = C 12.0<br>rss   gd<br>C = C + C VDS= 120V<br>10000 oss   ds  gd<br>10.0 VDS= 75V<br>VDS= 30V<br>re Ciss 8.0 Gf<br>1000<br>C<br>oss 6.0<br>C<br>SIP rss 4.0 Yi<br>100<br>tt tt<br>2.0<br>10 r+enTELEmLLT| 0.0 J) i |) i]t<br>1 10 100 1000 0 5 10 15 20 25 30 35<br>VDS, Drain-to-Source Voltage (V)  QG,  Total Gate Charge (nC)<br>C, Capacitance (pF)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>100<br>a 4A<br>T = 175°C<br>J<br>T = 25°C<br>J<br>10 P| ff | |<br>ff<br>V GS  = 0V<br>1.0 ae<br>0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6<br>VSD, Source-to-Drain Voltage (V)<br>Fig 7.   Typical Source-Drain Diode<br>Forward Voltage<br>40<br>35<br>| [| | | | ft<br>ST<br>30<br>TSO TT<br>25<br>a PN<br>20<br>15 Po oeeNeeTK<br>TN<br>10<br>PTT<br>5<br>0 Ft | | | LN<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ISD, Reverse Drain Current (A)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

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3.0<br>2.5 TTT<br>2.0 LEE LLELIE<br>1.5 PA,<br>1.0 P} TL | fy La]ff<br>y<br>0.5<br>0.0 Leata<br>-20 0 20 40 60 80 100 120 140 160<br>VDS, Drain-to-Source Voltage (V)<br>Energy (μJ)<br>**----- End of picture text -----**<br>


**Fig 11.** Typical COSS Stored Energy 

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1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>100<br>100μsec<br>1msec<br>PA eA<br>10<br>10msec<br>EHH DC REE<br>1 I<br>Tc = 25°C<br>Tj = 175°C<br>Single Pulse<br>0.1 aaa tig mail<br>1 10 100 1000<br>VDS, Drain-to-Source Voltage (V)<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 8.** Maximum Safe Operating Area 

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190<br>Id = 5mA<br>185<br>180 PC<br>SEREE748<br>175<br>PLE TELL IL MLL<br>170<br>EERE Ae<br>165<br>160 COATPTT TM TTT TT<br>155<br>PAE<br>150<br>OEE<br>145140 PA L LELELELELTL ELELT<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 10.** Drain-to-Source Breakdown Voltage 

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500<br>450 I D<br>coe TOP          2.8A<br>400 5.3A<br>BOTTOM 21A<br>350 NER<br>ACCEPT<br>300<br>AEE<br>250<br>200<br>ERNEWERNER EEE<br>150 PSR<br>100<br>50 SAR|  Jf<br>COCLE ESS<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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10<br>1<br>D = 0.50<br>0.20<br>0.1 0.020.010.050.10 τ J τ J τ 1 τ 1 R1 R1 τ 2 τ R 2 2 R2 R τ 33 R τ 33 τ R4 τ 4 R4 4 τ C τ Ri ( 0.02324    0.0000080.26212    0.0001060.50102    0.001115 °C/W)     τ i (sec)<br>0.01 Ci=  τ i / Ri 0.25880    0.005407<br>Ci i / Ri<br>Notes:<br>SINGLE PULSE<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>100<br>Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  Δ Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>0.01<br>10<br>0.05<br>0.10<br>1<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  ΔΤ j = 25°C and<br>Tstart = 150°C.<br>0.1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14.   Typical Avalanche Current vs.Pulsewidth<br>120 Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse                 (For further info, see AN-1005 at www.irf.com)<br>BOTTOM   1.0% Duty Cycle 1. Avalanche failures assumption:<br>100 I D  = 21A Purely a thermal phenomenon and failure occurs at a temperature far in<br>excess of Tjmax. This is validated for every part type.<br>2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.jmax is not exceeded. is not exceeded.<br>80<br>3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.<br>4. PD (ave) = Average power dissipation per single avalanche pulse.<br>60 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>during avalanche).<br>6. Iav = Allowable avalanche current.<br>40 7.  Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed asjmax (assumed as(assumed as<br>25°C in Figure 14, 15).<br>tav = Average time in avalanche.<br>20 D = Duty cycle in avalanche =  tav ·f<br>ZthJC(D, tav) = Transient thermal resistance, see Figures 13)<br>0<br>PD (ave) = 1/2 ( 1.3·BV·Iav) = � T/ ZthJC<br>25 50 75 100 125 150 175 Iav = 2 � T/ [1.3·BV·Zth]<br>Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tav<br>EAR , Avalanche Energy (mJ)<br>Thermal Response ( Z thJC ) °C/W<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.jmax is not exceeded. is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed asjmax (assumed as(assumed as 25°C in Figure 14, 15). 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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6.0 a ee ee ee ee ee ee<br>5.5 )oe| eeFe.ee fteetT fteefteeftee<br>5.0 eeseee ee ee ee ee<br>4.5 BSNP| RSSeee<br>4.0<br>Br. See ee<br>Pf | | ASR] UK LE<br>3.5 = a eV<br>3.0 = I I DD  = 100μA = 250uA AWAZ NAINA<br>|| AY | NAA<br>2.5 — ID = 1.0mAID = 1.0A rT<br>2.0 | | Jf Jf f[ [| | | | TN<br>1.5 ee ee ee eee ee ee<br>1.0 eeee eee ee<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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35<br>IF = 21A<br>¢<br>30 V R  = 100V P| |<br>TJ = 25°C<br>25<br>TJ = 125°C<br>20 | HoeAT<br>15<br>P| et ZO|<br>Pit ZO | |<br>10<br>A z | | |<br>5<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


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30<br>IF = 14A<br>25 V R  = 100V o”<br>TJ = 25°C “LA<br>T  = 125°C my<br>20 J aA<br>> Ga<br>o<br>‘4<br>15<br>10 S|<br>V4<br>5<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>Fig. 17 - Typical Recovery Current vs. di;/dt<br>800<br>IF = 14A<br>eo<br>700 V R  = 100V re<br>TJ = 25°C<br>600<br>TJ = 125°C<br>500 nwmua¢<br>400<br>Pt ee f<br>PL ‘<br>300<br>tT eo AT tt |<br>200<br>100<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>QRR (A)<br>**----- End of picture text -----**<br>


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1000<br>IF = 21A<br>900 | | | le<br>VR = 100V ¢<br>ee<br>800 T  = 25°C<br>J<br>700 T J  = 125°C | [ot]<br>600 | [tO]<br>500 P| P|<br>400<br>|tA+ |<br>300 m2 ae<br>pe<br>200 | |<br>100<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (A)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + { P.W. + Period ——— + D = —— Period<br>VGS=10<br>)    •  | t<br>p— ©) - Circuit  •  •   GroundCurrentLow Layout Leakage laneTransformer ConsiderationsInductance @ D.U.T. ISD Waveform t<br>+<br>= ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 > VDD<br>ma<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re (A •   dv/dt controlled by Rg Vp p -<br>•<br>D.U.T. - Device Under Test SCO |<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" @\ t<br>* Vg = 5V for Logic Level Devices<br>Fig 21.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V << tp -—><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>¢ 2V0VGS dt<br>tp 0.01 Ω IAS<br> Unclamped Inductive Test Circuit Fig 22b.   Unclamped Inductive Waveforms<br>Rp<br>VDSDS<br>90%<br>Ves D.U.T. I<br>+<br>- Vop<br>i Ves 10%<br>Pulse Width ≤ 1  ys VGSGS |l KSSp<br>Duty Factor ≤ 0.1 % l v l > | p l<br>td(on)d(on) trr td(off)d(off)<br>  Switching Time Test Circuit Fig 23b.   Switching Time Waveforms<br>Current Regulator Id<br>Same Type as D.U.T. Vds<br>50K Ω Vgs<br>! 12V .2 μ F .3 μ F ||| i<br>+<br>D.U.T. -VDSVDSDS<br>Vgs(th)<br>VGSGS<br>3mA<br>IGG IDD<br>Current Resistors Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 22b.** Unclamped Inductive Waveforms 

**Fig 22a.** Unclamped Inductive Test Circuit 

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VDSDS<br>90%<br>I<br>10% /\<br>VGSGS |l v l > | KSSp l<br>td(on)d(on) trr td(off)d(off) tf<br>**----- End of picture text -----**<br>


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Fig 23a.   Switching Time Test Circuit<br>**----- End of picture text -----**<br>


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Current Regulator<br>Same Type as D.U.T.<br>50K Ω<br>12V .2 μ F<br>.3 μ F |||<br>+<br>D.U.T. -VDSVDSDS<br>VGSGS<br>3mA<br>IGG IDD<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


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Fig 24a.   Gate Charge Test Circuit<br>**----- End of picture text -----**<br>


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Fig 24b. Gate Charge Waveform<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
EXAMPLE: THIS IS AN IRFR120<br>PART NUMBER<br>WITH ASSEMBLY<br>INTERNATIONAL<br>LOT CODE 1234 RECTIFIER IRFR120 DATE CODE<br>ASSEMBLED ON WW 16, 2001 LOGO 116A YEAR 1 =  2001<br>IN THE ASSEMBLY LINE "A" 12 34 WEEK 16<br>|<br>LINE A<br>Note: "P" in assembly line position ASSEMBLY eat<br>indicates "Lead-Free" LOT CODE<br>"P" in assembly line position indicates<br>"Lead-Free" qualification to the consumer-level<br>PART NUMBER<br>INTERNATIONAL ><br>OR DATE CODE<br>RECTIFIER IRFR120 P =  DESIGNATES LEAD-FREE<br>LOGO TOR Piss PRODUCT (OPTIONAL)<br>12 34<br>P =  DESIGNATES LEAD-FREE<br>PRODUCT QUALIFIED TO THE<br>ASSEMBLY<br>LOT CODE | CONSUMER LEVEL (OPTIONAL)<br>YEAR 1 =  2001<br>WEEK 16<br>A =  ASSEMBLY SITE CODE<br>**----- End of picture text -----**<br>


## **Note: For the most current drawing please refer to IR website at http://www.irf.com/package/** 

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**----- Start of picture text -----**<br>
EXAMPLE: THIS IS AN IRFU120 PART NUMBER<br>INTERNATIONAL GN<br>WITH ASSEMBLY<br>LOT CODE 5678 RECTIFIER IRFU120 DATE CODE<br>LOGO 119A YEAR 1 =  2001<br>ASSEMBLED ON WW 19, 2001<br>56 78 WEEK 19<br>IN THE ASSEMBLY LINE "A"<br>LINE A<br>ASSEMBLY<br>LOT CODE<br>Note: "P" in assembly line position<br>indicates Lead-Free"<br>OR<br>PART NUMBER<br>INTERNATIONAL GN<br>RECTIFIER IRFU120 DATE CODE<br>LOGO P =  DESIGNATES LEAD-FREE<br>56 78 PRODUCT (OPTIONAL)<br>YEAR 1 =  2001<br>ASSEMBLY<br>LOT CODE WEEK 19<br>A =  ASSEMBLY SITE CODE<br>**----- End of picture text -----**<br>


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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
TR TRR TRL<br>Sooo © © oo Oo © :<br>16.3 ( .641 ) 16.3 ( .641 )<br>15.7 ( .619 ) 15.7 ( .619 )<br>12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 ) FEED DIRECTION<br>11.9 ( .469 ) 7.9 ( .312 )<br>NOTES :<br>1.  CONTROLLING DIMENSION : MILLIMETER.<br>2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).<br>3.  OUTLINE CONFORMS TO EIA-481 & EIA-541.<br>  13 INCH<br>DQ C Q S 7) :<br>16 mm =|<br>NOTES :<br>1. OUTLINE CONFORMS TO EIA-481.<br>**----- End of picture text -----**<br>


NOTES : 

1.  CONTROLLING DIMENSION : MILLIMETER. 

2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 

3.  OUTLINE CONFORMS TO EIA-481 & EIA-541. 

**Note: For the most current drawing please refer to IR website at http://www.irf.com/package/** 

## **Qualification Information†** 

|**Qualification Information†**<br>**†**|||
|---|---|---|
|Qualification level|Industrial<br>(per JEDEC JESD47F††guidelines)||
|Moisture Sensitivity Level|D-PAK|MSL1|
|||(per JEDEC J-STD-020D††)|
||I-PAK|Not applicable|
|RoHS Compliant|Yes||



† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability †† Applicable version of JEDEC standard at the time of product release. 

Notes: ® Repetitive rating;  pulse width limited by max. junction ® Coss eff. (TR) is a fixed capacitance that gives the same charging time temperature. as Coss while VDS is rising from 0 to 80% VDSS. 

- ® Limited by TJmax, starting TJ = 25°C, L = 0.51mH © Coss eff. (ER) is a fixed capacitance that gives the same energy as RG = 25 Ω , IAS = 21A, VGS =10V. Part not recommended for use Coss while VDS is rising from 0 to 80% VDSS. above this value . @ When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom 

      - @ When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom mended footprint and soldering techniques refer to application note #AN-994 

   - ISD ≤ 21A, di/dt ≤ 549A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. Pulse width ≤ 400μs; duty cycle ≤ 2%. 

- θ 

|**Revision History**||
|---|---|
|**Date**<br>**Revision History**|**Comments**|
|5/16/2013|•Updated datasheet to new IR corporate formatting template<br>•Updated Orderable  part number from"IRFR4615TRPbF"to"IRFR4615TRLPbF", on page 1|



**IR WORLD HEADQUARTERS:** 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 

## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . 

With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( **www.infineon.com** ). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 



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---

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