# Power MOSFET, N Channel, 100 V, 56 A, 0.0139 ohm, TO-251AA, Through Hole

![Product image](https://novapart.co/image/farnell:3155149/)

**URL**: https://novapart.co/products/IRFU4510PBF/power-mosfet-n-channel-100-v-56-a-00139-ohm-to
**SKU**: IRFU4510PBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.4200
**Stock**: 500+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:56A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.; Available until stocks are exhausted Alternative available

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (21-Jan-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Qualification | - |
| Power Dissipation | 143W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-251AA |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 56A |
| Drain Source On State Resistance | 0.0139ohm |
| Gate Source Threshold Voltage Max | 3V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3155149/)

97784 

## IRFR4510PbF IRFU4510PbF 

HEXFET ® Power MOSFET 

## **Applications** 

High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits 

|||||HEXFET|HEXFET<br>Power MOSFET<br>®|Power MOSFET|
|---|---|---|---|---|---|---|
|||D||**VDSS**||**100V**|
|||||**RDS(on)   typ.**|**typ.**|**11.1m**|
|G||||**m**<br>**ID (Silicon Limited)**|**max.**<br>**D (Silicon Limited)**|**13.9m**<br>**63A**|
|||S||**ID (Package Limited)**||**56A**|



## **Benefits** 

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

> e Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability Lead-Free 

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D<br>D<br>eS %<br>S ‘ D S<br>G G<br>DPak IPAK<br>IRFR4510PbF IRFU4510PbF<br>**----- End of picture text -----**<br>


|**G**|**D**|**S**|
|---|---|---|
|Gate|Drain|Source|



## **Absolute Maximum Ratings** 

|**Absolute Maximum Ratings**|**Absolute Maximum Ratings**|**Absolute Maximum Ratings**|**Absolute Maximum Ratings**|
|---|---|---|---|
|**Symbol**<br>**Parameter**<br>**Units**<br>ID@ TC= 25°C<br>Continuous Drain Current,VGS @ 10V(Silicon Limited)<br>**Max.**<br>63<br>~~CG~~<br>~~sO~~||||
|ID@ TC= 100°C<br>Continuous Drain Current,VGS@ 10V(Silicon Limited)<br>ID@ TC= 25°C<br>Continuous Drain Current,VGS@ 10V(Package Limited)<br>45<br>56<br>~~sO~~<br>~~CO~~|||A|
|IDM<br>Pulsed Drain Current<br>252<br>~~©~~||||
|PD@TC= 25°C<br>Maximum Power Dissipation<br>143<br>~~a~~|||W|
|Linear DeratingFactor<br>0.95<br>~~a~~|||W/°C|
|VGS<br>Gate-to-Source Voltage<br>± 20<br>~~a~~|||V|
|TJ<br>Operating Junction and<br>-55  to + 175||||
|TSTG<br>Storage Temperature Range|||°C|
|Soldering Temperature, for 10 seconds<br>300||||
|(1.6mm from case)||||
|**Avalanche Characteristics**||||
|EAS (Thermally limited)<br>Single Pulse Avalanche Energy<br>IAR<br>Avalanche Current<br>EAR<br>Repetitive Avalanche Energy<br>127<br>See Fig. 14, 15, 22a, 22b<br>2)<br>~~**a**~~|~~_~~|~~_|~~|mJ<br>A<br>mJ<br>~~|~~|
|**Thermal Resistance**||||
|**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**|||**Units**|
|RJC<br>Junction-to-Case<br>–––<br>1.05<br>RJA<br>Junction-to-Ambient(PCB Mount)<br>–––<br>50<br>°C/W<br>~~a~~<br>~~©~~<br>~~a~~||||
|RJA<br>Junction-to-Ambient<br>–––<br>110<br>~~a~~||||



> Notes ® hrough are on page 11 www.irf.com 

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05/02/12 

**Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**<br>**Parameter**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>V(BR)DSS<br>Drain-to-Source Breakdown Voltage<br>100<br>–––<br>–––<br>V<br>V(BR)DSS/TJ<br>Breakdown Voltage Temp. Coefficient<br>–––<br>0.10<br>–––<br>V/°C<br>RDS(on)<br>Static Drain-to-Source On-Resistance<br>–––<br>11.1<br>13.9<br>m<br>VGS(th)<br>Gate Threshold Voltage<br>2.0<br>3.0<br>4.0<br>V<br>IDSS<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>–––<br>–––<br>250<br>**Conditions**<br>VGS= 0V,ID= 250μA<br>Reference to 25°C,ID= 5mA<br>VGS= 10V,ID= 38A<br>VDS= VGS,ID= 100μA<br>VDS= 100V,VGS= 0V<br>VDS= 100V,VGS= 0V,TJ= 125°C<br>μA<br>~~esa~~<br>~~GO GO~~<br>~~RsGQ~~<br>~~eseG~~<br>~~GGG~~<br>~~©~~<br>~~es~~<br>~~**GO**~~<br>~~GG~~<br>~~©~~<br>~~es~~<br>~~GO (~~<br>~~a~~<br>~~EL~~|
|---|
|IGSS<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>RG(int)<br>Internal Gate Resistance<br>–––<br>0.61<br>–––<br><br>VGS= 20V<br>VGS= -20V<br>nA<br>~~—————~~<br>~~a~~<br>~~ee ee~~<br>~~es~~<br>~~GO~~<br>~~GO (~~|
|**Dynamic @ TJ = 25°C(unless otherwise specified)**|
|**Symbol**<br>**Parameter**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>gfs<br>Forward Transconductance<br>62<br>–––<br>–––<br>S<br>Qg<br>Total Gate Charge<br>–––<br>54<br>81<br>Qgs<br>Gate-to-Source Charge<br>–––<br>14<br>–––<br>Qgd<br>Gate-to-Drain("Miller")Charge<br>–––<br>15<br>–––<br>Qsync<br>Total Gate Charge Sync.(Qg-Qgd)<br>–––<br>39<br>–––<br>td(on)<br>Turn-On DelayTime<br>–––<br>18<br>–––<br>tr<br>Rise Time<br>–––<br>42<br>–––<br>td(off)<br>Turn-Off DelayTime<br>–––<br>42<br>–––<br>tf<br>Fall Time<br>–––<br>34<br>–––<br>Ciss<br>Input Capacitance<br>–––<br>3031<br>–––<br>Coss<br>Output Capacitance<br>–––<br>213<br>–––<br>Crss<br>Reverse Transfer Capacitance<br>–––<br>104<br>–––<br>Cosseff.(ER)<br>Effective Output Capacitance(EnergyRelated)<br>–––<br>255<br>–––<br>Cosseff.(TR)<br>Effective Output Capacitance(Time Related)<br>–––<br>478<br>–––<br>**Conditions**<br>VDS= 25V,ID= 38A<br>ID= 38A<br>RG= 7.5<br>VGS= 10V<br>VDD= 65V<br>VDS= 50V<br>VGS= 10V<br>VGS= 0V<br>VDS= 50V<br>ƒ= 1.0MHz<br>VGS= 0V,VDS= 0V to 80V<br>VGS= 0V,VDS= 0V to 80V<br>ID= 38A,VDS=0V,VGS= 10V<br>ns<br>pF<br>nC<br>ID= 38A<br>~~esa~~<br>~~GQ QO~~<br>~~a~~<br>~~Ps~~<br>~~es~~<br>~~esee~~<br>~~®~~<br>~~es~~<br>~~PT~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~)~~<br>~~es~~<br>~~es~~<br>~~Rs~~<br>~~Ps~~<br>~~es~~|



## **Diode Characteristics** 

|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|IS|Continuous Source Current<br>(Body Diode)|–––|–––|56|A<br>~~eG~~<br>~~QO (~~|S<br>D<br>G<br>MOSFET symbol<br>showing  the<br>integral reverse<br>p-n junction diode.<br>~~eG~~<br>~~(©~~|
|ISM<br>~~es~~<br>~~es~~|Pulsed Source Current<br>(Body Diode)<br>~~eG~~|–––<br>~~eG~~|–––<br>~~eG~~|252<br>~~eG~~<br>~~QO~~|||
|VSD<br>~~es~~<br>~~es~~<br>~~a~~|Diode Forward Voltage<br>~~eG~~<br>~~a~~|–––<br>~~eG~~|–––<br>~~eG~~<br>~~——~~|1.3<br>~~eG~~<br>~~QO~~<br>~~——~~|V<br>~~eG~~<br>~~QO (~~<br>~~oe~~|TJ= 25°C,IS= 38A,VGS= 0V<br>~~eG~~<br>~~(©~~|
|dv/dt<br>~~es~~<br>~~es~~<br>~~a~~|Peak Diode Recovery<br>~~eG~~<br>~~GG~~<br>~~a~~|–––<br>~~eG~~<br>~~GG~~|7.0<br>~~eG~~<br>~~GG~~<br>~~——~~|–––<br>~~eG~~<br>~~QO~~<br>~~GG~~<br>~~——~~|V/ns<br>~~eG~~<br>~~QO (~~<br>~~(©~~<br>~~oe~~|TJ= 175°C,IS= 38A,VDS= 100V<br>~~eG~~<br>~~(©~~<br>~~(©~~|
|trr<br>~~es~~<br>~~a~~<br>~~a~~|Reverse Recovery Time<br>~~a~~<br>~~a~~|–––<br>~~a~~|34<br>~~a~~<br>~~——~~<br>~~——~~|–––<br>~~QO~~<br>~~a~~<br>~~——~~<br>~~——~~|ns<br>~~QO (~~<br>~~a~~<br>~~oe~~<br>~~oe~~|TJ= 25°C<br>VR= 86V<br>TJ= 125°C<br>IF= 38A<br>TJ= 25°C<br>di/dt = 100A/μs<br>TJ= 125°C<br>TJ= 25°C<br>~~(©~~<br>~~:~~|
|||–––<br>~~a~~|39<br>~~a~~<br>~~——~~<br>~~——~~|–––<br>~~a~~<br>~~——~~<br>~~——~~|||
|Qrr<br>~~a~~<br>~~es~~|Reverse Recovery Charge<br>~~a~~|–––|47<br>~~——~~<br>~~——~~|–––<br>~~——~~<br>~~——~~|nC<br> ~~oe~~<br>~~oe~~||
|||–––|61<br>~~——~~<br>~~——~~<br>~~fT~~|–––<br>~~—— ~~<br>~~——~~<br>~~fT~~|||
|IRRM<br>~~es~~|Reverse RecoveryCurrent|–––|2.4<br>~~——~~<br>~~fT~~|–––<br>~~——~~<br>~~fT~~|A<br>~~oe~~||
|ton<br>~~es~~<br>~~a~~|Forward Turn-On Time|Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~—— oe~~<br>~~:~~<br>~~fT~~|||||



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1000<br>VGS<br>TOP           15V<br>10V<br>6.0V<br>5.5V<br>100 5.0V<br>4.75V<br>4.5V<br>BOTTOM 4.25V<br>10 | Zo<br>1 60μs PULSE WIDTH<br>Tj = 25°C<br>4.25V<br>0.1 Pe<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics<br>1000<br>PP Pf Pf<br>100<br>{| | | et |<br>TJ = 175°C<br>PY |<br>T = 25°C<br>J<br>10 PP<br>2<br>=.<br>HH V DS  = 25V<br>1.0 | LTft 60μs PULSE WIDTH<br>2 3 4 5 6 7 8 9<br>VGS, Gate-to-Source Voltage (V)<br>Fig 3.   Typical Transfer Characteristics<br>100000<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED<br>=| C rss    = C gd<br>C = C + C<br>10000 oss   ds  gd<br>C<br>iss<br>1000<br>Coss eet<br>Seti [a]<br>C<br>rss<br>aes atl ea<br>100<br>Se<br>|<br>enee ell<br>PCIE CECI CET<br>10<br>1 10 100 1000<br>VDS, Drain-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

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1000<br>VGS<br>TOP           15V<br>10V<br>6.0V<br>5.5V<br>5.0V<br>4.75V<br>100 4.5V<br>BOTTOM 4.25V<br>A et<br>10 4.25V<br>60μs PULSE WIDTH<br>1 aie Tj = 175°C milli<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>2.6<br>ID = 38A<br>2.2 V GS  = 10V TLELELLY<br>1.8<br>m4<br>1.41.0 LLLLLL LLL<br>a ne<br>0.6 er<br>LE LLL<br>0.2 EEL<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

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14.0<br>ID= 38A<br>12.0<br>pi VDS= 80V | fii de<br>10.0 V DS = 50V<br>VDS= 20V<br>8.0<br>6.0 rfyT|<br>7<br>4.0<br>we|<br>Venn<br>2.0<br>0.0 AGERE<br>0 10 20 30 40 50 60 70<br> QG,  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>100 TJ = 175°C<br>T = 25°C<br>J<br>10<br>V GS  = 0V<br>1.0<br>0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8<br>VSD, Source-to-Drain Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Source-Drain Diode Forward Voltage 

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70<br>Limited by package<br>60<br>Cf TT<br>50<br>oe<br>40<br>aN<br>30 TEN<br>20 reo TN<br>FP TN<br>10<br>0 Pitt ELL<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

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1000<br>OPERATION IN THIS AREA<br>LIMITED BY RDS(on)<br>100 100μsec<br>1msec<br>10 Limited by<br>package<br>1<br>10msec<br>0.1<br>Tc = 25°C DC<br>Tj = 175°C<br>Single Pulse<br>0.01<br>0.1 1 10 100 1000<br>VDS, Drain-to-Source Voltage (V)<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


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Fig 8.   Maximum Safe Operating Area<br>**----- End of picture text -----**<br>


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125<br>Id = 5mA<br>120 LLL LET<br>LEELA<br>115<br>EAT<br>110<br>A<br>105<br>WELLE<br>100 YELLE<br>95 LEELEE LLL<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>Fig 10.   Drain-to-Source Breakdown Voltage<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


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1.6 600<br>ID<br>1.4 TT.<br>TOP         4.7A<br>500<br>12A<br>1.2<br>BOTTOM 38A<br>oo RCL<br>400<br>1.0 PEELE \<br>0.8 300<br>0.6<br>Pceeee NEED<br>200<br>0.4 PTT<br>TAT 100 PRENCTTED<br>0.2<br>a7 anne Senn SeNGe<br>0.0 EE 0 || [COrRSNL]<br>-20 0 20 40 60 80 100 120 25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>VDS, Drain-to-Source Voltage (V)<br>Energy (μJ)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 11.** Typical COSS Stored Energy 

**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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10<br>a ee ee ee ee ee ee ee ee el<br>1 anee ee ee<br>D = 0.50<br>Po 0.20 aeer<br>0.1 Ca 0.10 R1 R1 R2 R2 R3 R3 Any Ri (°C/W)    LL i (sec)<br>0.05  J J C 0.3442    0.001031<br>0.02 1  1  2 2  3 3 0.0679    0.000061<br>T T T [<br>0.01 =eT 0.01 | [Se] | ee te TTTty CiCi= iRiiRi 0.6371    0.005883 1]<br>SINGLE PULSE Notes:<br>1. Duty Factor D = t1/t2<br>|ee| | ( THERMAL RESPONSE ) tr 2. Peak Tj = P dm x Zthjc + Tc LU Hl<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>100<br>Allowed avalanche Current vs avalanche<br>Duty Cycle = Single Pulse pulsewidth, tav, assuming  Tj = 150°C and<br>ee ry a Ss ee ee al<br>es Saag 0.01 ee Me ee A Tstart =25°C (Single Pulse) Hl<br>10 PTR<br>0.05<br>0.10<br>OTSEM SETIE<br>SN EF ot<br>1<br>| Allowed avalanche Current vs avalanche  a A OO Os 0 Qe OO Ds ce eo<br>pulsewidth, tav, assuming  j = 25°C and<br>Tstart = 150°C.<br>sails aaliammnan<br>0.1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14.   Typical Avalanche Current vs.Pulsewidth<br>150 Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse                 (For further info, see AN-1005 at www.irf.com)<br>BOTTOM   1.0% Duty Cycle 1. Avalanche failures assumption:<br>125 I D  = 38A Purely a thermal phenomenon and failure occurs at a temperature far in<br>excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type.<br>100 Rt NOE eerere 2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded.<br>3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.<br>4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse.<br>75 SNE NIN 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>during avalanche).<br>6. Iav = Allowable avalanche current.<br>50 TENNIN IN N 7. T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as<br>25°C in Figure 14, 15).<br>tav = Average time in avalanche.<br>TEIN<br>25 EL D = Duty cycle in avalanche =  tav ·f<br>ZthJC(D, tav) = Transient thermal resistance, see Figures 13)<br>EL  LELERANENY PSN<br>0<br>PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = A T/ ZthJCthJC<br>25 50 75 100 125 150 175<br>Iav =av == 2 A T/ [1.3·BV·Zth]th]]<br>Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as 25°C in Figure 14, 15). 

**PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) =** A **T/ ZthJCthJC Iav =av == 2** A **T/ [1.3·BV·Zth]th]] EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.5<br>4.0<br>ety<br>3.5<br>PERSE<br>3.0<br>ASSESS<br>ID = 100μA<br>2.5<br>ID = 250μA PSK |<br>ID = 1.0mA<br>2.0 ID = 1.0A SERNNG<br>1.5<br>TTT}HR<br>1.0<br>{ty TIS<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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20<br>IF = 25A<br>VR = 86V<br>15 T J  = 25°C | Le<br>TJ = 125°C Z<br>|<br>10<br>a<br>EZann<br>5 PLE<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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20<br>IF = 38A<br>VR = 86V<br>15 T J  = 25°C TE<br>TJ = 125°C fz<br>Pau<br>10<br>lA Y<br>50 Ay |yl |<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**==> picture [217 x 201] intentionally omitted <==**

**----- Start of picture text -----**<br>
350<br>IF = 25A<br>300 V R  = 86V<br>TJ = 25°C re<br>250<br>TJ = 125°C mm<br>200<br>mea<br>150<br>100 ea<br>50<br>0 AP|a | |<br>| | ft<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
350<br>IF = 38A<br>300 V R  = 86V | | |<br>TJ = 25°C<br>250 | A<br>TJ = 125°C<br>200 an<br>150<br>eee<br>100<br>laA | |<br>50<br>| | | ft<br>0<br>| | |<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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**==> picture [411 x 340] intentionally omitted <==**

**----- Start of picture text -----**<br>
Driver Gate Drive<br>P.W.<br>D.U.T + { P.W. + Period ——— — D = —— Period<br>VGS=10<br>)  | t<br>p— ©) - Circuit  GroundLow Layout Leakage lane ConsiderationsInductance @ D.U.T. ISD Waveform t<br>+<br>Reverse<br>Recovery Body Diode Forward<br>oi - [1] Current Transformer - ® + Current r Current di/dt AN<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 we VDD<br>ma<br> Re-Applied<br> Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re (A  dv/dt controlled by Rg Vp p -<br><br>D.U.T. - Device Under Test SCO |<br>Ripple   5% ISD<br>Isp controlled by Duty Factor "D" @\ t<br>* Vg = 5V for Logic Level Devices<br>Fig 21.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS(BR)DSS<br>15V << tp -—><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>gy 2V0VGS dk<br>tp 0.01<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
V(BR)DSS(BR)DSS<br><< tp -—><br>IAS<br>**----- End of picture text -----**<br>


## **Fig 22b.** Unclamped Inductive Waveforms 

**Fig 22a.** Unclamped Inductive Test Circuit 

**==> picture [130 x 58] intentionally omitted <==**

**----- Start of picture text -----**<br>
+<br>-<br> ys<br><br>**----- End of picture text -----**<br>


## **Fig 23a.** Switching Time Test Circuit 

**==> picture [134 x 132] intentionally omitted <==**

**----- Start of picture text -----**<br>
Current Regulator<br>Same Type as D.U.T.<br>50K<br>12V .2F .3F ||<br>+<br>D.U.T. -VDS<br>VGS<br>3mA<br>NE IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

**==> picture [192 x 121] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS<br>90%<br>\<br>10% /\<br>VGS |a r e | |<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


**==> picture [164 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Fig 23b.   Switching Time Waveforms<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Id<br>Vds<br>fl Vgs<br>i<br>Vgs(th)<br>‘ ple p i e w i e » !<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 24b.** Gate Charge Waveform 

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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

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**==> picture [447 x 412] intentionally omitted <==**

**----- Start of picture text -----**<br>
TR TRR TRL<br>OOOO O © oo Oo o :<br>16.3 ( .641 ) 16.3 ( .641 )<br>15.7 ( .619 ) 15.7 ( .619 )<br>12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 ) FEED DIRECTION<br>oe —<br>11.9 ( .469 ) 7.9 ( .312 )<br>NOTES :<br>1.  CONTROLLING DIMENSION : MILLIMETER.<br>2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).<br>3.  OUTLINE CONFORMS TO EIA-481 & EIA-541.<br>  13 INCH<br>Z C QO Sy :<br>16 mm |<br>NOTES :<br>1. OUTLINE CONFORMS TO EIA-481.<br>**----- End of picture text -----**<br>


NOTES : 

1.  CONTROLLING DIMENSION : MILLIMETER. 

2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 

3.  OUTLINE CONFORMS TO EIA-481 & EIA-541. 

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

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|**Orderable part number**|**Package Type**|**Standard Pack**|**Standard Pack**|**Note**|
|---|---|---|---|---|
|||**Form**|**Quantity**||
|IRFR4510PbF|D-PAK|Tube/Bulk|**Quantity**<br>75||
|IRFR4510TRPbF|D-PAK|Tape and Reel|2000||
|IRFU4510PbF|I-PAK|Tube/Bulk|75||



## **Qualification Information[†]** 

|**Qualification Information[†]**|||
|---|---|---|
|Qualification level|Industrial††||
||(per JEDEC JESD47F†††guidelines)||
||Comments: This family of products has passed JEDEC’s Industrial<br>qualification. IR’s Consumer qualification level is granted by extension of the<br>higher Industrial level.||
|Moisture Sensitivity Level|D-PAK<br>higher Industrial level.|MSL1|
|||(per JEDEC J-STD-020D†††)|
||I-PAK|Not applicable|
|RoHS Compliant|Yes||



† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability †† Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information: http://www.irf.com/whoto-call/salesrep/ 

††† Applicable version of JEDEC standard at the time of product release. 

Notes: © Coss eff. (TR) is a fixed capacitance that gives the same charging time O Repetitive rating;  pulse width limited by max. junction as Coss while VDS is rising from 0 to 80% VDSS. temperature. ® Limited by TJmax, starting TJ = 25°C, L = 0.18mH[©] Coss eff. (ER) is a fixed capacitance that gives the same energy as RG = 50, IAS = 38A, VGS =10V. Part not recommended for use Coss while VDS is rising from 0 to 80% VDSS.oss while VDS is rising from 0 to 80% VDSS.while VDS is rising from 0 to 80% VDSS.DS is rising from 0 to 80% VDSS.is rising from 0 to 80% VDSS.DSS.. above this value. @ When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom 

Coss while VDS is rising from 0 to 80% VDSS.oss while VDS is rising from 0 to 80% VDSS.while VDS is rising from 0 to 80% VDSS.DS is rising from 0 to 80% VDSS.is rising from 0 to 80% VDSS.DSS.. @ When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom mended footprint and soldering techniques refer to application note #AN-994. 

ISD  38A, di/dt  2031A/μs, VDD V(BR)DSS, TJ  175°C. Pulse width  400μs; duty cycle  2%. 

 

Data and specifications subject to change without notice 

**IR WORLD HEADQUARTERS:** 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 05/2012 

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- [View this product on Novapart](https://novapart.co/products/IRFU4510PBF/power-mosfet-n-channel-100-v-56-a-00139-ohm-to)
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- [Supplier page](https://es.farnell.com/infineon/irfu4510pbf/mosfet-n-ch-100v-56a-175deg-c/dp/3155149)
---

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