# Power MOSFET, N Channel, 100 V, 127 A, 0.0048 ohm, TO-262, Through Hole

![Product image](https://novapart.co/image/farnell:2860249/)

**URL**: https://novapart.co/products/IRFSL4310ZPBF/power-mosfet-n-channel-100-v-127-a-00048-ohm-to
**SKU**: IRFSL4310ZPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €3.0400
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Power Dissipation | 250W |
| Transistor Mounting | Through Hole |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 250W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.0048ohm |
| Transistor Case Style | TO-262 |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 127A |
| Drain Source On State Resistance | 0.0048ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2860249/)

## PD -97115D IRFB4310ZPbF IRFS4310ZPbF IRFSL4310ZPbF 

HEXFET ® Power MOSFET 

> D **VDSS 100V** ~~eeee~~ **RDS(on)   typ. 4.8m max. 6.0m** ~~oS~~ 

> G ~~a~~ **ID (Silicon Limited) 127A** S **ID (Package Limited) 120A** 

> **Applications** ; High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply 

> :: High Speed Power Switching Hard Switched and High Frequency Circuits 

## **Benefits** 

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

D Ruggedness D D Fully Characterized Capacitance and Avalanche SOA : Enhanced body diode dV/dt and dI/dt Capability D S D S D S Lead-Free G G G TO-220AB D[2] Pak TO-262 IRFB4310ZPbF IRFS4310ZPbF IRFSL4310ZPbF **G D S** Gate Drain Source **Absolute Maximum Ratings** 

Fully Characterized Capacitance and Avalanche SOA 

|**Symbol**<br>**Parameter**<br>**Units**<br>ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>A<br>ID@ TC= 100°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>ID@ TC= 25°C<br>Continuous Drain Current, VGS @ 10V(Wire Bond Limited)<br>IDM<br>Pulsed Drain Current<br>PD@TC= 25°C<br>Maximum Power Dissipation<br>W<br>Linear DeratingFactor<br>W/°C<br>VGS<br>Gate-to-Source Voltage<br>V<br>dv/dt<br>Peak Diode Recovery<br>V/ns<br>250<br>18<br>± 20<br>1.7<br>**Max.**<br>127<br>90<br>560<br>120<br>~~a~~<br>~~esGK~~<br>~~Pf~~<br>~~es~~<br>~~esGO~~<br>~~GO~~<br>~~esGO~~<br>~~eeOO~~<br>~~as~~<br>~~©~~<br>~~SO~~|
|---|
|TJ<br>Operating Junction and<br>°C<br>-55  to + 175|
|TSTG<br>Storage Temperature Range|
|Soldering Temperature, for 10 seconds<br>300|
|(1.6mm from case)|
|Mountingtorque,6-32 or M3 screw<br>**Avalanche Characteristics**<br>10lb in(1.1N m)<br>~~esGO~~|
|EAS(Thermallylimited)<br>Single Pulse Avalanche Energy<br>mJ<br>475<br>~~a OO~~|
|IAR<br>Avalanche Current<br>A<br>EAR<br>Repetitive Avalanche Energy<br>mJ<br>See Fig. 14, 15, 22a, 22b,<br>~~eee~~<br>~~es~~<br>~~rT~~<br>~~s*d~~|
|**Thermal Resistance**|
|**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**<br>RJC<br>Junction-to-Case<br>–––<br>0.6<br>RCS<br>Case-to-Sink,Flat Greased Surface,TO-220<br>0.50<br>–––<br>°C/W<br>RJA<br>Junction-to-Ambient,TO-220<br>–––<br>62<br>RJA<br>Junction-to-Ambient(PCB Mount) ,D2Pak<br>–––<br>40<br>~~Ca~~<br>~~PfOe~~<br>~~esGO~~<br>~~es~~<br>~~©Sn~~<br>~~GO~~<br>~~es~~<br>~~>~~|
|www.irf.com<br>1|



4/23/12 

**Static @ TJ = 25°C (unless otherwise specified)** 

|**Static @ TJ = 25°C (unless otherwise specified)J = 25°C (unless otherwise specified) = 25°C (unless otherwise specified)(unless otherwise specified)unless otherwise specified)pecified)ecified))**<br>TERRectifier|**Static @ TJ = 25°C (unless otherwise specified)J = 25°C (unless otherwise specified) = 25°C (unless otherwise specified)(unless otherwise specified)unless otherwise specified)pecified)ecified))**<br>TERRectifier|
|---|---|
|**Symbol**<br>**Parameter**<br>**Min. Typ. Max. Units**<br>V(BR)DSS<br>Drain-to-Source Breakdown Voltage<br>100<br>–––<br>–––<br>V<br>V(BR)DSS/TJBreakdown Voltage Temp. Coefficient<br>–––<br>0.11<br>–––<br>V/°C<br>RDS(on)<br>Static Drain-to-Source On-Resistance<br>–––<br>4.8<br>6.0<br>m<br>VGS(th)<br>Gate Threshold Voltage<br>2.0<br>–––<br>4.0<br>V<br>IDSS<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>μA<br>–––<br>–––<br>250<br>IGSS<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>nA<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>RG<br>Internal Gate Resistance<br>–––<br>0.7<br>–––<br><br>**Conditions**<br>VGS= 0V,ID= 250μA<br>Reference to 25°C,ID= 5mA<br>VGS= 10V,ID= 75A<br>VDS= VGS,ID= 150μA<br>VDS= 100V,VGS= 0V<br>VDS= 80V,VGS= 0V,TJ= 125°C<br>VGS= 20V<br>VGS= -20V<br>~~ee~~<br>~~nD I GR~~<br>~~(Rs~~<br>~~nD~~<br>~~eeey~~<br>~~UI I (ORs~~<br>~~es~~<br>~~nD ns tn Gs ts~~<br>~~es~~<br>~~Dt~~<br>~~tn ~~~~**Gs** nD~~<br>~~ee~~<br>~~ry I I~~<br>~~ts~~<br>~~Sf~~<br>~~| | | Pe~~<br>~~eRes es ee~~<br>~~Pe~~<br>~~es~~<br>~~I~~<br>~~I~~<br>~~In Gs ts~~||
|**Dynamic @ TJ = 25°C(unless otherwise specified)**||
|**Symbol**<br>**Parameter**<br>**Min. Typ. Max. Units**<br>gfs<br>Forward Transconductance<br>150<br>–––<br>–––<br>S<br>Qg<br>Total Gate Charge<br>–––<br>120<br>170<br>nC<br>Qgs<br>Gate-to-Source Charge<br>–––<br>29<br>–––<br>Qgd<br>Gate-to-Drain("Miller")Charge<br>–––<br>35<br>Qsync<br>Total Gate Charge Sync.(Qg- Qgd)<br>–––<br>85<br>–––<br>td(on)<br>Turn-On DelayTime<br>–––<br>20<br>–––<br>ns<br>tr<br>Rise Time<br>–––<br>60<br>–––<br>td(off)<br>Turn-Off DelayTime<br>–––<br>55<br>–––<br>tf<br>Fall Time<br>–––<br>57<br>–––<br>Ciss<br>Input Capacitance<br>–––<br>6860<br>–––<br>pF<br>Coss<br>Output Capacitance<br>–––<br>490<br>–––<br>Crss<br>Reverse Transfer Capacitance<br>–––<br>220<br>–––<br>Cosseff.(ER)<br>Effective Output Capacitance(EnergyRelated)–––<br>570<br>–––<br>Cosseff.(TR)<br>Effective Output Capacitance(Time Related)<br>–––<br>920<br>–––<br>**Diode Characteristics**<br>ID= 75A<br>RG= 2.7<br>VGS= 10V<br>VDD= 65V<br>ID= 75A,VDS=0V,VGS= 10V<br>VDS=50V<br>VGS= 10V<br>VGS= 0V<br>VDS= 50V<br>ƒ= 1.0MHz,See Fig. 5<br>VGS= 0V,VDS= 0V to 80V<br>,See Fig. 11<br>VGS= 0V,VDS= 0V to 80V<br>**Conditions**<br>VDS= 50V,ID= 75A<br>ID= 75A<br>~~ee ee~~<br>~~GI Gn~~<br>~~(Rs ns~~<br>~~es~~<br>~~ry I~~<br>~~nn Gs~~<br>~~ns~~<br>~~a ee~~<br>~~ee~~<br>~~es~~<br>~~©~~<br>~~ee~~<br>~~es~~<br>~~Pe~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~©~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~eees~~<br>~~ee©)~~||
|S<br>D<br>G<br>**Symbol**<br>**Parameter**<br>**Min. Typ. Max. Units**<br>IS<br>Continuous Source Current<br>–––<br>–––<br>127<br>A<br>(Body Diode)<br>ISM<br>Pulsed Source Current<br>–––<br>–––<br>560<br>A<br>(Body Diode)<br>VSD<br>Diode Forward Voltage<br>–––<br>–––<br>1.3<br>V<br>trr<br>Reverse Recovery Time<br>–––<br>40<br>ns<br>TJ= 25°C<br>VR= 85V,<br>–––<br>49<br>TJ= 125°C<br>IF= 75A<br>Qrr<br>Reverse Recovery Charge<br>–––<br>58<br>nC<br>TJ= 25°C<br>di/dt = 100A/μs<br>–––<br>89<br>TJ= 125°C<br>IRRM<br>Reverse RecoveryCurrent<br>–––<br>2.5<br>–––<br>A<br>TJ= 25°C<br>ton<br>Forward Turn-On Time<br>Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>TJ= 25°C,IS= 75A,VGS= 0V<br>integral reverse<br>p-n junction diode.<br>MOSFET symbol<br>showing  the<br>**Conditions**<br>~~a e~~<br>~~++~~<br>~~ee~~<br>~~ry I I Gs~~<br>~~nD~~<br>~~ee eee~~<br>~~**|** ||~~<br>~~ee eee~~<br>~~||~~<br>~~ee~~<br>~~es~~<br>~~Inn~~||



- Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 120A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. 

- Repetitive rating;  pulse width limited by max. junction temperature. 

- Limited by TJmax, starting TJ = 25°C, L = 0.28mH 

- RG = 25, IAS = 58A, VGS =10V. Part not recommended for use above the Eas value and test conditions. 

Pulse width  400μs; duty cycle  2%. 

- Coss eff. (TR) is a fixed capacitance that gives the same charging time 

as Coss while VDS is rising from 0 to 80% VDSS. 

Coss eff. (ER) is a fixed capacitance that gives the same energy as 

- Coss while VDS is rising from 0 to 80% VDSS. 

When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom mended footprint and soldering techniques refer to application note #AN-994. 

- 

> ISD  75A, di/dt  600A/μs, VDD V(BR)DSS, TJ  175°C. 

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1000 1000<br>VGS VGS<br>TOP           15V Sail ene TOP           15V TT<br>10V 10V<br>8.0V 8.0V<br>6.0V 6.0V<br>=e 5 y<br>5.5V 5.5V<br>5.0V 5.0V<br>100 4.8V SOME TE 4.8V Yo<br>BOTTOM 4.5V BOTTOM 4.5V<br>Tei |<br>bo<br>100<br>10 4.5V<br>Pecc CMT I aaanaan<br>4.5V<br>Ce | oPilailala<br> 60μs PULSE WIDTH  60μs PULSE WIDTH 60μs PULSE WIDTH<br>Tj = 25°C Tj = 175°C<br>1 ||still TT | 10 7vAAllvAAllAll ae<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics Fig 2.   Typical Output Characteristics<br>1000 2.5<br>ID = 75AD = 75A= 75A<br>VGS = 10VGS = 10V= 10V<br>100 | 171 2.0 /<br>TJ = 175°C<br>10 eeffoo it 1.5 ALLEL.aa<br>TJ = 25°C<br>a ane bp<br>1 potiA f tf | | 1.0 ALA.p24p24<br>VDS = 50V<br> 60μs PULSE WIDTH<br>0.1<br>0.5<br>2.0 3.0 4.0 5.0 6.0 7.0 8.0<br>-60 -40 -20 0 20 40 60 80 100 120 140 160<br>VGS, Gate-to-Source Voltage (V)<br>TJ , Junction Temperature (°C)<br>Fig 4.   Normalized On-Resistance vs. Temperature<br>Fig 3.   Typical Transfer Characteristics<br>12000 20<br>VGS   = 0V,       f = 1 MHZ ID= 75A<br>10000 a C C iss  rss     = C  = C gs  gd  + Cgd,  Cds SHORTED 16 rr V VDS= 50V DS= 80V ee ee<br>Coss  = Cds + Cgd VDS= 20V<br>8000<br>a Ciss 12 —-, 8 [a]<br>6000 = So | Go<br>Eno aT a<br>8<br>4000<br>nN ll Tf<br>4<br>Coss<br>2000<br>~ AE ET fe<br>Crss<br>| aR TTT 0 (Ae<br>0 | oh<br>0 40 80 120 160 200<br>1 10 100<br> QG  Total Gate Charge (nC)<br>VDS, Drain-to-Source Voltage (V)<br>VGS, Gate-to-Source Voltage (V)<br>C, Capacitance (pF)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>)<br>ID, Drain-to-Source Current<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


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1000<br>VGS<br>TOP           15V TT<br>10V<br>8.0V<br>6.0V<br>y<br>5.5V<br>5.0V<br>4.8V Yo<br>BOTTOM 4.5V<br>|<br>bo<br>100<br>4.5V<br>aaanaan<br>oPilailala<br> 60μs PULSE WIDTH 60μs PULSE WIDTH<br>Tj = 175°C<br>7vAAllvAAllAll ae<br>10<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>2.5<br>ID = 75AD = 75A= 75A<br>VGS = 10VGS = 10V= 10V<br>2.0 /<br>1.5 ALLEL.aa<br>1.0 ALA.p24p24<br>0.5<br>-60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>TJ , Junction Temperature (°C)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>Py TJ = 175°C tf | pee<br>100 7<br>| 10 FUPAEEEEP T J  = 25°C<br>Pf fo<br>1 RFE<br>VGS = 0V<br>FEE<br>0.1<br>0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0<br>VSD, Source-to-Drain Voltage (V)<br>Fig 7.   Typical Source-Drain Diode<br>Forward Voltage<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


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140<br>LIMITED BY PACKAGE<br>120<br>pS<br>100<br>ST<br>80<br>PT IN<br>60<br>SaaNe<br>40<br>CEPT RE<br>aw<br>20<br>0 iN<br>25 50 75 100 125 150 175<br> TC,  Case Temperature (°C)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

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3.0<br>2.5 | | | fy<br>2.0<br>ft | | IZ<br>1.5<br>P| | fA<br>1.0<br>0.5 SEE<br>| |<br>0.0 rT ZA [|]<br>0 20 40 60 80 100<br>VDS, Drain-to-Source Voltage (V)<br>Energy (μJ)<br>**----- End of picture text -----**<br>


**Fig 11.** Typical COSS Stored Energy 

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10000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>1000 Sit<br>cai<br>100 1m sec 100μsec<br>S iteerSain eeeSab<br>1 0m sec<br>10<br>Bis Steet<br>Seite Sac<br>1 Tc = 25°C<br>Tj = 175°C<br>Single Pulse DC<br>0.1 SF See<br>0.1 1 10 100<br>VDS, Drain-toSource Voltage (V)<br>Fig 8.   Maximum Safe Operating Area<br>130<br>ID = 5mA<br>ELLE<br>120<br>LL<br>110 ELLE.<br>Pade<br>100 aL  EL<br>><br>ELLE<br>90<br>-60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>TJ , Junction Temperature (°C)<br>Fig 10.   Drain-to-Source Breakdown Voltage<br>2000<br>                 I D<br>TOP          18A<br>1600 wa                 29A<br>BOTTOM   58A<br>1200 Nl<br>800 CAPT [.<br>400<br>RANE<br>0 C— ESRS<br>25 50 75 100 125 150 175<br>Starting TJ, Junction Temperature (°C)<br>EAS, Single Pulse Avalanche Energy (mJ)<br>V(BR)DSS , Drain-to-Source Breakdown Voltage<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 10.** Drain-to-Source Breakdown Voltage 

**Fig 12.** Maximum Avalanche Energy Vs. DrainCurrent 

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1 reeGGG<br>Cote D = 0.50<br>0.1 PA 0.20 TTT Ih<br>0.10 eee errr EL LE<br>ee eee ee eee eee eet<br>0.05 R 1R1 R 2R2 R 3R3 R4 R4 Ri ( ° C/W) (sec)<br>0.01 | 0.02 0.01 IE J J 1 1 22 3 3 es 4 4 C  es 0.018756 0.159425 0.320725 0.000007 0.000117 0.001817<br>Ci= CiiRiiRi 0.101282 0.011735<br>Ca ee ee | ee<br>| OA SINGLE PULSE aee<br>( THERMAL RESPONSE ) Notes:<br>IE 1. Duty Factor D = t1/t2<br>0.001 PEETri [cll] EIee 2. Peak Tj = P dm x Zthjc + Tc<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>100<br>== Allowed avalanche Current vs avalanche<br>SS EL pulsewidth, tav, assuming Tj = 150°C and<br>SCS °<br>0.01 Tstart =25 C (Single Pulse)<br>0.05<br>10 —: 0.10 STS<br>RSS a<br>Duty Cycle = Single Pulse<br>Fry A See EH<br>EI INSELL<br>1 IAE)EE<br>FETE ZF AEE EEE<br>Allowed avalanche Current vs avalanche<br>Fp ST LEAAEEEE<br>pulsewidth, tav, assuming  j = 25°C and<br>Tstart = 150°C.<br>FEI IECETHEE<br>ee<br>0.1 | A<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Thermal Response ( Z thJC )<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 14.** Typical Avalanche Current vs.Pulsewidth 

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500<br>TOP          Single Pulse<br>BOTTOM   1% Duty Cycle<br>400 ID = 58A<br>Ul<br>300<br>DSNGHREEEEEE<br>200<br>INET<br>100<br>NG<br>Se<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Notes on Repetitive Avalanche Curves , Figures 14, 15:** 

**(For further info, see AN-1005 at www.irf.com)** 

1. Avalanche failures assumption: 

- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6. Iav = Allowable avalanche current. 

7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14). 

- tav = Average time in avalanche. 

- D = Duty cycle in avalanche =  tav ·f 

- ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 

**PD (ave) = 1/2 ( 1.3·BV·Iav) =** A **T/ ZthJC Iav = 2** A **T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.5<br>ID = 1.0A<br>4.0 I D  = 1.0mA<br>E=SG0008 ID = 250μA<br>3.5 ID = 150μA<br>FSann= — ; <a<br>3.0<br>“BSE<br>2.5<br>FECES<br>2.0<br>1.5<br>1.0<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th) Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage Vs. Temperature 

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24<br>20 BERREREEP<br>16<br>¢<br>12 Bnnpsezan<br>aan<br>8 EEeZ Anan<br>IF = 45A<br>VR = 85V<br>4 WALT) YH |<br>TJ = 125°C<br>TJ =  25°C<br>PLL | |<br>0<br>100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs)<br>IRRM - (A)<br>**----- End of picture text -----**<br>


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24<br>20<br>TTT ATT:<br>16 CCE<br>12 Sunes? za0<br>8 eerie Z|<br>IF = 30A<br>VR = 85V<br>4<br>TJ = 125°C<br>TJ =  25°C<br>0<br>100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs)<br>Fig. 17 - Typical Recovery Current vs. di;/dt<br>600<br>500<br>?<br>400 BRRRREEZS<br>o”<br>300 REREBEeZd<br>200 EERE SZ4nn926m<br>IF = 30A<br>VR = 85V<br>100 RSa et<br>TJ = 125°C<br>TJ =  25°C<br>0 PLL ||<br>100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs)<br>QRR - (nC)<br>IRRM - (A)<br>**----- End of picture text -----**<br>


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600<br>?<br>BRREERED2<br>500 te ee7 ?<br>400<br>é<br>BERR ZaEe<br>300<br>ca<br>200<br>CCE IF = 45A<br>VR = 85V<br>100 ret] |<br>TJ = 125°C<br>TJ =  25°C<br>rLL<br>0<br>I ||<br>100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs)<br>QRR - (nC)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + {¢ — P.W. — Period —— D = —— Period<br>) [®]  Circuit Layout Considerations l V |t GS=10V<br><br>| 1] - LowGround StrayPla I n eductance<br> Low Leakage Inductance 2) D.U.T. ISD Waveform<br>+<br>Reverse<br>Recovery Body Diode Forward<br>oH - [1] Current Transformer - ® + Current r Current di/dt NN<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>; 00 we VDD<br>ma<br> Re-Applied<br> Driver same type as D.U.T. ** + Voltage Body Diode  Forward Drop<br>Re (4)  dv/dt controlled by Rg Vo p - Inductor Curent<br> D.U.T. - Device Under Test J<br>Isp controlled by Duty Factor "D" @ Ripple   5% ISD<br>Use P-Channel Driver for P-Channel Measurements *** \igg = 5V for Logic Level Devices<br>Reverse Polarity for P-Channel<br>Fig 21.  Diode Reverse Recovery Test Circuit for HEXFET ®  Power MOSFETs<br>V(BR)DSS(BR)DSS<br>15V + tp<br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>2V0VGS<br>tp 0.01<br>**----- End of picture text -----**<br>


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V(BR)DSS(BR)DSS<br>+ tp<br>IAS<br>**----- End of picture text -----**<br>


## **Fig 22b.** Unclamped Inductive Waveforms 

**Fig 22a.** Unclamped Inductive Test Circuit 

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V<br>Vos DS fN<br>90%<br>v :<br>v D.UT. | !<br>+<br>- 10%<br>‘ © Vpp /\<br>V<br>)t 10V GS hi | en<br>Pulse Width  — us ye hoe<br>Duty Factor  td(on) tr td(off) tf<br>Fig 23a.   Switching Time Test Circuit Fig 23b.   Switching Time Waveforms<br>Id<br>Vds<br>Vgs<br>L<br>VCC<br>DUT<br>0<br>201 K S Vgs(th)<br>a: Qgodr Qgd Qgs2 LL Qgs1 .<br>**----- End of picture text -----**<br>


**Fig 24b.** Gate Charge Waveform 

**Fig 24a.** Gate Charge Test Circuit www.irf.com 

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EXAMPLE: THIS IS AN IRF1010<br>LOT CODE 1789 INTERNATIONAL PART NUMBER<br>ASSEMBLED ON WW 19, 2000 RECTIFIER<br>IN THE ASSEMBLY LINE "C" LOGO TEAR 0190 wey<br>DATE CODE<br>YEAR 0 =  2000<br>Note: "P" in assembly line position ASSEMBLY<br>indicates "Lead - Free" LOT CODE WEEK 19<br>LINE C<br>**----- End of picture text -----**<br>


TO-220AB packages are not recommended for Surface Mount Application. 

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## TO-262 Package Outline (Dimensions are shown in millimeters (inches)) 

## TO-262 Part Marking Information 

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EXAMPLE: THIS IS AN IRL3103L<br>LOT CODE 1789 PART NUMBER<br>ASSEMBLED ON WW 19, 1997 INTERNATIONAL a<br>IN THE ASSEMBLY LINE "C" RECTIFIERLOGO . RL3103L<br>TEAR 7190 pe<br>DATE CODE<br>. YEAR 7 =  1997<br>No te : "P” in assembly line posi t ion ASSEMBLY<br>indica t es "Lead — F ree” LOT CODE WEEK 19<br>LINE C<br>OR<br>PART NUMBER<br>INTERNATIONAL o S a<br>RECTIFIER IRL31031<br>LOGO TEAR P7 9\ we<br>DATE CODE<br>P =  DESIGNATES LEAD-FREE<br>ASSEMBLY<br>LOT CODE PRODUCT (OPTIONAL)<br>YEAR 7 =  1997<br>WEEK 19<br>A =  ASSEMBLY SITE CODE<br>**----- End of picture text -----**<br>


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## (Dimensions are shown in millimeters (inches)) 

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THIS IS AN IRF530S WITH<br>PART NUMBER<br>LOT CODE 8024 INTERNATIONAL i ee<br>ASSEMBLED ON WW 02, 2000 RECTIFIER \ F530S<br>IN THE ASSEMBLY LINE "L" LOGO TEAR 0021 ey<br>DATE CODE<br>YEAR 0 =  2000<br>ASSEMBLY<br>LOT CODE vy U ) v Uy WEEK 02LINE L<br>THIS IS AN IRF530S WITH<br>PART NUMBER<br>LOT CODE 8024 INTERNATIONAL o S<br>ASSEMBLED ON WW 02, 2000 RECTIFIER F530S<br>IN THE ASSEMBLY LINE "L" LOGO -™ IQR<br>XXXX XXXX pe<br>DATE CODE<br>LOT CODE ~ “TT O T<br>**----- End of picture text -----**<br>


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TRR<br>1.60 (.063)<br>1.50 (.059)<br>1.60 (.063)<br>4.10 (.161)<br>3.90 (.153) 1.50 (.059) 0.368 (.0145)<br>0.342 (.0135)<br>FEED DIRECTION 1.85 (.073) 11.60 (.457)<br>1.65 (.065) 11.40 (.449) 24.30 (.957)<br>15.42 (.609)<br>23.90 (.941)<br>15.22 (.601)<br>TRL<br>1.75 (.069)<br>10.90 (.429) 1.25 (.049)<br>10.70 (.421) 4.72 (.136)<br>16.10 (.634) 4.52 (.178)<br>15.90 (.626)<br>**----- End of picture text -----**<br>


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FEED DIRECTION<br>**----- End of picture text -----**<br>


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13.50 (.532) 27.40 (1.079)<br>12.80 (.504) 23.90 (.941)<br>4<br>330.00 60.00 (2.362)<br>(14.173)       MIN.<br>  MAX.<br>30.40 (1.197)<br>NOTES :       MAX.<br>1.   COMFORMS TO EIA-418.<br>26.40 (1.039) 4<br>2.   CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)<br>3.   DIMENSION MEASURED @ HUB.<br>3<br>**----- End of picture text -----**<br>


4.   INCLUDES FLANGE DISTORTION @ OUTER EDGE. 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. 

**IR WORLD HEADQUARTERS:** 101N. Sepulveda., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 4/12 

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- [View this product on Novapart](https://novapart.co/products/IRFSL4310ZPBF/power-mosfet-n-channel-100-v-127-a-00048-ohm-to)
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- [Supplier page](https://es.farnell.com/en-ES/infineon/irfsl4310zpbf/mosfet-n-ch-100v-127a-to-262/dp/2860249)
---

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