# Power MOSFET, N Channel, 40 V, 195 A, 1400 µohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2253797/)

**URL**: https://novapart.co/products/IRFS7437TRL7PP/power-mosfet-n-channel-40-v-195-a-1400-ohm-to-263
**SKU**: IRFS7437TRL7PP
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.8960
**Stock**: 100+
**Lead Time**: 64 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:195A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0011ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.2V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 7Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 231W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 195A |
| Drain Source On State Resistance | 1400µohm |
| Gate Source Threshold Voltage Max | 2.2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2253797/)

## **Applications** 

Brushed Motor drive applications BLDC Motor drive applications PWM Inverterized topologies Battery powered circuits Half-bridge and full-bridge topologies Electronic ballast applications Synchronous rectifier applications Resonant mode power supplies OR-ing and redundant power switches DC/DC and AC/DC converters 

HEXFET Power MOSFET 

|||D||**VDSS**|**40V**|
|---|---|---|---|---|---|
|||||**RDS(on)   typ.**|**1.1m**Ω|
|||||**max.**|**1.4m**Ω|
|G||S||**ID (Silicon Limited)**<br>**295A**<br>**ID (Package Limited)**<br>**195A**<br>~~|~~<br>~~eeeee~~||



## **Benefits** 

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability Lead-Free 

Halogen Free 

**G D S** Gate Drain Source ~~-—____|_____|_____|~~ 

|||**Standard Pack**|**Standard Pack**|||
|---|---|---|---|---|---|
|**Base Part Number**|**Package Type**|**Form**||**Quantity**|**Orderable Part Number**|
|||Tube||50|IRFS7437-7PPbF|
|IRFS7437-7PPbF|D2Pak-7PIN|||||
|||Tape and Reel Left||800|IRFS7437TRL7PP|



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**----- Start of picture text -----**<br>
4.0<br>ID = 100A<br>Tb}<br>3.0<br>|<br>T = 125°C<br>J<br>KEM<br>2.0<br>Ne Lay | |<br>T = 25°C<br>J<br>Nt<br>1.0 mE<br>4 6 8 10 12 14 16 18 20<br>VGS, Gate -to -Source Voltage  (V)<br>)  Ω<br>RDS(on),  Drain-to -Source On Resistance (m<br>**----- End of picture text -----**<br>


**Fig 1.** Typical On-Resistance vs. Gate Voltage 

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300<br>Limited By Package<br>250<br>F<eee<br>200<br>pa |<br>150<br>FES:<br>100<br>Pt | tL [iNg]<br>50<br>FEAitt<br>0 Pt iy<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 2.** Maximum Drain Current vs. Case Temperature 

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## **Absolute Maximum Ratings** 

|<br>**Symbol**|<br>**Parameter**|**Max.**|**Max.**|**Units**|
|---|---|---|---|---|
|ID@ TC= 25°C|Continuous Drain Current,VGS@ 10V(Silicon Limited)|295�||A|
|ID@ TC= 100°C|Continuous Drain Current,VGS@ 10V(Silicon Limited)|208�|||
|ID@ TC= 25°C|Continuous Drain Current,VGS@ 10V(Wire Bond Limited)|195|||
|IDM|Pulsed Drain Current�|1040|||
|PD@TC= 25°C|Maximum Power Dissipation|231||W|
||Linear DeratingFactor|1.5||W/°C|
|VGS|Gate-to-Source Voltage|± 20||V|
|dv/dt|Peak Diode Recovery �|3.5||V/ns|
|TJ<br>TSTG|Operating Junction and<br>Storage Temperature Range|-55  to + 175||°C|
||SolderingTemperature, for 10 seconds(1.6mm from case)|300|||
|**Avalanche Characteristics**|||||
|EAS (Thermally limited)|Single Pulse Avalanche Energy �|344||mJ|
|EAS (Thermally limited)|Single Pulse Avalanche Energy �|796|||
|IAR|Avalanche Current��|See Fig. 14, 15, 22a, 22b||A|
|EAR|Repetitive Avalanche Energy �|||mJ|
|**Thermal Resistance**|||||
|**Symbol**|**Parameter**|**Typ.**|**Max.**|**Units**|
|RθJC|Junction-to-Case�|–––|0.65|°C/W|
|RθJA|Junction-to-Ambient(PCB Mount) �|–––|40||



## **Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-to-Source Breakdown Voltage|40|–––|–––|V|VGS= 0V,ID= 250μA|
|ΔV(BR)DSS/ΔTJ|Breakdown Voltage Temp. Coefficient|–––|0.035|–––|V/°C|Reference to 25°C,ID= 1.0mA�|
|RDS(on)|Static Drain-to-Source On-Resistance|–––|1.1|1.4|mΩ|VGS= 10V,ID= 100A�|
||||1.7|–––|mΩ|VGS= 6.0V,ID= 50A�|
|VGS(th)|Gate Threshold Voltage|2.2|–––|3.9|V|VDS= VGS,ID= 150μA|
|IDSS|Drain-to-Source Leakage Current|–––|–––|1.0|μA|VDS= 40V,VGS= 0V|
|||–––|–––|150||VDS= 40V,VGS= 0V,TJ= 125°C|
|IGSS|Gate-to-Source Forward Leakage|–––|–––|100|nA|VGS= 20V|
||Gate-to-Source Reverse Leakage|–––|–––|-100||VGS= -20V|
|RG|Internal Gate Resistance|–––|2.2|–––|Ω||



## **������** 

- Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. ������������������ 

- Repetitive rating;  pulse width limited by max. junction temperature. 

- Limited by TJmax, starting TJ = 25°C, L = 0.069mH RG = 50 Ω , IAS = 100A, VGS =10V. 

- ISD ≤ 100A, di/dt ≤ 1288A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. 

- Pulse width ≤ 400μs; duty cycle ≤ 2%. 

- Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 

- Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. 

- When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom mended footprint and soldering techniques refer to application note #AN-994. 

- �θ ������������������������������������� 

- Limited by TJmax, starting TJ = 25°C, L = 0.069mH,RG = 50 Ω , IAS = 40A, VGS =10V. 

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## **Dynamic @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**|**Parameter**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>**Conditions**|||
|---|---|---|---|
|gfs|Forward Transconductance<br>122<br>–––<br>–––<br>S<br>VDS= 10V,ID= 100A<br>~~ee~~<br>~~(~~|||
|Qg|Total Gate Charge<br>–––<br>150<br>225<br>nC<br>ID= 100A<br>~~ee~~|||
|Qgs<br>Qgd<br>Qsync<br>td(on)|Gate-to-Source Charge<br>–––<br>41<br>–––<br>Gate-to-Drain("Miller")Charge<br>–––<br>51<br>–––<br>Total Gate Charge Sync.(Qg- Qgd)<br>–––<br>99<br>–––<br>Turn-On DelayTime<br>–––<br>18<br>–––<br>ns<br>VGS= 10V<br>VDD= 20V<br>ID= 100A,VDS= 20V,VGS= 10V<br>VDS= 20V<br>~~es~~<br>~~es~~<br>~~©~~<br>~~es~~<br>~~ee~~<br>~~es~~|||
|tr|Rise Time<br>–––<br>62<br>–––<br>ID= 30A<br>~~ee~~|||
|td(off)<br>tf<br>Ciss|Turn-Off DelayTime<br>–––<br>78<br>–––<br>Fall Time<br>–––<br>51<br>–––<br>Input Capacitance<br>–––<br>7437<br>–––<br>pF<br>VGS= 10V<br>VGS= 0V<br>RG= 2.7Ω<br>~~ee~~<br>~~ee~~<br>~~@~~<br>~~ee~~|||
|Coss|Output Capacitance<br>–––<br>1097<br>–––<br>VDS= 25V<br>~~ee~~|||
|Crss<br>Cosseff.(ER)<br>Cosseff.(TR)|Reverse Transfer Capacitance<br>–––<br>748<br>–––<br>Effective Output Capacitance(EnergyRelated)<br>–––<br>1314<br>–––<br>Effective Output Capacitance(Time Related)<br>–––<br>1735<br>–––<br>ƒ= 1.0 MHz<br>VGS= 0V,VDS= 0V to 32V<br>VGS= 0V,VDS= 0V to 32V<br>~~es~~<br>~~es~~<br>~~@~~<br>~~ee~~<br>~~©~~|||
|**Diode Characteristics**||||
|**Symbol**|**Parameter**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>**Conditions**|||
|IS|Continuous Source Current<br>–––<br>–––<br>285<br>A<br>MOSFET symbol||D|
|ISM<br>VSD|S<br>G<br>(Body Diode)<br>Pulsed Source Current<br>–––<br>–––<br>1040<br>A<br>(Body Diode)<br>Diode Forward Voltage<br>–––<br>1.0<br>1.3<br>V<br>TJ= 25°C,IS= 100A,VGS= 0V<br>integral reverse<br>p-n junction diode.<br>showing  the<br>~~**r**e eee~~<br>~~s~~|||
|trr<br>Qrr<br>IRRM|Reverse Recovery Time<br>–––<br>37<br>–––<br>ns<br>TJ= 25°C<br>VR= 34V,<br>–––<br>38<br>–––<br>TJ= 125°C<br>IF= 100A<br>Reverse Recovery Charge<br>–––<br>34<br>–––<br>nC<br>TJ= 25°C<br>di/dt = 100A/μs<br>–––<br>36<br>–––<br>TJ= 125°C<br>Reverse RecoveryCurrent<br>–––<br>1.8<br>–––<br>A<br>TJ= 25°C<br>~~ee~~<br>~~|ot~~<br>~~eee~~<br>~~|ot~~<br>~~a~~|||
|ton|Forward Turn-On Time<br>Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~es~~|||



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10000<br>VGS<br>TOP           15V<br>10V<br>PA 8.0V<br>7.0V<br>1000 6.5V<br>6.0V<br>| gece 5.5V<br>BOTTOM 5.0V<br>100 P AaZ Adi | ee<br>teA a<br>5.0V<br>10<br>bet IM ET<br>≤ 60μs PULSE WIDTH<br>Tj = 25°C<br>1 =aFE otiir_ nesanil<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 3.   Typical Output Characteristics<br>10000<br>ee ee ee ee ee ee ee<br>1000<br>ee ee<br>rra<br>|p} |__| ft ft<br>100<br>=) TJ = 175°C _-_-AAS —<br>T = 25°C<br>J<br>a<br>10<br>po | Vf} | | |<br>VDS = 10V<br>≤ 60μs PULSE WIDTH<br>1.0 aaart<br>2 3 4 5 6 7 8 9<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Transfer Characteristics 

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100000<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED<br>| C rss    = C gd<br>C = C + C<br>= oss   ds  gd<br>10000 Ciss<br>ee eel<br>Coss<br>mR C rss EY<br>PEEP TTT<br>1000<br>Bae Sell<br>PEEa ee ee ee<br>100 Pee eer<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Capacitance vs. Drain-to-Source Voltage 

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10000<br>VGS<br>TOP           15V<br>10V<br>ees eels een | 8.0V<br>7.0V<br>6.5V<br>1000 Sil mai 6.0V 5.5V<br>SoeaLO BOTTOM oo 5.0V<br>y<br>100 | fr<br>5.0V<br>ay, Rate<br>≤ 60μs PULSE WIDTH<br>Tj = 175°C<br>10 aelll lll<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 4.   Typical Output Characteristics<br>2.0<br>ID = 100A<br>1.81.6 PEEL VGS = 10V  LEEL ELL  VEL LIYE Vj 7<br>1.4<br>1.2 LEEWVA<br>EEL  LRTI<br>1.0<br>y,<br>0.8<br>0.6 ATLLL EEL LL<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 6.** Normalized On-Resistance vs. Temperature 

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14.0<br>ID= 100A<br>12.0 Po ELLELL<br>VDS= 32V<br>10.0 Pi] V DS = 20V WY<br>8.0 SaaGneyBeEeEe4eee400<br>6.0<br>y |<br>Ep==” 4508<br>4.0 S} AREE<br>2.00.0 Jitititd eet<br>0 20 40 60 80 100 120 140 160 180 200<br> QG,  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 8.** Typical Gate Charge vs. Gate-to-Source Voltage 

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10000<br>a ee ee ee ee ee ee ee eee<br>1000<br>TJ = 175°C<br>100<br>T = 25°C<br>J<br>10<br>VGS = 0V<br>1.0<br>0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0<br>VSD, Source-to-Drain Voltage (V)<br>Fig 9.   Typical Source-Drain Diode<br>Forward Voltage<br>49<br>Id = 1.0mA<br>48<br>TITTITI IE<br>47<br>Wiftccsus-ae<br>+<br>46<br>45 BRERASERRE ZEEE<br>44 PELE<br> TAAL EEE<br>43<br>CUP<br>42<br>COVE<br>41<br>BARRE<br>40 TE EL ELE Ley |<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>ISD, Reverse Drain Current (A)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 11.** Drain-to-Source Breakdown Voltage 

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10000<br>OPERATION IN THIS AREA<br>PT tT LIMITED BY RDS(on) Lt TTT<br>1000<br>1msec 100μsec<br>100<br>10msec<br>Limited by<br>10 package<br>DC<br>1 Tc = 25°C<br>Tj = 175°C<br>Single Pulse<br>0.1<br>0.1 1 10 100<br>VDS, Drain-toSource Voltage (V)<br>Fig 10.   Maximum Safe Operating Area<br>1.0<br>0.9<br>0.8 TA<br>0.7 pF<br>a<br>0.6<br>0.5 odPP [eT] J<br>0.4<br>Er TA<br>0.3 SanEer enn<br>0.2 Seee4eEn<br>0.1 aay<br>0.0<br>-0.1 pePTErt<br>-5 0 5 10 15 20 25 30 35 40<br>VDS, Drain-to-Source Voltage (V)<br>Fig 12.   Typical COSS Stored Energy<br>Energy (μJ)<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


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10.0<br>8.0 V GS  = 6.0V<br>VGS = 7.0V<br>VGS = 8.0V<br>6.0 VGS =10V<br>4.0<br>ALALLY<br>2.0<br>_AL_| Z| a<br>0.0 SST ET it [<br>0 200 400 600 800 1000 1200<br>ID, Drain Current (A)<br>) Ω<br>RDS(on),  Drain-to -Source On Resistance (m<br>**----- End of picture text -----**<br>


**Fig 13.** Typical On-Resistance vs. Drain Current 

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1<br>D = 0.50<br>0.20<br>0.1<br>0.10<br>0.05<br>0.02<br>0.01<br>0.01<br>0.001 SINGLE PULSE<br>( THERMAL RESPONSE )<br>Notes:<br>1. Duty Factor D = t1/t2<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.0001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1 1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 14.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>1000<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  Δ Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>100<br>10<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  ΔΤ j = 25°C and<br>Tstart = 150°C.<br>1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 15.   Typical Avalanche Current vs.Pulsewidth<br>350<br>Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse<br>(For further info, see AN-1005 at www.irf.com)<br>300 BOTTOM   1.0% Duty Cycle 1. Avalanche failures assumption:<br>ID = 100A Purely a thermal phenomenon and failure occurs at a temperature far in<br>250 excess of Tjmax. This is validated for every part type.<br>2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.jmax is not exceeded. is not exceeded.<br>3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.<br>200 4. PD (ave) = Average power dissipation per single avalanche pulse.<br>5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>150 during avalanche).<br>6. Iav = Allowable avalanche current.<br>7.  Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed asjmax (assumed as(assumed as<br>100<br>25°C in Figure 14, 15).<br>tav = Average time in avalanche.<br>50 D = Duty cycle in avalanche =  tav ·f<br>ZthJC(D, tav) = Transient thermal resistance, see Figures 13)<br>0<br>25 50 75 100 125 150 175 PD (ave) = 1/2 ( 1.3·BV·Iav) = � T/ ZthJC<br>Starting TJ , Junction Temperature (°C) IEav = 2 � T/ [1.3·BV·Z = P ·tth]<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.jmax is not exceeded. is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed asjmax (assumed as(assumed as 25°C in Figure 14, 15). 

**AS (AR) = PD (ave) av** 

**Fig 16.** Maximum Avalanche Energy vs. Temperature 

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5.0<br>4.0<br>ALT<br>CT] a<br>3.0 Bstteyh<br>ID = 150μA<br>aNNG<br>ID = 1.0mA<br>2.0 I D  = 1.0A aan NIA<br>1.0<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>Fig 17.   Threshold Voltage vs. Temperature<br>12<br>IF = 100A<br>10 V R  = 34V<br>TJ = 25°C<br>8 T J  = 125°C ¢ —<br>| es<br>Paw<br>6<br>| -<br>4<br>x]<br>2 |<br>el]<br>EET<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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12<br>IF = 60A<br>10 V R  = 34V<br>TJ = 25°C<br>8 T J  = 125°C ans<br>a<br>ean<br>6<br>4 |e A<br>Vg | |<br>2<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


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300<br>IF = 60A<br>250 V R  = 34V<br>TJ = 25°C<br>200 T J  = 125°C “ Z|<br>P| Le<br>Bye<br>150<br>lo? /”<br>100 |ee<br>aT<br>50<br>Z|<br>|<br>0<br>Pt TT<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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300<br>IF = 100A<br>250 V R  = 34V<br>TJ = 25°C<br>200 T J  = 125°C |<br>|a<br>150<br>| le a.<br>100<br>50<br>0<br>tT TTT<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + { P.W. + Period ——— + D = —— Period<br>) ©)    •  CircuitLow  LayoutStray InductConsiderations ) fi V t GS=10V<br> •<br>-  •   CurrentLow LeakageTransformerInductance ® D.U.T. ISD Waveform<br>+<br>= ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>©) D.U.T. VDS Waveform Diode Recoverydv/dt ‘ '<br>00 =e VDD<br>iv<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re (A •   dv/dt controlled by Rg Vo p -<br>•<br>D.U.T. - Device Under Test e s ee<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" i) t<br>* Vag = 5V for Logic Level Devices<br>Fig 22.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V ~—— tp -><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>y 2V0VGS ab<br>tp 0.01 nN Ω IAS —<br>**----- End of picture text -----**<br>


**Fig 22a.** Unclamped Inductive Test Circuit 

**Fig 22b.** Unclamped Inductive Waveforms 

**==> picture [131 x 58] intentionally omitted <==**

**----- Start of picture text -----**<br>
+<br>-<br>≤ 1  ys<br>≤ 0.1 %<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Fig 23a.   Switching Time Test Circuit<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Current Regulator<br>Same Type as D.U.T.<br>| ! 12V .2 μ F 50K Ω |<br>!: i .3 μ F | J +<br>D.U.T. -VDS<br>VGS<br>3mA<br>IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

**==> picture [192 x 283] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS<br>90%<br>I<br>10% /\<br>VGS |l v l > | KSp l<br>td(on) tr td(off) tf<br>Fig 23b.   Switching Time Waveforms<br>Id<br>Vds<br>fl Vgs<br>i<br>Vgs(th)<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 24b.** Gate Charge Waveform 

D[2] Pak - 7 Pin Package Outline Dimensions are shown in millimeters (inches) 

## D[2] Pak - 7 Pin Part Marking Information 

**==> picture [272 x 69] intentionally omitted <==**

**----- Start of picture text -----**<br>
PART NUMBER<br>INTERNATIONAL<br>RECTIFIER LOGO IRFS7437-7P<br>YWWP<br>ASSEMBLY  DATE CODE<br>LOT CODE LC       LC Y = LAST DIGIT OF YEAR<br>WW = WORK WEEK<br>P = LEAD-FREE<br>**----- End of picture text -----**<br>


## D[2] Pak - 7 Pin Tape and Reel 

|**Qualification information**†|||
|---|---|---|
|Qualification level|Industrial††||
||(per JEDEC JESD47F††† guidelines)||
|Moisture Sensitivity Level|D2Pak-7PIN|MS L1|
|||(per JE DE C J-S TD-020D†††)|
|RoHS compliant|Yes||



## **Revision History** 

|**Date**|**Comment**|
|---|---|
|4/30/2014|•Updated data sheet based on corporate template.<br>•Updated package outline and part marking on page 9 & 10.|
|2/19/2015|•Updated EAS (L =1mH)= 796mJ on page 2<br>•Updated note 10  “Limited byTJmax,startingTJ= 25°C,L = 1mH,RG= 50Ω,IAS= 40A,VGS=10V”.  onpage 2|



**IR WORLD HEADQUARTERS:** 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 

## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . 

With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( **www.infineon.com** ). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 



## Links

- [View this product on Novapart](https://novapart.co/products/IRFS7437TRL7PP/power-mosfet-n-channel-40-v-195-a-1400-ohm-to-263)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/irfs7437trl7pp/mosfet-n-ch-40v-195a-7-d2pak/dp/2253797)
---

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