# Power MOSFET, N Channel, 40 V, 195 A, 1200 µohm, TO-263AB, Surface Mount

![Product image](https://novapart.co/image/farnell:2617414/)

**URL**: https://novapart.co/products/IRFS7430TRLPBF/power-mosfet-n-channel-40-v-195-a-1200-ohm-to
**SKU**: IRFS7430TRLPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.0000
**Stock**: 500+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:195A; Drain Source Voltage Vds:40V; On Resistance Rds(on):970µohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3.9V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | StrongIRFET HEXFET |
| Qualification | - |
| Power Dissipation | 375W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263AB |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 195A |
| Drain Source On State Resistance | 1200µohm |
| Gate Source Threshold Voltage Max | 3.9V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2617414/)

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Oe HEXFET Power MOSFET<br>D VDSS 40V<br>RDS(on)   typ. 0.97m<br>              max. 1.2m OQ<br>G<br>ID (Silicon Limited) oO 426A<br>S ID (Package Limited) | 195A<br>D<br>D<br>S<br>S D<br>G G<br>D [2] Pak TO-262<br>IRFS7430PbF IRFSL7430PbF<br>G D S<br>Gate Drain Source<br>Standard Pack Orderable Part Number<br>Quantity<br>50 IRFSL7430PbF<br>50 IRFS7430PbF<br>800 IRFS7430TRLPbF<br>500<br>Limited By Package<br>400<br>300<br>PSY<br>200<br>100<br>EA<br>0<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


## **Applications** 

Brushed motor drive applications 

BLDC motor drive applications 

Battery powered circuits 

alf-bridge and full-bridge topologies 

Synchronous rectifier applications Resonant mode power supplies 

OR-ing and redundant power switches DC/DC and AC/DC converters DC/AC inverters 

## **Benefits** 

Improved  gate, avalanche and dynamic dV/dt ruggedness 

Fully characterized capacitance and avalanche SOA 

Enhanced body diode dV/dt and dI/dt capability Lead-free 

|**Base Part Number**|**Package Type**|**Standard Pack**|**Standard Pack**|**Orderable Part Number**|
|---|---|---|---|---|
|||**Form**|**Quantity**||
|IRFSL7430PbF|TO-262|Tube|50|IRFSL7430PbF|
|IRFS7430PbF|D2-Pak|Tube|50|IRFS7430PbF|
|||Tape and Reel Left|800|IRFS7430TRLPbF|



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6.0<br>ID = 100A<br>4.0<br>T = 125°C<br>J<br>2.0 Bet<br>TJ = 25°C<br>0.0 RSH<br>4 6 8 10 12 14 16 18 20<br>VGS, Gate -to -Source Voltage  (V)<br>Fig 1.    Typical On-Resistance vs. Gate Voltage<br>)  Ω<br>RDS(on),  Drain-to -Source On Resistance (m<br>**----- End of picture text -----**<br>


**Fig 2.** Maximum Drain Current vs. Case Temperature 

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## **Absolute Maximum Ratings** 

|<br>**Symbol**|<br>**Parameter**|**Max.**|**Max.**|**Units**|
|---|---|---|---|---|
|ID @TC= 25°C|Continuous DrainCurrent,VGS @10V(Silicon Limited)|426�||A|
|ID @TC= 100°C|Continuous DrainCurrent,VGS @10V(Silicon Limited)|301�|||
|ID @TC= 25°C|Continuous DrainCurrent,VGS @10V(Wire Bond Limited)|195|||
|IDM|Pulsed DrainCurrent�|1524|||
|PD@TC =25°C|Maximum Power Dissipation|375||W|
||Linear DeratingFactor|2.5||W/°C|
|VGS|Gate-to-Source Voltage|± 20||V|
|TJ<br>TSTG|Operating Junction and<br>Storage Temperature Range|-55  to + 175||°C|
||SolderingTemperature,for 10seconds(1.6mm from case)|300|||
|**Avalanche Characteristics**|||||
|EAS (Thermally limited)|Single Pulse Avalanche Energy �|760||mJ|
|<br>EAS (Thermally limited)|Single Pulse Avalanche Energy �|1452|||
|<br>IAR|Avalanche Current��|See Fig. 15, 16, 22a, 22b||A|
|EAR|Repetitive Avalanche Energy �|||mJ|
|**Thermal Resistance**|||||
|**Symbol**|**Parameter**|**Typ.**|**Max.**|**Units**|
|RθJC|Junction-to-Case�|–––|0.40|°C/W|
|RθJA|Junction-to-Ambient(PCB Mount,steady-state) �|–––|40||



**Static @ TJ = 25°C (unless otherwise specified)** 

|**Static @ TJ = 25°C**|**(unless otherwise specified)**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Units**|**Conditions**|
|V(BR)DSS|Drain-to-Source Breakdown Voltage|40|–––|–––|V|VGS= 0V,ID= 250μA|
|ΔV(BR)DSS/ΔTJ|Breakdown Voltage Temp. Coefficient|–––|0.014|–––|V/°C|Reference to 25°C, ID =1.0mA|
|RDS(on)|Static Drain-to-Source On-Resistance|–––|0.97|1.2|mΩ|VGS= 10V,ID= 100A�|
|||–––|1.2|–––||VGS= 6.0V,ID= 50A�|
|VGS(th)|Gate Threshold Voltage|2.2|–––|3.9|V|VDS= VGS,ID= 250μA|
|IDSS|Drain-to-Source Leakage Current|–––|–––|1.0|μA|VDS= 40V,VGS= 0V|
|||–––|–––|150||VDS= 40V,VGS= 0V,TJ= 125°C|
|IGSS|Gate-to-Source Forward Leakage|–––|–––|100|nA|VGS= 20V|
||Gate-to-Source Reverse Leakage|–––|–––|-100||VGS = -20V|
|RG|InternalGate Resistance|–––|2.1|–––|Ω||



## **������** 

- Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. ������������������ 

- Repetitive rating;  pulse width limited by max. junction temperature. 

- Limited by TJmax, starting TJ = 25°C, L = 0.15mH 

- RG = 50 Ω , IAS = 100A, VGS =10V. 

- ISD ≤ 100A, di/dt ≤ 990A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. 

- Pulse width ≤ 400μs; duty cycle ≤ 2%. 

- Coss eff. (TR) is a fixed capacitance that gives the same charging time 

- as Coss while VDS is rising from 0 to 80% VDSS. 

- Coss eff. (ER) is a fixed capacitance that gives the same energy as 

- Coss while VDS is rising from 0 to 80% VDSS. 

- �θ ������������������������������������� . 

- Limited by TJmax starting TJ = 25°C, L= 1mH, RG = 50 Ω , IAS = 54A, VGS =10V. 

- When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom- 

- mended footprint and soldering techniques refer to application note #AN-994. http://www.irf.com/technical-info/appnotes/an-994.pdf 

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## **Dynamic @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|gfs|Forward Transconductance|150|–––|–––|S|VDS= 10V,ID= 100A|
|Qg|TotalGateCharge|–––|300|460|nC|VDS=20V<br>ID= 100A<br>VGS= 10V�|
|Qgs|Gate-to-SourceCharge|–––|77|–––|||
|Qgd|Gate-to-Drain("Miller") Charge|–––|98|–––|||
|Qsync|TotalGateChargeSync.(Qg-Qgd)|–––|202|–––||ID= 100A,VDS=0V,VGS= 10V|
|td(on)|Turn-On DelayTime|–––|32|–––|ns|VGS= 10V�<br>ID= 30A<br>VDD= 20V<br>RG= 2.7Ω|
|tr|Rise Time|–––|105|–––|||
|td(off)|Turn-Off DelayTime|–––|160|–––|||
|tf|Fall Time|–––|100|–––|||
|Ciss|InputCapacitance|–––|14240|–––|pF|VGS= 0V<br>VDS= 25V<br>ƒ= 1.0MHz|
|Coss|OutputCapacitance|–––|2130|–––|||
|Crss|Reverse TransferCapacitance|–––|1460|–––|||
|Cosseff.(ER)|Effective Output Capacitance (Energy Related)|–––|2605|–––||VGS=0V,VDS=0V to32V�|
|Cosseff.(TR)|Effective Output Capacitance (Time Related)|–––|2920|–––||VGS=0V,VDS=0V to32V�|
|**Diode Characteristics**|||||||
|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Units**|**Conditions**|
|IS|Continuous Source Current<br>(Body Diode)|–––|–––|426�|A|S<br>D<br>G<br>integral reverse<br>showing  the<br>p-n junction diode.<br>MOSFET symbol|
|ISM|<br>Pulsed Source Current<br>(Body Diode)��|–––|–––|1524|A||
|VSD|Diode Forward Voltage|–––|0.86|1.2|V|TJ= 25°C,IS= 100A,VGS=0V�|
|dv/dt|Peak Diode Recovery�|–––|2.7|–––|V/ns|TJ= 175°C,IS= 100A,VDS= 40V|
|trr|Reverse Recovery Time|–––|52|–––|ns|TJ= 25°C<br>VR= 34V,<br>TJ= 125°C<br>IF= 100A<br>TJ= 25°C<br>di/dt = 100A/μs�<br>TJ= 125°C<br>TJ= 25°C|
|||–––|52|–––|||
|Qrr|Reverse Recovery Charge|–––|97|–––|nC||
|||–––|97|–––|||
|IRRM|Reverse Recovery Current|–––|2.3|–––|A||



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1000<br>VGS<br>TOP           15V<br>10V<br>8.0V<br>7.0V<br>6.0V<br>[+  ff 5.5V<br>100 7 Zien 4.8V<br>BOTTOM 4.5V<br>LT! at<br>10 Terr | TT<br>ence 4.5V ce<br>≤ 60μs PULSE WIDTH<br>Tj = 25°C<br>1<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 3.   Typical Output Characteristics<br>1000<br>Ee ee eee 7 eee eee<br>100 n/n<br>TJ = 25°C<br>PotAeAP]—<br>T = 175°C<br>10 J<br>eahn aa |<br>VDS = 25V<br>≤ 60μs PULSE WIDTH<br>1.0 PE<br>2 3 4 5 6 7<br>VGS, Gate-to-Source Voltage (V)<br>Fig 5.   Typical Transfer Characteristics<br>100000<br>VGS   = 0V,       f = 1 MHZ<br>| [|] CCiss   = C = Cgs + Cgd,  C ds SHORTED<br>P rss   gd<br>C = C + C<br>oss   ds  gd<br>| [|]<br>oy Ciss<br>10000<br>SERA C<br>oss<br>EE Crss HH<br>SSN<br>ASNPRIEST [TTT]<br>ee > TTT<br>1000<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>C, Capacitance (pF)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Capacitance vs. Drain-to-Source Voltage 

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1000<br>VGS<br>TOP           15V<br>10V<br>8.0V<br>7.0V<br>6.0V<br>Of 5.5V<br>4.8V<br>Or<br>BOTTOM 4.5V<br>100<br>|) WY | eae<br>4.5V<br>A/Soo<br>Zoe<br>≤ 60μs PULSE WIDTH<br>Tj = 175°C<br>10<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 4.   Typical Output Characteristics<br>2.0<br>ID = 100A<br>1.8 VGS = 10V<br>1.6 BURRREDZF £7)<br>1.41.2 PEEL LLL|<br>1.0 LLL |<br>0.8<br>0.6 ALEC<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>  Normalized On-Resistance vs. Temperature<br>14.0<br>ID= 100A<br>12.0<br>VDS= 32V<br>10.0 | [| V DS = 20V PNYSY|<br>Sannn/ a0<br>8.0<br>Seana<br>6.0<br>ff<br>4.02.0 P|VannaAH| if<br>AGREE /<br>0.0<br>0 50 100 150 200 250 300 350 400<br> QG,  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 6.** Normalized On-Resistance vs. Temperature 

**Fig 8.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>T = 175°C<br>J<br>100<br>10<br>T = 25°C<br>J<br>1<br>V GS  = 0V<br>0.1<br>0.0 0.5 1.0 1.5 2.0 2.5<br>VSD, Source-to-Drain Voltage (V)<br>Fig 9.   Typical Source-Drain Diode<br>Forward Voltage<br>47<br>Id = 1.0mA<br>46<br>TTT Ee<br>45<br>BRRREDZAGnne<br>44 PELE CALL<br>43<br>LATE<br>42<br>TALE TE<br>41<br>AL PEEEELLL EE E L LE<br>40<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>ISD, Reverse Drain Current (A)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 11.** Drain-to-Source Breakdown Voltage 

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10000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>1000<br>100μsec<br>1msec<br>100<br>10<br>10msec<br>1 Tc = 25°C DC<br>Tj = 175°C<br>Single Pulse<br>0.1<br>0.1 1 10 100<br>VDS, Drain-toSource Voltage (V)<br>Fig 10.   Maximum Safe Operating Area<br>2.5<br>VDS= 0V to 32V<br>2.0 TTT<br>1.5 PrP ry<br>1.0 PE yy || Lf |<br>0.5 yyy, Py]<br>0.0 7_ noenn<br>0 5 10 15 20 25 30 35 40 45<br>ID,  Drain-to-Source Current (A)<br>Energy (μJ)<br>**----- End of picture text -----**<br>


VDS, Drain-to-Source Voltage (V) **Fig 12.** Typical COSS Stored Energy 

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6.0<br>VGS = 5.5V<br>VGS = 6.0V<br>VGS = 7.0V<br>4.0 EF VGS = 8.0V<br>VGS =10V<br>JA/ I x!.<br>2.0<br>Se<br>0.0<br>0 200 400 600 800 1000 1200<br>ID, Drain Current (A)<br>) Ω<br>RDS(on),  Drain-to -Source On Resistance (m<br>**----- End of picture text -----**<br>


**Fig 13.** Typical On-Resistance vs. Drain Current 

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1<br>D = 0.50<br>0.1 0.20<br>0.10<br>0.05<br>0.01 0.02<br>0.01<br>0.001<br>Notes:<br>SINGLE PULSE<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.0001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


**Fig 14.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

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1000<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  Δ Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>100<br>10<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  ΔΤ j = 25°C and<br>Tstart = 150°C.<br>1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 15.** Avalanche Current vs.Pulsewidth 

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800<br>TOP          Single Pulse<br>700 BOTTOM   1.0% Duty Cycle<br>ID = 100A<br>600<br>500<br>400<br>300<br>200<br>100<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)** 

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6. Iav = Allowable avalanche current. 

7. Δ T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). 

- tav = Average time in avalanche. 

- D = Duty cycle in avalanche =  tav ·f 

- ZthJC(D, tav) = Transient thermal resistance, see Figures 14) 

   - **PD (ave) = 1/2 ( 1.3·BV·Iav) =** � **T/ ZthJC Iav = 2** � **T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav** 

**Fig 16.** Maximum Avalanche Energy vs. Temperature 

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4.0<br>Pe LE<br>3.5<br>3.0 ENN DN |<br>LARSEN<br>4<br>ANUPA ED<br>2.5<br>ID = 250μA<br>ID = 1.0mA<br>EANNG<br>2.0 I D  = 1.0A<br>| TLNS<br>1.5<br>1.0<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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12<br>IF = 60A<br>10 V R  = 34V =<br>TJ = 25°C<br>8 T J  = 125°C wo Le<br>LA |<br>L)x | |<br>6 pvt<br>4<br>AL| |<br>2<br>| ft |<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**Fig 17.** Threshold Voltage vs. Temperature 

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12<br>IF = 100A<br>10 V R  = 34V —<br>TJ = 25°C<br>8 T J  = 125°C =A<br>6<br>40<br>4<br>2 yt7 | | tf |<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


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300<br>IF = 60A<br>— VR = 34V aes 2<br>250<br>TJ = 25°C<br>AT<br>TJ = 125°C<br>200<br>wa<br>150<br>a<br>tf | 100 Yla | |<br>50<br>800 1000 0 200 400 600 800 1000<br>diF /dt (A/μs)<br>Current vs. di;/dt Fig. 20 - Typical Stored Charge vs. di;/dt<br>260<br>IF = 100A<br>VR = 34V<br>220 TJ = 25°C Wg<br>TJ = 125°C<br>180 obE2 4 b e<br>¢<br>140 Z<br>vane<br>100<br>60<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + { P.W. + Period ——— + D = —— Period<br>) ©) Circuit    •  Layout Considerations ) fi V t GS=10V<br> •<br>| 1] - LowGroundS'  PlaneInd<br> •   CurrentLow LeakageTransformerInductance ® D.U.T. ISD Waveform<br>+<br>= ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>00 ©) D.U.T. VDS Waveform Diode Recoverydv/dt \ ><br>VDD<br>Re • •   Drivervidt controlledsame type by Rgas D.U.T. DD + Re-AppliedVoltage Body Diode  Forward Drop<br>•   -<br>•<br>D.U.T. - Device Under Test e s ee<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" @)<br>* Vos = 5V for Logic Level Devices<br>Fig 22. eak Diode Recovery dv/dt Test Circuit or N-Channel<br>HEXFET ® ower MOSFETs<br>V(BR)DSS<br>15V << tp ><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>yp 2V0VGS db<br>tp 0.01 nN Ω IAS —<br>**----- End of picture text -----**<br>


## **Fig 22a.** Unclamped Inductive Test Circuit 

**Fig 22b.** Unclamped Inductive Waveforms 

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VDS<br>90%<br>Ves D.U.T. I<br>Ro L +<br>- Vop<br>i Ves 10% /\<br>Pulse Width  1 s VGS | ee,<br>Duty Factor  0.1 % l v l > | p l<br>td(on) tr td(off) tf<br>  Switching Time Test Circuit Fig 23b.   Switching Time Waveforms<br>Current Regulator Id<br>Same Type as D.U.T. Vds<br>| 50K Ω fl Vgs<br>12V .2 μ F<br>| .3 μ F<br>|[| ii | +<br>D.U.T. -VDS<br>Vgs(th)<br>VGS<br>fd i 3mA st i } |<br>s e I t G ID ‘ ple w e a , !<br>Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


## **Fig 23a.** Switching Time Test Circuit 

**Fig 24a.** Gate Charge Test Circuit 

**Fig 24b.** Gate Charge Waveform 

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THIS IS  AN IRF530S WITH<br>PART NUMBER<br>LOT CODE 8024 INTERNATIONAL cS<br>AS SEMBLED ON WW 02, 2000 RECTIFIER F530S<br>IN THE ASS EMBLY LINE "L" LOGO IR 0021<br>DATE CODE<br>80 24<br>YEAR 0 =  2000<br>AS SEMBLY Wu<br>assembly line posi t ion LOT CODE 7 7 , WEEK 02<br>t es "Lead — F ree” u u LINE L<br>**----- End of picture text -----**<br>


## OR 

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PART NUMBER<br>INTERNATIONAL c S<br>RECTIFIER F530S<br>LOGO TeaR P002 A DATE CODE<br>80 24 P =  DESIGNATES  LEAD - FREE<br>PRODUCT  (OPTIONAL)<br>AS SEMBLY Wu<br>LOT CODE Theat YEAR 0 =  2000<br>no WEEK 02<br>A =  ASS EMBLY SITE CODE<br>**----- End of picture text -----**<br>


## TO-262 Package Outline 

Dimensions are shown in millimeters (inches) 

## TO-262 Part Marking Information 

**==> picture [335 x 69] intentionally omitted <==**

**----- Start of picture text -----**<br>
E XAMPLE : T HIS  IS  AN IRL3103L<br>LOT  CODE  1789 PART  NUMB E R<br>AS S EMB LE D ON WW 19, 1997 INT ERNAT IONAL A<br>IN T HE  AS S E MB LY L INE  "C" RE CT IFIE RLOGO Te IRL3103L aR 719C<br>DAT E CODE<br>YE AR 7 =  1997<br>AS S E MBL Y<br>indica t es "Lead — F ree” L OT  CODE WE EK  19<br>LINE C<br>**----- End of picture text -----**<br>


**==> picture [285 x 104] intentionally omitted <==**

**----- Start of picture text -----**<br>
OR<br>PART  NU MBE R<br>INT E RNAT IONAL c S<br>RE CT IF IE R IRL3103L<br>LOGO IeaR P719 A<br>DAT E  CODE<br>P =  DE S IGNAT E S  LE AD-F REE<br>AS S E MB LY<br>LOT  CODE PRODUCT  (OPT IONAL)<br>YEAR 7 =  1997<br>WE E K 19<br>A =  AS S EMB LY S IT E  CODE<br>**----- End of picture text -----**<br>


Dimensions are shown in millimeters (inches) 

**==> picture [345 x 367] intentionally omitted <==**

**----- Start of picture text -----**<br>
TRR<br>1.60 (.063)<br>1.50 (.059)<br>1.60 (.063)<br>4.10 (.161)<br>3.90 (.153) 1.50 (.059) 0.368 (.0145)<br>|0 0°2 0| ~ T 0.342 (.0135)<br>a — r eooeogls pt :<br>FEED DIRECTION 1.85 (.073) 11.60 (.457)<br>1.65 (.065) 11.40 (.449) 24.30 (.957)<br>15.42 (.609)<br>23.90 (.941)<br>15.22 (.601)<br>TRL<br>0000 ii i<br>1.75 (.069)<br>10.90 (.429) 1.25 (.049)<br>10.70 (.421) 4.72 (.136)<br>“_ 16.10 (.634) 4.52 (.178)<br>15.90 (.626)<br>FEED DIRECTION<br>13.50 (.532) 27.40 (1.079)<br>12.80 (.504) 23.90 (.941)<br>4<br>330.00(14.173) a g 60.00 (2.362)      MIN.<br>  MAX.<br>gp ‘ ¢ al s<br>30.40 (1.197)<br>NOTES :       MAX.<br>1.   COMFORMS TO EIA-418.2.   CONTROLLING DIMENSION: MILLIMETER. 26.40 (1.03924.40 (.961) I ) t 4<br>3.   DIMENSION MEASURED @ HUB.<br>3<br>**----- End of picture text -----**<br>


4.   INCLUDES FLANGE DISTORTION @ OUTER EDGE. 

|**Qualification information**†|**Qualification information**†|**Qualification information**†|
|---|---|---|
|Qualification level|(per JEDEC JESD47F<br>††guidelines)<br>Industrial||
|Moisture Sensitivity Level|D2Pak|MS L1<br>(per JE DE C J-S TD-020D<br>††)<br>guidelines)|
||TO-262|(per JE DE C J<br>)<br>Not applicable|
|RoHS compliant|Not applicable<br>Yes||



## **Revision History** 

|**Date**|**Comment**|
|---|---|
|11/6/2014|•Updated EAS (L =1mH)= 1452mJ on page 2<br>•Updated note 9  “Limited by TJmax, starting TJ= 25°C, L = 1mH, RG= 50Ω, IAS= 54A, VGS=10V”.  on page 2<br>• Updated package outline on page 9 & 10|



**IR WORLD HEADQUARTERS:** 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 

## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . 

With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( **www.infineon.com** ). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 



## Links

- [View this product on Novapart](https://novapart.co/products/IRFS7430TRLPBF/power-mosfet-n-channel-40-v-195-a-1200-ohm-to)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/irfs7430trlpbf/mosfet-n-ch-40v-195a-to-263ab/dp/2617414)
---

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