# Power MOSFET, N Channel, 150 V, 33 A, 0.0345 ohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2580026/)

**URL**: https://novapart.co/products/IRFS5615TRLPBF/power-mosfet-n-channel-150-v-33-a-00345-ohm-to-263
**SKU**: IRFS5615TRLPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.3770
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Power Dissipation | 144W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 144W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.0345ohm |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 150V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 33A |
| Drain Source On State Resistance | 0.0345ohm |
| Gate Source Threshold Voltage Max | 5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2580026/)

## IRFS5615PbF IRFSL5615PbF 

## **Features** 

- Key Parameters Optimized for Class-D Audio 

- Amplifier Applications 

- Low RDSON for Improved Efficiency 

- Low QG and QSW for Better THD and Improved 

- Efficiency 

- Low QRR for Better THD and Lower EMI 

- 175°C Operating Junction Temperature for 

Ruggedness 

- Can Deliver up to 300W per Channel into Ω oad in 

- Half-Bridge Configuration Amplifier 

|VDS|||**Key Parameters**|**Key Parameters**|**Key Parameters**|150<br>V<br>**Parameters**|150<br>V<br>**Parameters**||
|---|---|---|---|---|---|---|---|---|
|RDS(ON)typ. @ 10V|||||||34.5<br>m<br>~~ee~~||
|Qgtyp.|||||||26<br>nC<br>~~po~~||
|Qswtyp.|||||||11<br>nC<br>~~ee~~||
|RG(int)typ.|||||||2.7<br>Ω<br>~~ee~~||
|TJmax|||||||175<br>°C<br>~~pO~~||
|||D||||D|D||
|G|||||||S<br>D<br>G<br>S<br>G||
|||S|||||D2Pak<br>TO-262||
|||||||IRFS5615PbF<br>IRFSL5615PbF|||
||||||||||
|**G**||||||**D**|**S**||
|Gate||||||Drain<br>Source|||



## **Description** 

This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes the latest processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery and internal Gate resistance are optimized to improve key Class-D audio amplifier performance factors such as efficiency, THD and EMI. Additional features of this MOSFET are 175°C operating junction temperature and repetitive avalanche capability. These features combine to make this MOSFET a highly efficient, robust and reliable device for ClassD audio amplifier applications. 

## **Absolute Maximum Ratings** 

||**Parameter**|**Max.**|**Units**|
|---|---|---|---|
|VDS|Drain-to-Source Voltage<br>~~a~~|150<br>~~a~~|V|
|VGS<br>~~——————~~|Gate-to-Source Voltage<br>~~a~~<br>~~——————~~|±20<br>~~a~~<br>~~G~~||
|ID@ TC= 25°C<br>~~——————~~|Continuous Drain Current, VGS@ 10V<br>~~a~~<br>~~——————~~|33<br>~~a~~<br>~~G~~|A|
|ID@ TC= 100°C<br>~~——————~~|Continuous Drain Current, VGS@ 10V<br>~~a~~<br>~~——————~~|24<br>~~a~~<br>~~G~~||
|IDM<br>~~——————~~|Pulsed Drain Current<br>~~——————~~<br>~~en~~|140<br>~~G~~<br>~~en~~||
|PD@TC= 25°C<br>~~——————~~|Power Dissipation<br>~~——————~~<br>~~a~~<br>~~en~~|144<br>~~G~~<br>~~a~~<br>~~en~~|W|
|PD@TC= 100°C|Power Dissipation<br>~~en~~|72<br>~~en~~||
||Linear DeratingFactor<br>~~en~~<br>~~a~~|0.96<br>~~en~~<br>~~a~~|W/°C<br>~~a~~|
|TJ<br>TSTG|Operating Junction and<br>Storage Temperature Range<br>~~a~~|-55  to + 175<br>~~a~~|°C<br>~~a~~|
||Soldering Temperature, for 10 seconds<br>(1.6mm from case)|300||



> Notes ® hrough © are on page 2 

www.irf.com 

1 12/18/08 

## **Electrical Characteristics @ TJ = 25°C (unless otherwise specified)** 

||**Parameter**<br>~~a~~|**Min.**<br>~~I~~|**Typ.**<br>~~I~~|**Max. **<br>~~Ps~~|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|BVDSS|Drain-to-Source Breakdown Voltage<br>~~a~~<br>~~a~~|150<br>~~I~~<br>~~Gt~~<br>|–––<br>~~I~~<br>~~I~~<br>|–––<br>~~Ps~~<br>~~Gs~~<br>|V<br>|VGS= 0V, ID= 250µA<br>|
|∆ΒVDSS/∆TJ|Breakdown Voltage Temp. Coefficient<br>~~a~~<br>~~rs~~<br>~~a~~|–––<br>~~I ~~<br>~~rs~~<br>~~Gt~~<br>|0.18<br> ~~I ~~<br>~~rs~~<br>~~I~~<br>|–––<br> ~~Ps~~<br>~~rs~~<br>~~Gs~~<br>|V/°C<br>~~rs~~<br>|Reference to 25°C, ID= 1mA<br>~~rs~~<br>|
|RDS(on)<br>~~Senne~~|Static Drain-to-Source On-Resistance<br>~~a~~<br>~~Senne~~|–––<br>~~Gt~~<br>~~(©~~<br>|34.5<br>~~I~~<br>~~(©~~<br>|42<br>~~Gs~~<br>~~(©~~<br>|mΩ<br>~~(©~~<br>|VGS= 10V, ID= 21A<br>~~(©~~<br>|
|VGS(th)<br>~~Senne~~|Gate Threshold Voltage<br>~~a ~~<br>~~Senne~~<br>~~a~~|3.0<br>~~Gt ~~<br> ~~(©~~<br>~~EE~~<br>~~Ge~~|–––<br> ~~I ~~<br>~~(©~~<br>~~EE~~<br>~~ee~~|5.0<br> ~~Gs~~<br>~~(©~~<br>~~EE~~<br>~~ee~~|V<br>~~(©~~<br>~~EE~~<br>~~ee~~|VDS= VGS, ID= 100µA<br>~~(©~~<br>~~EE~~<br>~~ee~~|
|∆VGS(th)/∆TJ<br>~~Senne~~|Gate Threshold Voltage Coefficient<br> <br>~~Senne ~~<br>~~ee~~<br>~~a~~|–––<br> ~~(©~~<br> ~~EE~~<br>~~ee~~<br>~~Ge~~|-13<br>~~(©~~<br>~~EE~~<br>~~ee~~<br>~~ee~~|–––<br>~~(©~~<br>~~EE~~<br>~~ee~~<br>~~ee~~|mV/°C<br>~~(©~~<br>~~EE~~<br>~~ee~~<br>~~ee~~||
|IDSS<br>~~Senne~~|Drain-to-Source Leakage Current<br> <br>~~Senne ~~<br>~~a~~|–––<br> ~~(©~~<br> <br>~~Ge~~|–––<br>~~(©~~<br><br>~~ee~~|20<br>~~(©~~<br><br>~~ee~~|µA<br>~~(©~~<br><br>~~ee~~|VDS= 150V, VGS= 0V<br>~~(©~~<br><br>~~ee~~|
|||–––<br>~~Ge~~|–––<br>~~ee~~|250<br>~~ee~~||VDS= 150V, VGS= 0V, TJ= 125°C<br>~~ee~~|
|IGSS|Gate-to-Source Forward Leakage<br>~~A~~|–––<br>~~A~~|–––<br>~~A~~|100<br>~~A~~|nA<br>~~A~~|VGS= 20V<br>~~A~~|
||Gate-to-Source Reverse Leakage<br>~~A~~|–––<br>~~A~~<br>~~ff]~~|–––<br>~~A~~<br>~~ff]~~<br>~~GR~~|-100<br>~~A~~<br>~~ff]~~<br>~~Gs~~||VGS= -20V<br>~~A~~|
|gfs|Forward Transconductance<br>~~Gs~~|35<br>~~Gs~~<br>~~Ge~~|–––<br>~~Gs~~<br>~~GR~~|–––<br>~~Gs~~<br>~~Gs~~|S<br>~~Gs~~|VDS= 50V, ID= 21A<br>~~Gs~~|
|Qg|Total Gate Charge<br>~~ee~~|–––<br>~~ee~~<br>~~Ge~~<br>~~Gs~~|26<br>~~GR ~~<br>~~ee~~|40<br> ~~Gs~~<br>~~ee~~|nC|See Fig. 6 and 19<br>VGS= 10V<br>ID= 21A<br>VDS=75V|
|Qgs1|Pre-Vth Gate-to-Source Charge<br>~~a~~|–––<br>~~Ge~~<br>~~a~~<br>~~Gs~~<br>~~Ge~~|6.4<br>~~a~~|–––<br>~~a~~|||
|Qgs2|Post-Vth Gate-to-Source Charge<br>~~en~~|–––<br>~~Gs~~<br>~~en~~<br>~~Ge~~<br>~~es~~|2.2<br>~~en~~|–––<br>~~en~~|||
|Qgd|Gate-to-Drain Charge<br>~~a~~|–––<br>~~Ge~~<br>~~a~~<br>~~es~~<br>~~ee~~|9.0<br>~~a~~|–––<br>~~a~~|||
|Qgodr|Gate Charge Overdrive<br>~~ee~~<br>~~a~~|–––<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~es~~|8.9<br>~~ee~~|–––<br>~~ee~~|||
|Qsw|Switch Charge (Qgs2+ Qgd)<br>~~a~~<br>~~a~~|–––<br>~~ee~~<br>~~a~~<br>~~es~~|11<br>~~a~~|–––<br>~~a~~|||
|RG(int)|Internal Gate Resistance<br>~~a~~<br>~~es~~|–––<br>~~es~~<br>~~es~~|2.7|5.0|Ω|@|
|td(on)|Turn-On DelayTime<br>~~a~~<br>~~es~~|–––<br>~~es~~<br>~~es~~<br>~~ee~~|8.9|–––|ns|ID= 21A<br>RG= 2.4Ω<br>VDD= 75V, VGS= 10V<br>@|
|tr|Rise Time<br>~~es ~~<br>~~ee~~|–––<br> ~~es~~<br>~~ee~~<br>~~ee~~<br>~~es~~|23.1<br>~~ee~~|–––<br>~~ee~~|||
|td(off)|Turn-Off DelayTime<br>~~a~~|–––<br>~~ee~~<br>~~a~~<br>~~es~~<br>~~ee~~|17.2<br>~~a~~|–––<br>~~a~~|||
|tf|Fall Time<br>~~ee~~|–––<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~es~~|13.1<br>~~ee~~|–––<br>~~ee~~|||
|Ciss|Input Capacitance<br>~~a~~|–––<br>~~ee~~<br>~~a~~<br>~~es~~<br>~~ee~~|1750<br>~~a~~|–––<br>~~a~~|pF|ƒ= 1.0MHz,          See Fig.5<br>VGS= 0V<br>VDS= 50V|
|Coss|Output Capacitance<br>~~ee~~|–––<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~es~~|155<br>~~ee~~|–––<br>~~ee~~|||
|Crss|Reverse Transfer Capacitance<br>~~a~~|–––<br>~~ee~~<br>~~a~~<br>~~es~~|40<br>~~a~~|–––<br>~~a~~|||
|Coss|Effective Output Capacitance<br>~~a~~|–––<br>~~es~~<br>~~a~~|175<br>~~a~~|–––<br>~~a~~||VGS= 0V, VDS= 0V to 120V|
|LD|Internal Drain Inductance<br>~~a~~<br>~~Se~~|–––<br>~~a~~<br>~~Se~~|4.5<br>~~a~~<br>~~Se~~|–––<br>~~a~~<br>~~Se~~|nH|S<br>D<br>G<br>Between  lead,<br>6mm (0.25in.)<br>from package<br>and center of die contact<br>~~iS~~|
|LS|Internal Source Inductance<br>~~Se~~<br>~~Pe~~|–––<br>~~Se~~<br>~~Pe~~|7.5<br>~~Se~~<br>~~Pe~~|–––<br>~~Se~~<br>~~Pe~~|||



Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive avalanche information 

Repetitive rating;  pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 0.51mH, RG = 25Ω, IAS = 21A. Pulse width ≤ 400µs; duty cycle ≤ 2%. 

When mounted on 1" square PCB (FR-4 or G-10 Material).  For recommended footprint and soldering techniques refer to application note #AN-994. 

Rθ is measured at TJ of approximately 90°C. 

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1000<br>VGS<br>TOP           15V<br>12V<br>100 10V<br>8.0V<br>7.0V<br>6.0V<br>5.5V<br>10 BOTTOM 5.0V<br>Zi<br>1 P e<br>5.0V<br>0.1<br>≤60µs PULSE WIDTH<br>Tj = 25°C<br>0.01 = e SER<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 1.** Typical Output Characteristics 

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1000<br>ee ee ee ee ee ee ee<br>100<br>TJ = 175°C 2<br>— a ee<br>PRE TJ = 25°C Ft<br>10<br>a o)<br>S S<br>1<br>H L} ——<br>VDS = 50V<br>PR<br>≤60µs PULSE WIDTH<br>0.1 P ATT<br>2 4 6 8 10 12 14 16<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 3.** Typical Transfer Characteristics 

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100000<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED<br>C  = C<br>= rss   gd<br>C = C + C<br>10000 oss   ds  gd<br>C<br>iss<br>= ll<br>1000<br>C<br>S C oss H S<br>rss<br>100<br>a | a<br>a<br>a<br>10<br>1 10 100 1000<br>VDS, Drain-to-Source Voltage (V)<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs.Drain-to-Source Voltage 

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1000<br>VGS<br>TOP           15V<br>12V<br>10V<br>100 8.0V7.0V<br>6.0V<br>5.5V<br>BOTTOM 5.0V<br>10<br>e e<br>a 5.0V<br>1<br>≤60µs PULSE WIDTH<br>Tj = 175°C<br>0.1 PT Po<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>3.0<br>ID = 21A<br>VGS = 10V VAs<br>2.5 Sanenvan<br>2.0 P t tT ttt TTY<br>SORGRGE5 4000<br>1.5<br>S EREEEPAREEE<br>1.0 E AE<br>Bap Zeneeeee<br>0.5 eT tt tT tT ty<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

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14.0<br>ID= 21A<br>12.0<br>[ti VDS= 120V t y<br>10.0 VDS= 75V<br>VDS= 30V<br>8.0<br>6.0 y A<br>4.0<br>A TT<br>2.00.0 J} | | |}<br>0 5 10 15 20 25 30 35<br> QG,  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 6.** Typical Gate Charge vs.Gate-to-Source Voltage 

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1000 1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>100<br>-—}—} +} p e ern || |<br>100 1 00µsec<br>a ee7es ” ee 2 aanee ee eee ee Sai} 1msec mE " Po<br>= TJ = 175°C 10 PO 10msec S a<br>TJ = 25°C<br>10<br>| | f f | | PP DC A L RRe Fy<br>1<br>Tc = 25°C — a<br>VGS = 0V Tj = 175°CSingle Pulse<br>1.0 0.1 akil A<br>0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1 10 100 1000<br>VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 7.   Typical Source-Drain Diode Forward Voltage Fig 8.   Maximum Safe Operating Area<br>40 6.0<br>35 P t | | 5.5 aP a eeEEee ee ee eee<br>e e eee 5.0 |p |fPe]etT t l hm hr<br>30<br>25 P oP KE>> N 4.5 PaSe | [RS88&S._] ee S ee ee dEee,SeerN ee<br>4.0<br>— 7SSS<br>20 P EE [[KA]] 3.5 |_ | PSASe ee eee<br>ID = 100µA<br>15 P E EKNN 3.0 |_ | - || ID = 250uA AZIZKAAAASRYSAINI |<br>2.5 ID = 1.0mA<br>10 P ot | EN — ID = 1.0A ptt| N)]NS KR]<br>= TION<br>2.0<br>e ee | | ) | | |NANI<br>5 e e<br>1.5<br>0 PoEoE | EN 1.0 e a eeee ee ee e eeeee<br>25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175<br> TC , Case Temperature (°C) TJ , Temperature ( °C )<br>ID,  Drain-to-Source Current (A)<br>ID,  Drain Current (A)<br>VGS(th), Gate threshold Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


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40<br>35 P t | |<br>e e eee<br>30<br>25 P oP KE>> N<br>20 P EE [[KA]]<br>P E EKNN<br>15<br>10 P ot | EN<br>e ee<br>5<br>| EN<br>0 PoEoE<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

**Fig 10.** Threshold Voltage vs. Temperature 

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10<br>a a ee ee ee ee ee ee ee QO OOo OOOO<br>1 S eneee ee<br>D = 0.50<br>e e<br>_| 0.20 a ee eeeeeee ee ee eeeeee e e ee e<br>0.1 e 0.020.010.050.10 e τJ τJτ1τ1 R1 R1 τ2 τR22 R2 Rτ33 R τ3 3 τR4τ4R4 4 τCτ HEE Ri (°C/W)   0.02324    0.0000080.26212    0.0001060.50102    0.001115 τi (sec)<br>a e T T T T |<br>0.01 a oe mm Ci= Ciτi/Rii/Ri | 0.25880    0.005407<br>Notes:<br>PEE SINGLE PULSE SEE EE<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>2. Peak Tj = P dm x Zthjc + Tc<br>EEE Prt ns ilLH<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 11.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


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0.4 500<br>0.35 TTI I D  = 21A 450 T TT ID<br>TOP          2.8A<br>Saaan 400 E TT 5.3A<br>0.3<br>BOTTOM 21A<br>350<br>0.25 PEE ET NP CCCNT<br>300<br>0.2 250<br>200 iN IN<br>0.15<br>150<br>Zan | B NERNEEEEEEE<br>0.1 T = 125°C<br>J<br>He EH 100 S SN<br>0.05<br>Pepe 50 P PR EARN TT<br>0 Pr TJ = 25°C 0 P CE RSS<br>4 6 8 10 12 14 16 18 20 25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>VGS, Gate -to -Source Voltage  (V)<br>)Ω<br>RDS(on),  Drain-to -Source On Resistance (<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


## **Fig 12.** On-Resistance Vs. Gate Voltage 

**Fig 13.** Maximum Avalanche Energy Vs. Drain Current 

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100<br>Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming ∆Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>0.01<br>10<br>a na 00,<br>0.05<br>0.10<br>1<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming ∆Τ j = 25°C and<br>Tstart = 150°C.<br>Sse eSs<br>0.1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14.   Typical Avalanche Current Vs.Pulsewidth<br>Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>(For further info, see AN-1005 at www.irf.com)<br>120<br>1. Avalanche failures assumption:<br>TOP          Single Pulse<br>  Purely a thermal phenomenon and failure occurs at a<br>100 BOTTOM   1.0% Duty CycleID = 21A     temperature far in excess of T    every part type. jmax. This is validated for<br>T ._<br>2. Safe operation in Avalanche is allowed as long as neither<br>80    Tjmax nor Iav (max) is exceeded<br>S oo 3. Equation below based on circuit and waveforms shown in<br>  Figures 17a, 17b.<br>60 4. PD (ave) = Average power dissipation per single<br>P ANETT<br>    avalanche pulse.<br>5. BV = Rated breakdown voltage (1.3 factor accounts for<br>40     voltage increase during avalanche).<br>L LANE TE 6. Iav = Allowable avalanche current.<br>7. ∆T = Allowable rise in junction temperature, not to exceed<br>20<br>C ONST     Tjmax (assumed as 25°C in Figure 14, 15).<br>  tav = Average time in avalanche.<br>0 E TS   D = Duty cycle in avalanche =  tav ·f<br>25 50 75 100 125 150 175   ZthJC(D, tav) = Transient thermal resistance, see figure 11)<br>PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = T/ ZthJCthJC<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


2. Safe operation in Avalanche is allowed as long as neither Tjmax nor Iav (max) is exceeded 

**PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = T/ ZthJCthJC Iav = 2 T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav** 

**Fig 15.** Maximum Avalanche Energy Vs. Temperature 

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Driver Gate Drive<br>P.W.<br>D.U.T + {+ P.W. Period ——— — D = —— Period<br>) [©)] Circuit    • Low StrayLayoutInductConsiderations ) t V | GS=10V<br>•<br>-<br>+ CurrentowLeakageTransformerInductance 2) D.U.T. ISD Waveform<br>= ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 _ VDD<br>ma<br>•  Re-Applied<br>•  riversame type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re ( 4) •  vidtcontrolled by Rg VDD -<br>•  D.U.T. - Device Under Test ee ee<br>Ripple  ≤ 5% ISD<br>o” sp controlled by Duty Factor"D" ®<br>* Vgg = 5V for Logic Level Devices<br>Fig 16. eak Diode Recovery dv/dt Test Circuit or N-Channel<br>HEXFET ® ower MOSFETs<br>V(BR)DSS<br>15V ~—— tp -><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>¢ 20V ab<br>tp 0.01 A Ω IAS —<br>**----- End of picture text -----**<br>


**Fig 17a.** Unclamped Inductive Test Circuit 

**Fig 17b.** Unclamped Inductive Waveforms 

**==> picture [128 x 58] intentionally omitted <==**

**----- Start of picture text -----**<br>
+<br>-<br> 1<br> 0.1 %<br>**----- End of picture text -----**<br>


## **Fig 18a.** Switching Time Test Circuit 

**==> picture [187 x 132] intentionally omitted <==**

**----- Start of picture text -----**<br>
Current Regulator<br>Same Type as D.U.T.<br>|! 12V .2µF 50KΩ |<br>! : LJ .3µF | J +<br>D.U.T. -VDS<br>VGS<br>3mA<br>se IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


**Fig 19a.** Gate Charge Test Circuit 

**==> picture [191 x 121] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS<br>90%<br>\<br>10%<br>/\<br>VGS ele ns<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


## **Fig 18b.** Switching Time Waveforms 

**==> picture [162 x 131] intentionally omitted <==**

**----- Start of picture text -----**<br>
Id<br>Vds<br>fl Vgs<br>f<br>Vgs(th)<br>la g pl e v i s a p , !<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 19b.** Gate Charge Waveform 

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6 

**Note: For the most current drawing please refer to IR website at http://www.irf.com/package/** 

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## TO-262 Package Outline 

Dimensions are shown in millimeters (inches) 

## TO-262 Part Marking Information 

**Note: For the most current drawing please refer to IR website at http://www.irf.com/package/** 

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Dimensions are shown in millimeters (inches) 

**==> picture [405 x 432] intentionally omitted <==**

**----- Start of picture text -----**<br>
TRR<br>1.60 (.063)<br>1.50 (.059)<br>1.60 (.063)<br>4.10 (.161)<br>1.50 (.059)<br>3.90 (.153) 0.368 (.0145)<br>0.342 (.0135)<br>ia |<br>FEED DIRECTION 1.85 (.073) 7 11.60 (.457)<br>1.65 (.065) 11.40 (.449) 24.30 (.957)<br>15.42 (.609)<br>23.90 (.941)<br>15.22 (.601)<br>TRL<br>0000 $OGO8 TI 1<br>10.90 (.429) - | 1.75 (.069)1.25 (.049)<br>10.70 (.421) 4.72 (.136)<br>CT 16.10 (.634) J s+ 4.52 (.178)<br>15.90 (.626)<br>FEED DIRECTION<br>13.50 (.532) 27.40 (1.079)<br>12.80 (.504) 23.90 (.941) 1<br>4<br>330.00 60.00 (2.362)<br>(14.173)       MIN.<br>  MAX.<br>| OO |<br>a = 30.40 (1.197)<br>NOTES :       MAX.<br>1.   COMFORMS TO EIA-418.<br>2.   CONTROLLING DIMENSION: MILLIMETER. 26.40 (1.039)24.40 (.961) I 4<br>3.   DIMENSION MEASURED @ HUB.<br>3<br>4.   INCLUDES FLANGE DISTORTION @ OUTER EDGE.<br>**----- End of picture text -----**<br>


## **Note: For the most current drawing please refer to IR website at http://www.irf.com/package/** 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 12/2008 

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## Links

- [View this product on Novapart](https://novapart.co/products/IRFS5615TRLPBF/power-mosfet-n-channel-150-v-33-a-00345-ohm-to-263)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/en-ES/infineon/irfs5615trlpbf/mosfet-n-ch-150v-33a-to-263-3/dp/2580026)
---

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