# Power MOSFET, N Channel, 200 V, 24 A, 0.0775 ohm, TO-263AB, Surface Mount

![Product image](https://novapart.co/image/farnell:2725992RL/)

**URL**: https://novapart.co/products/IRFS4620TRLPBF/power-mosfet-n-channel-200-v-24-a-00775-ohm-to
**SKU**: IRFS4620TRLPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.6410
**Stock**: 500+
**Lead Time**: 162 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:24A; Drain Source Voltage Vds:200V; On Resistance Rds(on):0.0637ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:5V; P

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Qualification | - |
| Power Dissipation | 144W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263AB |
| Drain Source Voltage Vds | 200V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 24A |
| Drain Source On State Resistance | 0.0775ohm |
| Gate Source Threshold Voltage Max | 5V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2725992RL/)

96203 

## IRFS4620PbF IRFSL4620PbF 

HEXFET Power MOSFET 

## **Applications** 

High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits 

## **Benefits** 

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

> : Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability Lead-Free 

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D VDSS 200V<br>RDS(on)   typ. 63.7m<br>G               max. 77.5m Q<br>S ID  pd 24A<br>D D<br>S S<br>D<br>G G<br>D [2] Pak TO-262<br>IRFS4620PbF IRFSL4620PbF<br>**----- End of picture text -----**<br>


|**G**|**D**|**S**|
|---|---|---|
|Gate|Drain|Source|



## **Absolute Maximum Ratings** 

|**Symbol**|**Parameter**<br>**Units**<br>**Max.**|
|---|---|
|ID@ TC= 25°C<br>ID@ TC= 100°C<br>IDM<br>PD@TC= 25°C<br>VGS<br>dv/dt|Continuous Drain Current, VGS@ 10V<br>Continuous Drain Current, VGS@ 10V<br>Pulsed Drain Current<br>Maximum Power Dissipation<br>W<br>Linear DeratingFactor<br>W/°C<br>Gate-to-Source Voltage<br>V<br>Peak Diode Recovery<br>V/ns<br>A<br>144<br>54<br>24<br>17<br>100<br>± 20<br>0.96<br>~~a~~<br>~~ee~~<br>~~oe~~<br>~~**a**~~<br>~~©~~<br>~~GO~~<br>~~GO~~<br>~~a~~<br>~~GO~~<br>~~pf~~|
|TJ|Operating Junction and<br>-55  to + 175|
|TSTG|Storage Temperature Range<br>°C|
||Soldering Temperature, for 10 seconds<br>300|
||(1.6mm from case)|
|**Avalanche Characteristics**||
|EAS(Thermallylimited)|Single Pulse Avalanche Energy<br>mJ<br>113|
|IAR|Avalanche Current<br>A<br>See Fig. 14, 15, 22a, 22b,|
|EAR|Repetitive Avalanche Energy<br>mJ|
|**Thermal Resistance**||
|**Symbol**|**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**|
|RθJC<br>RθJA|Junction-to-Case<br>–––<br>1.045<br>Junction-to-Ambient(PCB Mount)<br>–––<br>40<br>°C/W<br>~~——~~|



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**Static @ TJ = 25°C (unless otherwise specified)** 

|**Static @ TJ = 25°C (unless otherwise specified)J = 25°C (unless otherwise specified) = 25°C (unless otherwise specified)**||
|---|---|
|**Symbol**<br>**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|V(BR)DSS<br>Drain-to-Source Breakdown Voltage<br>200<br>–––<br>–––<br>V<br>VGS= 0V, ID= 250µA<br>~~GG~~<br>~~QO~~||
|∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient<br>–––<br>0.23<br>–––<br>V/°C<br>RDS(on)<br>Static Drain-to-Source On-Resistance<br>–––<br>63.7<br>77.5<br>mΩ<br>VGS(th)<br>Gate Threshold Voltage<br>3.0<br>–––<br>5.0<br>V<br>IDSS<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>–––<br>–––<br>250<br>IGSS<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>RG(int)<br>Internal Gate Resistance<br>–––<br>2.6<br>–––<br>Ω<br>**Dynamic @ TJ = 25°C (unless otherwise specified)**<br>VGS= 20V<br>VGS= -20V<br>Reference to 25°C, ID= 5mA<br>VGS= 10V, ID= 15A<br>VDS= VGS, ID= 100µA<br>VDS= 200V, VGS= 0V<br>VDS= 200V, VGS= 0V, TJ= 125°C<br>µA<br>nA<br>~~Pf~~<br>~~QO~~<br>~~GO~~<br>~~QO~~<br>~~Gs~~<br>~~QO~~<br>~~QOD QO QO~~<br>~~elee~~<br>~~||~~<br>~~ee~~<br>~~a~~<br>~~Qs~~<br>~~Gs GO~~<br>~~QO QO~~||
|**Symbol**<br>**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|gfs<br>Forward Transconductance<br>37<br>–––<br>–––<br>S<br>VDS= 50V, ID= 15A<br>~~GG GO~~||
|Qg<br>Total Gate Charge<br>–––<br>25<br>38<br>ID= 15A<br>~~a~~||
|Qgs<br>Gate-to-Source Charge<br>–––<br>8.2<br>–––<br>Qgd<br>Gate-to-Drain("Miller")Charge<br>–––<br>7.9<br>–––<br>VDS= 100V<br>VGS= 10V<br>nC<br>~~a~~<br>~~a~~<br>®||
|Qsync<br>Total Gate Charge Sync. (Qg- Qgd)<br>–––<br>17<br>–––<br>ID= 15A, VDS=0V, VGS= 10V<br>~~a~~||
|td(on)<br>Turn-On DelayTime<br>–––<br>13.4<br>–––<br>VDD= 130V<br>~~a~~||
|tr<br>Rise Time<br>–––<br>22.4<br>–––<br>td(off)<br>Turn-Off DelayTime<br>–––<br>25.4<br>–––<br>ID= 15A<br>RG= 7.3Ω<br>ns<br>~~a~~<br>~~a~~||
|tf<br>Fall Time<br>–––<br>14.8<br>–––<br>VGS= 10V<br>~~a~~<br>@||
|Ciss<br>Input Capacitance<br>–––<br>1710<br>–––<br>VGS= 0V<br>~~a~~||
|Coss<br>Output Capacitance<br>–––<br>125<br>–––<br>VDS= 50V<br>~~a~~||
|Crss<br>Reverse Transfer Capacitance<br>–––<br>30<br>–––<br>Cosseff. (ER) Effective Output Capacitance(EnergyRelated)<br>–––<br>113<br>–––<br>Cosseff. (TR) Effective Output Capacitance(Time Related)<br>–––<br>317<br>–––<br>ƒ= 1.0MHz(See Fig.5)<br>VGS= 0V, VDS= 0V to 160V<br>(See Fig.11)<br>VGS= 0V, VDS= 0V to 160V<br>pF<br>~~a~~<br>~~=)~~<br>~~©~~<br>~~ee~~<br>~~®~~||
|**Diode Characteristics**||
|**Symbol**<br>**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|S<br>D<br>G<br>IS<br>Continuous Source Current<br>(BodyDiode)<br>ISM<br>Pulsed Source Current<br>(BodyDiode)<br>VSD<br>Diode Forward Voltage<br>–––<br>–––<br>1.3<br>V<br>trr<br>Reverse Recovery Time<br>–––<br>78<br>–––<br>TJ= 25°C<br>VR= 100V,<br>–––<br>99<br>–––<br>TJ= 125°C<br>IF= 15A<br>Qrr<br>Reverse Recovery Charge<br>–––<br>294<br>–––<br>TJ= 25°C<br>di/dt = 100A/µs<br>–––<br>432<br>–––<br>TJ= 125°C<br>IRRM<br>Reverse RecoveryCurrent<br>–––<br>7.6<br>–––<br>A<br>TJ= 25°C<br>MOSFET symbol<br>showing  the<br>TJ= 25°C, IS= 15A, VGS= 0V<br>integral reverse<br>p-njunction diode.<br>A<br>–––<br>–––<br>–––<br>–––<br>ns<br>nC<br>24<br>100<br>~~ee~~<br>~~pe~~<br>~~a~~<br>~~ee~~<br>~~e~~~~**e**~~<br>~~fT~~<br>~~rs S~~<br>~~fT~~<br>~~a~~||
|ton<br>Forward Turn-On Time<br>Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~Ge~~||



Repetitive rating;  pulse width limited by max. junction temperature. 

fe) Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 

@ Limited by TJmax, starting TJ = 25°C, L = 1.0mH © Coss eff. (ER) is a fixed capacitance that gives the same energy as RG = 25Ω, IAS = 15A, VGS =10V. Part not recommended for use Coss while VDS is rising from 0 to 80% VDSS. above this value . 

@ When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom ® ISD ≤ 15A, di/dt ≤ 634A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. mended footprint and soldering techniques refer to application note #AN-994. ® Pulse width ≤ 400µs; duty cycle ≤ 2%. R_ θ is measured at Ty approximately 90°C 

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1000<br>VGS<br>TOP           15V<br>12V<br>100 10V8.0V<br>7.0V<br>6.0V<br>5.5V<br>10 BOTTOM 5.0V<br>1<br>f e<br>pee 5.0V |<br>0.1<br>≤60µs PULSE WIDTH<br>Tj = 25°C<br>0.01 Saaiiinetitieeni<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics<br>1000<br>es ee ee ee ee ee ee<br>100 e e ee<br>TJ = 175°C<br>ee oo oe<br>T = 25°C<br>10 J<br>PoHER Ep EY<br>1 SS VDS = 50V<br>≤60µs PULSE WIDTH<br>0.1 PAPAPt 4 FE<br>2 4 6 8 10 12 14 16<br>VGS, Gate-to-Source Voltage (V)<br>Fig 3.   Typical Transfer Characteristics<br>100000<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED<br>= Crss   = C gd<br>C = C + C<br>10000 oss   ds  gd<br>Ciss<br>1000<br>C<br>oss<br>100 P SR SCH<br>C<br>a rss<br>ee ee a, ll<br>0<br>10<br>1 10 100 1000<br>VDS, Drain-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

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1000<br>VGS<br>TOP           15V<br>12V<br>10V<br>100 8.0V7.0V<br>6.0V<br>5.5V<br>BOTTOM 5.0V<br>10<br>ames acest 5.0V esta<br>1 ZA<br>≤60µs PULSE WIDTH<br>Tj = 175°C<br>0.1 Pi 1<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>3.5<br>ID = 15A<br>3.0 VGS = 10V<br>TT eey<br>2.5 /<br>2.0<br>1.5<br>S eeeeeS 4eeee<br>1.0<br>w,<br>0.5 BPerEpZEETeneET<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>Fig 4.   Normalized On-Resistance vs. Temperature<br>14.0<br>ID= 15A<br>12.0 VDS= 160V<br>T IT VDS= 100V Ty<br>10.0 VDS= 40V<br>8.0<br>6.0<br>4.0<br>P Y] | | fd<br>2.00.0 TAGEEEEE AT TT Td<br>0 5 10 15 20 25 30 35<br> QG,  Total Gate Charge (nC)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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100 1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>100<br>P| LAA FL 7.<br>100µsec<br>TJ = 175°C 1msec<br>T = 25°C<br>J<br>10 10<br>10msec<br>DC<br>1<br>Tc = 25°C<br>Tj = 175°C<br>VGS = 0V Single Pulse<br>1.0 iee e 0.1 RE Et<br>0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1 10 100 1000<br>VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 7.   Typical Source-Drain Diode Fig 8.   Maximum Safe Operating Area<br>Forward Voltage<br>30 260<br>Id = 5mA<br>250<br>25<br>ELLE LL Ae<br>240<br>S ET T LL<br>20<br>230<br>S O E EA<br>15<br>220<br>S e S RREDZ 00008<br>10<br>210<br>5 e t \ 200 B EDZARREEEEE<br>0 S| Lt E |  tNLIN 190 P ELELLELL<br>25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100120140160180<br> TC , Case Temperature (°C) TJ , Temperature ( °C )<br>Fig 9.   Maximum Drain Current vs. Fig 10.   Drain-to-Source Breakdown Voltage<br>Case Temperature<br>3.0 500<br>450 ID<br>2.5 TOP          2.05A<br>p t tt t y 400 C CE  2.94A<br>BOTTOM  15A<br>350<br>2.0<br>RARE<br>300<br>1.5 a e s 250 C ACECEECECC<br>200<br>1.0 aa P ERCE<br>150<br>7 P SEXEEEEETT<br>100<br>0.5<br>| A SS<br>50<br>0.0 <a 0 C ECE RSS<br>-50 0 50 100 150 200 25 50 75 100 125 150 175<br>VDS, Drain-to-Source Voltage (V) Starting TJ , Junction Temperature (°C)<br>ID,  Drain-to-Source Current (A)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>Energy (µJ)<br>ID,  Drain Current (A)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 10.** Drain-to-Source Breakdown Voltage 

**Fig 11.** Typical COSS Stored Energy 

**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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10<br>a a ee<br>1 a<br>Pt D = 0.50 mmr<br>| 0.20 ce 8 ee ee ee<br>0.1 e 0.10 e e R1 R1 R2 R2 I Ri (°C/W)    τi (sec)<br>0.05 τJ τJ τCτ 0.456      0.000311<br>; 0.020.01 Sea eee eee τ1τ1 τ2τ2 0.589      0.003759 Ly<br>0.01 o e nee | Ci=  T Ciτi/Rii/Ri T illTH<br>Notes:<br>SINGLE PULSE<br>Per TIP TAR Pp 1. Duty Factor D = t1/t2 TE<br>( THERMAL RESPONSE )<br>Pt ain 2. Peak Tj = P dm x Zthjc + Tc il<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


**Fig 13.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

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100<br>Py Duty Cycle = Single Pulse Pe<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming ∆Tj = 150°C and<br>Serine tee nl<br>10 0.01 Tstart =25°C (Single Pulse)<br>a spire Ne a Hl<br>FL—— 0.05 EPSSE NE TE AN PTT<br>0.10<br>rE<br>1<br>RO rama ns<br>F F ESS<br>{J —_+—_t Aye ee SS<br>| Allowed avalanche Current vs avalanche  aae<br>pulsewidth, tav, assuming ∆Τ j = 25°C and<br>Tstart = 150°C.<br>PP R<br>0.1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 14.** Typical Avalanche Current vs.Pulsewidth 

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120 Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse                 (For further info, see AN-1005 at www.irf.com)<br>BOTTOM   1.0% Duty Cycle 1. Avalanche failures assumption:<br>100 ID = 15A<br>excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type.<br>80 2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded.<br>b ee<br>A NSE 4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse.<br>60<br>during avalanche).<br>H ASAN 6. Iav = Allowable avalanche current.<br>40 7. ∆T = Allowable rise in junction temperature, not to exceed∆T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed as<br>25°C in Figure 14, 15).<br>B UREN NUEREE tav = Average time in avalanche.<br>20 P UTINAL D = Duty cycle in avalanche =  tav ·f<br>ZthJC(D, tav) = Transient thermal resistance, see Figures 13)thJC(D, tav) = Transient thermal resistance, see Figures 13)(D, tav) = Transient thermal resistance, see Figures 13)av) = Transient thermal resistance, see Figures 13)) = Transient thermal resistance, see Figures 13)<br>L TBAN<br>0<br>ET PNY PD (ave) = 1/2 ( 1.3·BV·Iav) = A T/ ZthJC<br>25 50 75 100 125 150 175<br>Iav = 2 A T/ [1.3·BV·Zth]<br>Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tav<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)** 

- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. ∆T = Allowable rise in junction temperature, not to exceed∆T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). 

- ZthJC(D, tav) = Transient thermal resistance, see Figures 13)thJC(D, tav) = Transient thermal resistance, see Figures 13)(D, tav) = Transient thermal resistance, see Figures 13)av) = Transient thermal resistance, see Figures 13)) = Transient thermal resistance, see Figures 13) 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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6.0<br>a eeee ee ee<br>5.5<br>S ERSEEEEEE<br>5.0 e s a<br>e n en ee ee ee ee ee<br>4.5<br>S e ee ee<br>) | ASAT<br>4.0<br>S aeeSSSeae<br>3.5<br>3.0 _J IIDD  = 100µA= 250uA AZLANRKRI I<br>2.5 = ID = 1.0mA TAN<br>= ID = 1.0A 1A<br>2.0 | AEESSPt TT ONN<br>1.5 P e t N<br>1.0 ee ee<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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90<br>IF = 10A<br>80<br>|__|<br>VR = 100V<br>70 T J = 25°C Pf [ee<br>60 TJ = 125°C fet |<br>50<br>“4<br>40<br>30 P t | |<br>Fr<br>20 a f<br>10<br>0 | | |TT<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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90<br>IF = 15A<br>80 | | |<br>VR = 100V<br>Pf<br>70 T J = 25°C<br>60 TJ = 125°C a ee ae<br>50 eo<br>40 r ae<br>30 | | yy | |<br>20 | | Y| |<br>10 | o r | |<br>|<br>0 pt<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


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2000<br>IF = 10A<br>1800 pt<br>VR = 100V Paed<br>1600 T J = 25°C<br>1400 TJ = 125°C ae<br>1200 Tt<br>1000 P | eet<br>800 m L ae<br>600 | i | |<br>400 P Y7L<br>P T<br>200 tT<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>QRR (A)<br>**----- End of picture text -----**<br>


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2000<br>IF = 15A<br>1800 | |<br>VR = 100V<br>1600 T J = 25°C | [|.]<br>1400 TJ = 125°C Pt eet<br>Pa<br>1200<br>1000<br>e y o<br>P w ee<br>800<br>600 | rz eT| |<br>P are<br>400<br>|TT<br>200 P 7t | |<br>0 200 400 600 800 1000<br>diF /dt (A/µs)<br>QRR (A)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + {+ P.W. Period ——— — D = —— Period<br>) [©)]    •  CircuitLow  LayoutStray ConsiderationsInduct | t V t GS=10<br> •<br>- •   Low Leakage Inductance @ D.U.T. ISD Waveform<br>+<br>Reverse<br>Recovery Body Diode Forward<br>oi - [1] Current Transformer - ® + Current r Current di/dt AN<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 a VDD<br>ma<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re ( 4 •   dv/dt controlled by Rg Vpp -<br>•<br>D.U.T. - Device Under Test SOO |<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" @| t<br>* Vg = 5V for Logic Level Devices<br>Fig 21.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS(BR)DSS<br>15V —_ tp -><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>¢ 20VVGS dt<br>tp 0.01Ω<br>**----- End of picture text -----**<br>


**==> picture [163 x 115] intentionally omitted <==**

**----- Start of picture text -----**<br>
V(BR)DSS(BR)DSS<br>—_ tp -><br>IAS<br>**----- End of picture text -----**<br>


## **Fig 22b.** Unclamped Inductive Waveforms 

**Fig 22a.** Unclamped Inductive Test Circuit 

**==> picture [130 x 58] intentionally omitted <==**

**----- Start of picture text -----**<br>
+<br>-<br>≤ 1<br>≤ 0.1 %<br>**----- End of picture text -----**<br>


## **Fig 23a.** Switching Time Test Circuit 

**==> picture [134 x 132] intentionally omitted <==**

**----- Start of picture text -----**<br>
Current Regulator<br>Same Type as D.U.T.<br>50KΩ<br>12V .2µF .3µF ||<br>+<br>D.U.T. -VDS<br>VGS<br>3mA<br>WAV IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

**==> picture [192 x 121] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS<br>90%<br>\<br>10% /\<br>VGS «le ys<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


**==> picture [164 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Fig 23b.   Switching Time Waveforms<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Id<br>Vds<br>fl Vgs<br>i<br>Vgs(th)<br>a plag [p] [l] [e] w i e » !<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 24b.** Gate Charge Waveform 

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## TO-262 Package Outline 

Dimensions are shown in millimeters (inches) 

## TO-262 Part Marking Information 

www.irf.com 

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Dimensions are shown in millimeters (inches) 

**==> picture [405 x 202] intentionally omitted <==**

**----- Start of picture text -----**<br>
TRR<br>1.60 (.063)<br>1.50 (.059)<br>1.60 (.063)<br>4.10 (.161)<br>1.50 (.059)<br>3.90 (.153) 0.368 (.0145)<br>!00°00He | tL , Te 0.342 (.0135)<br>24_____ OS OO 4/8 -<br>FEED DIRECTION 1.85 (.073) 11.60 (.457)<br>1.65 (.065) 11.40 (.449) 24.30 (.957)<br>15.42 (.609)<br>23.90 (.941)<br>15.22 (.601)<br>TRL<br>| x<br>1.75 (.069)<br>10.90 (.429) 1.25 (.049)<br>10.70 (.421) 4.72 (.136)<br>16.10 (.634) 4.52 (.178)<br>15.90 (.626)<br>FEED DIRECTION<br>**----- End of picture text -----**<br>


**==> picture [395 x 198] intentionally omitted <==**

**----- Start of picture text -----**<br>
13.50 (.532) 27.40 (1.079)<br>12.80 (.504) 23.90 (.941) 1<br>4<br>330.00(14.173) \ 60.00 (2.362)      MIN.<br>  MAX.<br>g x<br>30.40 (1.197)<br>NOTES :       MAX.<br>1.   COMFORMS TO EIA-418.<br>26.40 (1.039) 4<br>2.   CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)<br>3.   DIMENSION MEASURED @ HUB.<br>3<br>**----- End of picture text -----**<br>


4.   INCLUDES FLANGE DISTORTION @ OUTER EDGE. 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 12/2008 

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## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . 

With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( **www.infineon.com** ). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 



## Links

- [View this product on Novapart](https://novapart.co/products/IRFS4620TRLPBF/power-mosfet-n-channel-200-v-24-a-00775-ohm-to)
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- [Supplier page](https://es.farnell.com/infineon/irfs4620trlpbf/mosfet-n-ch-200v-24a-to-263ab/dp/2725992RL)
---

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