# Power MOSFET, N Channel, 75 V, 80 A, 9000 µohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2803422RL/)

**URL**: https://novapart.co/products/IRFS3607TRLPBF/power-mosfet-n-channel-75-v-80-a-9000-ohm-to-263
**SKU**: IRFS3607TRLPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5400
**Stock**: 1000+
**Lead Time**: 64 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:80A; Drain Source Voltage Vds:75V; On Resistance Rds(on):0.00734ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Po

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Qualification | - |
| Power Dissipation | 140W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 75V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 80A |
| Drain Source On State Resistance | 9000µohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2803422RL/)

## **Applications** 

- High Efficiency Synchronous Rectification in SMPS 

## PD - 97308C IRFB3607PbF IRFS3607PbF IRFSL3607PbF 

HEXFET ® Power MOSFET 

Uninterruptible Power Supply 

- High Speed Power Switching Hard Switched and High Frequency Circuits 

## **Benefits** 

Improved  Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dV/dt and dI/dt Capability 

|HEXFET|HEXFET<br>Power MOSFET<br>®|
|---|---|
|**VDSS**|**75V**|
|**RDS(on)   typ.**<br>**max.**|**7.34m**|
||**9.0m**<br>QO|
|**ID **|**80A**<br>~~Po~~|



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D D<br>D<br>S<br>S S D<br>D G G<br>G<br>TO-220AB D [2] Pak TO-262<br>IRFB3607PbF IRFS3607PbF IRFSL3607PbF<br>**----- End of picture text -----**<br>


|**G**|**D**|**S**|
|---|---|---|
|Gate|Drain|Source|



## **Absolute Maximum Ratings** 

|**Symbol**<br>**Parameter**<br>**Units**<br>**Max.**|
|---|
|ID@ TC= 25°C<br>Continuous Drain Current,VGS @ 10V<br>ID@ TC= 100°C<br>Continuous Drain Current,VGS@ 10V<br>A<br>IDM<br>Pulsed DrainCurrent<br>PD@TC= 25°C<br>Maximum Power Dissipation<br>W<br>Linear DeratingFactor<br>W/°C<br>140<br>0.96<br>80<br>56<br>310<br>~~©~~<br>~~**e**e eo i~~<br>~~s~~<br>~~nr~~<br>~~RU~~<br>~~I~~|
|VGS<br>Gate-to-Source Voltage<br>V<br>± 20|
|TJ<br>Operating Junction and<br>°C<br>TSTG<br>Storage Temperature Range<br>-55  to + 175<br>~~—~~|
|Soldering Temperature, for 10 seconds<br>300|
|(1.6mm from case)|
|Mountingtorque,6-32 or M3 screw<br>**Avalanche Characteristics**<br>EAS (Thermally limited)<br>Single Pulse Avalanche Energy<br>mJ<br>IAR<br>Avalanche Curren<br>A<br>EAR<br>Repetitive Avalanche Energy<br>mJ<br>**Thermal Resistance**<br>120<br>46<br>14<br>10lb in(1.1N m)<br>~~nn~~<br>~~OIC~~<br>~~a~~<br>~~a~~<br>~~a~~<br>~~————~~<br>~~ee~~<br>~~I~~|
|**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**<br>~~Pee~~|
|RJC<br>Junction-to-Case<br>–––<br>1.045<br>~~ee~~|
|RCS<br>Case-to-Sink,Flat Greased Surface,TO-220<br>0.50<br>–––<br>°C/W<br>RJA<br>Junction-to-Ambient,TO-220<br>–––<br>62<br>RJA<br>Junction-to-Ambient (PCB Mount) , D2Pak<br>–––<br>40<br>~~rs~~<br>~~Po~~<br>eeeeea—es—‘“<“<i<‘iei‘iyialRRNNNSC“‘i<br>~~sa~~<br>~~Po~~<br>~~eaesesa(aisesiwwe~~|



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01/20/12 

**Static @ TJ = 25°C (unless otherwise specified)** 

|**Static @ TJ = 25°C (unless otherwise specified)J = 25°C (unless otherwise specified)**|**Static @ TJ = 25°C (unless otherwise specified)J = 25°C (unless otherwise specified) = 25°C (unless otherwise specified)(unless otherwise specified)unless otherwise specified)pecified)ecified))**|
|---|---|
|**Symbol**|**Parameter**<br>**Min.**<br>**Typ. Max. Units**<br>**Conditions**|
|V(BR)DSS<br>V(BR)DSS/TJ|Drain-to-Source Breakdown Voltage<br>75<br>–––<br>–––<br>V<br>Breakdown Voltage Temp. Coefficient<br>–––<br>0.096<br>–––<br>V/°C<br>VGS= 0V,ID= 250μA<br>Reference to 25°C,ID= 5mA<br>~~es~~<br>~~Q~~<br>~~eT~~|
|RDS(on)|Static Drain-to-Source On-Resistance<br>–––<br>7.34<br>9.0<br>m<br>VGS= 10V,ID= 46A<br>~~PO~~|
|VGS(th)|Gate Threshold Voltage<br>2.0<br>–––<br>4.0<br>V<br>VDS= VGS,ID= 100μA<br>~~GQ (~~|
|IDSS|Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>μA<br>–––<br>–––<br>250<br>VDS= 60V,VGS= 0V,TJ= 125°C<br>VDS= 75V,VGS= 0V<br>~~eS~~<br>~~a a~~|
|IGSS|Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>nA<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>VGS= 20V<br>VGS= -20V<br>~~ee~~<br>~~a~~|
|**Dynamic @ TJ = 25°C(unless otherwise specified)**||
|**Symbol**|**Parameter**<br>**Min.**<br>**Typ. Max. Units**<br>**Conditions**<br>~~PO~~|
|gfs|Forward Transconductance<br>115<br>–––<br>–––<br>S<br>VDS= 50V,ID= 46A<br>~~OGG~~|
|Qg|Total Gate Charge<br>–––<br>56<br>84<br>nC<br>ID= 46A<br>~~es~~|
|Qgs<br>Qgd<br>Qsync|Gate-to-Source Charge<br>–––<br>13<br>–––<br>Gate-to-Drain("Miller")Charge<br>–––<br>16<br>–––<br>Total Gate Charge Sync.(Qg-Qgd)<br>–––<br>40<br>–––<br>VGS= 10V<br>ID= 46A,VDS=0V,VGS= 10V<br>VDS= 38V<br>~~es~~<br>~~ee~~<br>~~e)~~<br>~~a~~|
|RG(int)<br>td(on)|Internal Gate Resistance<br>–––<br>0.55<br>–––<br><br>Turn-On DelayTime<br>–––<br>16<br>–––<br>ns<br>VDD= 49V<br>~~GG~~<br>~~a~~|
|tr|Rise Time<br>–––<br>110<br>–––<br>ID= 46A<br>~~es~~|
|td(off)<br>tf<br>Ciss|Turn-Off DelayTime<br>–––<br>43<br>–––<br>Fall Time<br>–––<br>96<br>–––<br>Input Capacitance<br>–––<br>3070<br>–––<br>pF<br>RG= 6.8<br>VGS= 10V<br>VGS= 0V<br>~~es~~<br>~~ee~~<br>~~®~~<br>~~ee~~|
|Coss|Output Capacitance<br>–––<br>280<br>–––<br>VDS= 50V<br>~~ee~~|
|Crss|Reverse Transfer Capacitance<br>–––<br>130<br>–––<br>ƒ= 1.0MHz<br>~~a~~|
|Cosseff.(ER)|Effective Output Capacitance(EnergyRelated)<br>–––<br>380<br>–––<br>VGS= 0V,VDS= 0V to 60V<br>~~©~~|
|Cosseff.(TR)|Effective Output Capacitance(Time Related)<br>–––<br>610<br>–––<br>VGS= 0V,VDS= 0V to 60V<br>~~a~~<br>@|
|**Diode Characteristics**||
|**Symbol**|**Parameter**<br>**Min.**<br>**Typ. Max. Units**<br>**Conditions**|
|IS<br>ISM|S<br>D<br>G<br>Continuous Source Current<br>–––<br>–––<br>80<br>A<br>(Body Diode)<br>Pulsed Source Current<br>–––<br>–––<br>310<br>(Body Diode)<br>MOSFET symbol<br>showing  the<br>integral reverse<br>p-n junction diode.<br>~~tt~~<br>~~Poe~~|
|VSD|Diode Forward Voltage<br>–––<br>–––<br>1.3<br>V<br>TJ= 25°C,IS= 46A,VGS= 0V<br>~~Pe~~|
|dv/dt|Peak Diode Recovery<br>–––<br>27<br>–––<br>V/ns<br>TJ= 175°C,IS= 46A,VDS= 75V<br>~~Pe~~|
|trr<br>Qrr|Reverse Recovery Time<br>–––<br>33<br>50<br>ns<br>TJ= 25°C<br>VR= 64V,<br>–––<br>39<br>59<br>TJ= 125°C<br>IF= 46A<br>Reverse Recovery Charge<br>–––<br>32<br>48<br>nC<br>TJ= 25°C<br>di/dt = 100A/μs<br>–––<br>47<br>71<br>TJ= 125°C<br>~~a~~<br>~~a~~<br>~~ee~~<br>~~a~~<br>~~a a~~|
|IRRM|Reverse RecoveryCurrent<br>–––<br>1.9<br>–––<br>A<br>TJ= 25°C<br>~~ee~~|
|ton|Forward Turn-On Time<br>Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~a~~|



Notes: ~~°~~ Calculated continuous current based on maximum allowable junction ISD  46A, di/dt  1920A/μs, VDD V(BR)DSS, TJ  175°C.SD  46A, di/dt  1920A/μs, VDD V(BR)DSS, TJ  175°C. 46A, di/dt  1920A/μs, VDD V(BR)DSS, TJ  175°C. 46A, di/dt  1920A/μs, VDD V(BR)DSS, TJ  175°C. 1920A/μs, VDD V(BR)DSS, TJ  175°C. 1920A/μs, VDD V(BR)DSS, TJ  175°C.DD V(BR)DSS, TJ  175°C.V(BR)DSS, TJ  175°C.V(BR)DSS, TJ  175°C.(BR)DSS, TJ  175°C., TJ  175°C.J  175°C. 175°C. 175°C. ~~9~~ Pulse width  400μs; duty cycle  2%. 400μs; duty cycle  2%. 400μs; duty cycle  2%. 2%. 2%. 

ISD  46A, di/dt  1920A/μs, VDD V(BR)DSS, TJ  175°C.SD  46A, di/dt  1920A/μs, VDD V(BR)DSS, TJ  175°C. 46A, di/dt  1920A/μs, VDD V(BR)DSS, TJ  175°C. 46A, di/dt  1920A/μs, VDD V(BR)DSS, TJ  175°C. 1920A/μs, VDD V(BR)DSS, TJ  175°C. 1920A/μs, VDD V(BR)DSS, TJ  175°C.DD V(BR)DSS, TJ  175°C.V(BR)DSS, TJ  175°C.V(BR)DSS, TJ  175°C.(BR)DSS, TJ  175°C., TJ  175°C.J  175°C. 175°C. 175°C. Pulse width  400μs; duty cycle  2%. 400μs; duty cycle  2%. 400μs; duty cycle  2%. 2%. 2%. 

~~°~~ Calculated continuous current based on maximum allowable junction temperature. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. 

© Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 

Repetitive rating;  pulse width limited by max. junction . ®@ temperature. Coss eff. (ER) is a fixed capacitance that gives the same energy as ° Limited by TJmax, starting TJ = 25°C, L = 0.12mH Coss while VDS is rising from 0 to 80% VDSS. RG = 25, IAS = 46A, VGS =10V. Part not recommended for useG = 25, IAS = 46A, VGS =10V. Part not recommended for use= 25, IAS = 46A, VGS =10V. Part not recommended for use, IAS = 46A, VGS =10V. Part not recommended for use, IAS = 46A, VGS =10V. Part not recommended for useAS = 46A, VGS =10V. Part not recommended for use= 46A, VGS =10V. Part not recommended for useGS =10V. Part not recommended for use =10V. Part not recommended for use mended footprint and soldering techniques refer to application note #AN-994. When mounted on 1" square PCB (FR-4 or G-10 Material).  For recomabove this value. @ Ris measured at TJ approximately 90°C. 

RG = 25, IAS = 46A, VGS =10V. Part not recommended for useG = 25, IAS = 46A, VGS =10V. Part not recommended for use= 25, IAS = 46A, VGS =10V. Part not recommended for use, IAS = 46A, VGS =10V. Part not recommended for use, IAS = 46A, VGS =10V. Part not recommended for useAS = 46A, VGS =10V. Part not recommended for use= 46A, VGS =10V. Part not recommended for useGS =10V. Part not recommended for use =10V. Part not recommended for use above this value. 

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1000 1000<br>VGS VGS<br>TOP           15V TOP           15V<br>10V 10V<br>8.0V 8.0V<br>6.0V 6.0V<br>5.5V 5.5V<br>5.0V 7_anit eM 5.0V Ag CH<br>100 4.8V 4.8V<br>BOTTOM 4.5V Aa ell BOTTOM 4.5V AT<br>iy Zampaeer e eeen!etree 100 a y2"all<br>Yee 4.5V afe<br>10<br>ire ee eee ee aay Ao 4.5V 1|<br>eo ey Am<br>60μs PULSE WIDTH  60μs PULSE WIDTH<br>Tj = 25°C Tj = 175°C<br>1 | Bani 10 (A<br>BEI PPT PA<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics Fig 2.   Typical Output Characteristics<br>1000 3.0<br>ID = 80A<br>es ee ee ee eee VGS = 10V<br>2.5<br>100<br>Ht} fet _ PTT TTT TY<br>Sa 2.0 PCA<br>10 TJ = 175°C T J  = 25°C<br>Af EA A<br>1.5<br>ET/PTes ee ee) ee ee ee ee SEREEES7AGnE |<br>1<br>SS 1.0 itt<br>VDS = 25V<br>60μs PULSE WIDTH<br>0.1 Ppis ff 0.5 Eeeat tT2 e ttneeeeeettTt| tt |<br>2 3 4 5 6 7 8 -60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>VGS, Gate-to-Source Voltage (V)<br>Fig 4.   Normalized On-Resistance vs. Temperature<br>Fig 3.   Typical Transfer Characteristics<br>100000 12.0<br>VCGS  iss   = C = 0V,       f = 1 MHZgs + Cgd,  Cds SHORTED ID= 46A<br>Crss   = Cgd  10.0 V DS = 24V<br>Coss  = Cds + Cgd VDS= 15V<br>: J<br>10000 8.0<br>Seer | Zi<br>Ciss 6.0<br>C<br>oss<br>1000 SoH II 4.0 | | |Z|<br>ee | Le<br>Crss<br>2.0<br>100 |Pe | pL) 0.0 JY} i | fol<br>1 10 100 0 10 20 30 40 50 60<br>VDS, Drain-to-Source Voltage (V)  QG,  Total Gate Charge (nC)<br>C, Capacitance (pF)<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>100<br>TJ = 175°C<br>ee ey Ay Ae ee<br>10<br>TJ = 25°C<br>—<br>1 ee 6 ee ee<br>VGS = 0V<br>ee<br>0.1<br>0.0 0.5 1.0 1.5 2.0<br>VSD, Source-to-Drain Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Source-Drain Diode Forward Voltage 

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80<br>70<br>ST<br>60<br>tf tt<br>50<br>CTSNET<br>40<br>30<br>PENS<br>20<br>PrN<br>10 TTT<br>0 TT LEN<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

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1.20<br>1.00<br>TLL LLL<br>0.80<br>Co<br>0.60<br>OF<br>0.40 P] t ] fp LAE |<br>J<br>0.20<br>ff |<br>0.00 et | tt<br>-10 0 10 20 30 40 50 60 70 80<br>VDS, Drain-to-Source Voltage (V)<br>Energy (μJ)<br>**----- End of picture text -----**<br>


**Fig 11.** Typical COSS Stored Energy 

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1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>100μsec<br>100<br>|} —— 34) 1msec a<br>10msec<br>10 A |<br>eeee eee<br>Tc = 25°C<br>Tj = 175°C<br>Single Pulse DC<br>1 Job<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 8.   Maximum Safe Operating Area<br>100<br>Id = 5mA<br>Don<br>95<br>FETE<br>90<br>Let<br>85<br>HR<br>80<br>PALEEEELEL<br>75<br>Le<br>70 PEL EEL ELL ELL<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 10.** Drain-to-Source Breakdown Voltage 

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500<br>I<br>D<br>450<br>TOP         5.6A<br>Ko<br>400 11A<br>BOTTOM 46A<br>350<br>300 At<br>250 CONSE<br>200<br>NN ETT tT<br>150<br>PIM IN EEE EL<br>100<br>SOS<br>50<br>RoE SSSScD<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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10.00<br>PT<br>1.00 |<br>A D = 0.50<br>0.20<br>0.10 ;—— 0.02 0.10 0.05 eeLett e e teee J  J 1 1 R1 R1  2 R 2 2 R2 R  33 R  33  R4  4 R4 4 C Ri ( 0.01109     0.00000300.49731     0.001301.2 ° 69 C/W)    25 0  .000 i (sec) 130 ITTani<br>0.01<br>0.01 =oa CiCi= iRiiRi 0.26766 0.008693<br>Notes:<br>SINGLE PULSE<br>ia | | ee es es ee Oe 1. Duty Factor D = t1/t2 | |TTT<br>( THERMAL RESPONSE )<br>0.00 | HE EE 2. Peak Tj = P dm x Zthjc + Tc ll<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>1000<br>Duty Cycle = Single Pulse<br>ee | ee Allowed avalanche Current vs avalanche  ean<br>100 pulsewidth, tav, assuming  Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>See<br>0.01<br>PoE RRR<br>10 DCTS 0.05 IP SOT IT<br>0.10<br>a eR — ee ee ee<br>1 PA<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming   j = 25°C and<br>0.1 |HE! Tstart = 150°C. aTtee ee Oe eeS(§$N WNC CVVOe “ssOOO T<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14.   Typical Avalanche Current vs.Pulsewidth<br>150 Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse                 (For further info, see AN-1005 at www.irf.com)<br>BOTTOM   1.0% Duty Cycle 1. Avalanche failures assumption:<br>125 I D  = 46A Purely a thermal phenomenon and failure occurs at a temperature far in<br>excess of Tjmax. This is validated for every part type.<br>100 eee 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.jmax is not exceeded. is not exceeded.<br>3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.<br>+ ~ Pitt | tt<br>4. PD (ave) = Average power dissipation per single avalanche pulse.<br>75 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>during avalanche).<br>PSS 6. Iav = Allowable avalanche current.<br>50 7. T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed asjmax (assumed as(assumed as<br>25°C in Figure 14, 15).<br>HENNE tav = Average time in avalanche.<br>25 D = Duty cycle in avalanche =  tav ·f<br>CHINN ZthJC(D, tav) = Transient thermal resistance, see Figures 13)<br>LTE TARA<br>0<br>PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = A T/ ZthJCthJC<br>25 50 75 100 125 150 175<br>Iav =av == 2 A T/ [1.3·BV·Zth]th]]<br>Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>Thermal Response ( Z  thJC ) °C/W<br>**----- End of picture text -----**<br>


2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.jmax is not exceeded. is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed asjmax (assumed as(assumed as 25°C in Figure 14, 15). 

**PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) =** A **T/ ZthJCthJC Iav =av == 2** A **T/ [1.3·BV·Zth]th]] EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.5 | | | ft tt te ty<br>4.0<br>ptpt | tt | | |<br>P| Pa TE ET tT<br>3.5<br>pant | | re. | ft<br>SSC<br>3.0 PT | SSAA EN<br>FT oT oT AL<br>2.5 ID = 100μA<br>ID = 250μA L-LANRPASE  AfTT<br>2.0 ID = 1.0mA ZeaNVGe<br>I D  = 1.0A ae eeNe<br>1.5 Pt} tT | TUNA<br>1.0 Pt tT tT tTP t ttT tT| | INGTY<br>-75 -50 -25 0 25 50 75 100 125 150 175 200<br>TJ , Temperature ( °C )<br>Fig 16.   Threshold Voltage vs. Temperature<br>20<br>IF = 46A<br>VR = 64V<br>15 T J  = 25°C<br>|| i<br>TJ = 125°C<br>oe<br>10<br>na<br>eA]<br>‘Z| a<br>5 4arnn<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRR (A)<br>VGS(th), Gate Threshold Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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20<br>IF = 31AVR = 64V f<br>15 T J  = 25°C a<br>TJ = 125°C<br>Ra<br>,<br>10<br>eae<br>7)<br>4<br>5 7<br>y<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRR (A)<br>**----- End of picture text -----**<br>


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560<br>IF = 31A<br>480 V R  = 64V<br>TJ = 25°C<br>400<br>TY,<br>TJ = 125°C<br>320<br>mmz4<br>240 es<br>ae<br>160 74- f<br>80<br>Se<br>0<br>tt tT<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (A)<br>**----- End of picture text -----**<br>


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560<br>IF = 46A<br>480 V R  = 64V &<br>TJ = 25°C<br>400<br>P| [te] yA<br>TJ = 125°C<br>320 | --re<br>240 P| yA ZI<br>| ery<br>74 id<br>160<br>Poet]<br>80<br>|<br>(-T<br>0<br>| | | |<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (A)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + { P.W. + Period ——— + D = —— Period<br>) [©)]  CircuitLow  LayoutStray ConsiderationsInduct | V t t GS=10<br><br>-  CurrentLow LeakageTransformerInductance @ D.U.T. ISD Waveform<br>+<br>= ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 > VDD<br>ma<br> Re-Applied<br> Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re (A  dv/dt controlled by Rg Vp p -<br><br>D.U.T. - Device Under Test SCO |<br>Ripple   5% ISD<br>Isp controlled by Duty Factor "D" @\ t<br>* Vg = 5V for Logic Level Devices<br>Fig 20.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V << tp -—><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>AE / \<br>t 2V0VGS ae<br>tp 0.01 IAS<br> Unclamped Inductive Test Circuit Fig 21b.   Unclamped Inductive Waveforms<br>LDD<br>VDSDS VDS<br>90%<br>+<br>VDDDD -<br>D.U.T 10% x \<br>VGSGS VGS<br>) t t Pulse Width < 1μs 1 | ey \<br>Duty Factor < 0.1% td(on) tr td(off) tf<br>  Switching Time Test Circuit Fig 22b.   Switching Time Waveforms<br>Id<br>Vds<br>Vgs<br>L<br>VCC<br>DUT<br>Vgs(th)<br>1K<br>a:: Qgs1 e e! Qgs2 H Qgd H Qgodr H<br> Gate Charge Test Circuit Fig 23b.    Gate Charge Waveform<br>**----- End of picture text -----**<br>


**Fig 21b.** Unclamped Inductive Waveforms 

**Fig 21a.** Unclamped Inductive Test Circuit 

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LDD<br>VDSDS<br>+<br>VDDDD -<br>D.U.T<br>VGSGS<br>) t t Pulse Width < 1μs<br>Duty Factor < 0.1%<br>Fig 22a.   Switching Time Test Circuit<br>L<br>VCC<br>DUT<br>0<br>1K<br>a::<br>**----- End of picture text -----**<br>


**Fig 22a.** Switching Time Test Circuit 

**Fig 23a.** Gate Charge Test Circuit 

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7 

**Note:** "P" in assembly line position indicates "Lead-Free" 

TO-220AB packages are not recommended for Surface Mount Application. 

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## TO-262 Package Outline 

Dimensions are shown in millimeters (inches) 

## TO-262 Part Marking Information 

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Dimensions are shown in millimeters (inches) 

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TRR<br>1.60 (.063)<br>1.50 (.059)<br>1.60 (.063)<br>4.10 (.161)<br>1.50 (.059)<br>3.90 (.153) 0.368 (.0145)<br>2 _______* !0 0°0Hd 0 | i oOo OO 41 | @ T - e 0.342 (.0135)<br>FEED DIRECTION 1.85 (.073) 11.60 (.457)<br>1.65 (.065) 11.40 (.449) 24.30 (.957)<br>15.42 (.609)<br>23.90 (.941)<br>15.22 (.601)<br>TRL<br>1.75 (.069)<br>10.90 (.429) 1.25 (.049)<br>10.70 (.421) 4.72 (.136)<br>16.10 (.634) 4.52 (.178)<br>15.90 (.626)<br>FEED DIRECTION<br>**----- End of picture text -----**<br>


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13.50 (.532) 27.40 (1.079)<br>12.80 (.504) 23.90 (.941) 1<br>4<br>330.00(14.173) \ g 60.00 (2.362)      MIN.<br>  MAX.<br>g x<br>30.40 (1.197)<br>NOTES :       MAX.<br>1.   COMFORMS TO EIA-418.<br>2.   CONTROLLING DIMENSION: MILLIMETER. 26.40 (1.03924.40 (.961) I ) c 4<br>3.   DIMENSION MEASURED @ HUB.<br>3<br>**----- End of picture text -----**<br>


4.   INCLUDES FLANGE DISTORTION @ OUTER EDGE. 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 01/12 

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