# Power MOSFET, N Channel, 60 V, 240 A, 2100 µohm, TO-263 (D2PAK), Surface Mount

![Product image](https://novapart.co/image/farnell:2725978/)

**URL**: https://novapart.co/products/IRFS3006TRL7PP/power-mosfet-n-channel-60-v-240-a-2100-ohm-to-263
**SKU**: IRFS3006TRL7PP
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.9300
**Stock**: 500+
**Lead Time**: 127 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:240A; Drain Source Voltage Vds:60V; On Resistance Rds(on):0.0015ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; Pow

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 7Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Qualification | - |
| Power Dissipation | 375W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263 (D2PAK) |
| Drain Source Voltage Vds | 60V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 240A |
| Drain Source On State Resistance | 2100µohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2725978/)

96187 

## IRFS3006-7PPbF 

HEXFET ® Power MOSFET 

## **Applications** 

High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits 

|HEXFET<br>Power MOSFET<br>®|Power MOSFET|
|---|---|
|**VDSS**|**60V**|
|**RDS(on)   typ.**<br>**max.**<br>~~_~~|**1.5m**|
||**2.1m**<br>O<br>~~_~~|
|**ID (Silicon Limited)**<br>~~_~~|**293A**<br>~~_|~~|
|**D (Silicon Limited)**<br>**ID (Package Limited)**<br>~~_~~|**240A**<br>~~_~~<br>~~|~~|



## **Benefits** 

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability Lead-Free 

|**G**|**D**|**S**|
|---|---|---|
|Gate|Drain|Source|



## **Absolute Maximum Ratings** 

|**Symbol**<br>**Parameter**<br>**Units**<br>**Max.**|
|---|
|ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>293<br>~~©~~|
|ID@ TC= 100°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V(Package Limited)<br>IDM<br>Pulsed Drain Current<br>PD@TC= 25°C<br>Maximum Power Dissipation<br>W<br>Linear DeratingFactor<br>W/°C<br>2.5<br>207<br>1172<br>240<br>A<br>375<br>~~©~~<br>~~pT~~<br>~~**a**a~~|
|VGS<br>Gate-to-Source Voltage<br>V<br>dv/dt<br>Peak Diode Recovery<br>V/ns<br>TJ<br>Operating Junction and<br>-55  to + 175<br>± 20<br>11<br>~~a~~<br>~~©~~<br>~~GO~~|
|TSTG<br>Storage Temperature Range<br>°C|
|Soldering Temperature, for 10 seconds<br>300|
|(1.6mm from case)|
|Mountingtorque,6-32 or M3 screw<br>10lb in(1.1N m)<br>~~a~~|
|**Avalanche Characteristics**|
|EAS(Thermallylimited)<br>Single Pulse Avalanche Energy<br>mJ<br>IAR<br>Avalanche Current<br>A<br>EAR<br>Repetitive Avalanche Energy<br>mJ<br>303<br>See Fig. 14, 15, 22a, 22b,<br>~~ee~~<br>~~—————————~~|
|**Thermal Resistance**|
|www.irf.com<br>1<br>**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**<br>RθJC<br>Junction-to-Case<br>–––<br>0.4<br>RθJA<br>Junction-to-Ambient(PCB Mount)<br>–––<br>40<br>°C/W<br>~~——a~~|



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**Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|---|---|---|
|V(BR)DSS<br>∆V(BR)DSS/∆TJ<br>RDS(on)<br>VGS(th)<br>IDSS<br>IGSS<br>RG(int)|Drain-to-Source Breakdown Voltage<br>60<br>–––<br>–––<br>V<br>Breakdown Voltage Temp. Coefficient<br>–––<br>0.07<br>–––<br>V/°C<br>Static Drain-to-Source On-Resistance<br>–––<br>1.5<br>2.1<br>mΩ<br>Gate Threshold Voltage<br>2.0<br>–––<br>4.0<br>V<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>–––<br>–––<br>250<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>Internal Gate Resistance<br>–––<br>2.1<br>–––<br>Ω<br>VGS= 20V<br>VGS= -20V<br>VGS= 0V, ID= 250µA<br>Reference to 25°C, ID= 5mA<br>VGS= 10V, ID= 168A<br>VDS= VGS, ID= 250µA<br>VDS= 60V, VGS= 0V<br>VDS= 60V, VGS= 0V, TJ= 125°C<br>µA<br>nA<br>~~GQ~~<br>~~DR~~<br>~~GQ GDOOOO~~<br>~~ee~~<br>~~CO~~<br>~~GG GO~~<br>~~Se~~<br>~~eee ee~~<br>~~||~~<br>~~es~~<br>~~ee~~<br>~~||~~<br>~~GG~~||
|**Dynamic @ TJ = 25°C (unless otherwise specified)**|||
|**Symbol**|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|gfs<br>Qg<br>Qgs<br>Qgd|Forward Transconductance<br>290<br>–––<br>–––<br>S<br>Total Gate Charge<br>–––<br>200<br>300<br>Gate-to-Source Charge<br>–––<br>37<br>–––<br>Gate-to-Drain("Miller")Charge<br>–––<br>60<br>–––<br>VDS= 25V, ID= 168A<br>ID= 168A<br>VDS= 30V<br>VGS= 10V<br>nC<br>~~a~~<br>~~GG~~<br>~~DRa~~<br>~~a~~<br>®||
|Qsync<br>td(on)<br>tr<br>td(off)<br>tf<br>Ciss<br>Coss|Total Gate Charge Sync. (Qg- Qgd)<br>–––<br>140<br>–––<br>Turn-On DelayTime<br>–––<br>14<br>–––<br>Rise Time<br>–––<br>61<br>–––<br>Turn-Off DelayTime<br>–––<br>118<br>–––<br>Fall Time<br>–––<br>69<br>–––<br>Input Capacitance<br>–––<br>8850<br>–––<br>Output Capacitance<br>–––<br>1007<br>–––<br>VGS= 10V<br>VGS= 0V<br>VDS= 50V<br>ID= 168A<br>RG= 2.7Ω<br>VDD= 39V<br>ID= 168A, VDS=0V, VGS= 10V<br>ns<br>~~ee~~<br>~~DRa~~<br>~~a~~<br>~~ee~~<br>~~®~~<br>~~DRa~~||
|Crss<br>Reverse Transfer Capacitance<br>–––<br>525<br>–––<br>Cosseff. (ER)<br>Effective Output Capacitance(EnergyRelated)<br>–––<br>1460<br>–––<br>Cosseff. (TR)<br>Effective Output Capacitance(Time Related)<br>–––<br>1915<br>–––<br>**Diode Characteristics**<br>ƒ= 1.0MHz(See Fig5)<br>VGS= 0V, VDS= 0V to 48V<br>See Fig11)<br>VGS= 0V, VDS= 0V to 48V<br>pF<br>~~a~~<br>~~a)~~<br>~~@~~<br>~~a~~<br>~~®~~|||
|**Symbol**|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|IS<br>ISM<br>VSD<br>trr<br>Qrr<br>IRRM|G<br>Continuous Source Current<br>(BodyDiode)<br>Pulsed Source Current<br>(BodyDiode)<br>Diode Forward Voltage<br>–––<br>–––<br>1.3<br>V<br>Reverse Recovery Time<br>–––<br>44<br>–––<br>TJ= 25°C<br>VR= 51V,<br>–––<br>48<br>–––<br>TJ= 125°C<br>IF= 168A<br>Reverse Recovery Charge<br>–––<br>51<br>–––<br>TJ= 25°C<br>di/dt = 100A/µs<br>–––<br>62<br>–––<br>TJ= 125°C<br>Reverse RecoveryCurrent<br>–––<br>2.03<br>–––<br>A<br>TJ= 25°C<br>MOSFET symbol<br>showing  the<br>TJ= 25°C, IS= 168A, VGS= 0V<br>integral reverse<br>p-njunction diode.<br>A<br>ns<br>nC<br>293<br>1172<br>–––<br>–––<br>–––<br>–––<br>~~ol~~<br>~~ee eee~~<br>~~QO QQ”~~<br>~~RE~~<br>~~||~~<br>~~RE~~<br>~~**|**~~<br>~~a~~|S<br>D|
|ton|Forward Turn-On Time<br>Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~a~~||



Calcuted continuous current based on maximum allowable junction temperature Bond wire current limit is 240A. Note that current limitation arising from heating of the device leds may occur with some lead mounting arrangements. 

Repetitive rating;  pulse width limited by max. junction temperature. 

Limited by TJmax, starting TJ = 25°C, L = 0.021mH 

- RG = 25Ω, IAS = 168A, VGS =10V. Part not recommended for use above this value . 

ISD ≤ 168A, di/dt ≤ 1410 A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. 

Pulse width ≤ 400µs; duty cycle ≤ 2%. 

© Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 

Coss eff. (ER) is a fixed capacitance that gives the same energy as 

Coss while VDS is rising from 0 to 80% VDSS. 

When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended   footprint and soldering techniquea refer to applocation note # AN-994 echniques refer to application note #AN-994. 

θ 

θJC 

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1000<br>VGS<br>TOP           15V<br>10V<br>8.0V<br>6.0V<br>100 5.0V<br>4.5V<br>Zi atl lie 4.0V<br>BOTTOM 3.5V<br>10<br>S SS ata<br>1<br>3.5V<br>≤60µs PULSE WIDTH<br>0.1 i _ Tj = 25°C Coo<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics<br>1000<br>100 Tr TJ = 175°C e]<br>P T AZ FE |<br>TJ = 25°C<br>FF<br>10 P f FP<br>1<br>A PL | |<br>VDS = 25V<br>≤60µs PULSE WIDTH<br>Pp th<br>0.1<br>2 3 4 5 6 7<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 3.** Typical Transfer Characteristics 

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100000<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED<br>C  = C<br>rss   gd<br>C = C + C<br>=e oss   ds  gd<br>10000 Ciss<br>C<br>oss<br>PST SEE<br>C<br>1000 rss<br>s e ell<br>100 PETEee ee eeEETe<br>1 10 100<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


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VDS, Drain-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

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1000<br>VGS<br>TOP           15V<br>10V<br>8.0V<br>6.0V<br>5.0V<br>4.5V<br>100 | | fr 4.0V |<br>BOTTOM 3.5V<br>3.5V<br>10 Zi Ai EA<br>≤60µs PULSE WIDTH<br>Tj = 175°C<br>1 a ll<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>2.5<br>ID = 168A<br>VGS = 10V<br>2.0 3 2<br>ETL ELL TA]<br>PELL<br>1.5<br>SRGRREP Zena<br>1.0<br>a T<br>0.5 OpzaannannanTILEEE EEE LL<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

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16.0<br>ID= 168A<br>12.0 T V L DS= 48V E<br>VDS= 30V<br>8.0<br>Va<br>B ava<br>4.00.0 JV ili yd.<br>0 40 80 120 160 200 240 280<br> QG,  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>T = 175°C<br>J<br>100<br>TJ = 25°C<br>10<br>VGS = 0V<br>PH<br>1.0<br>0.0 0.4 0.8 1.2 1.6 2.0<br>VSD, Source-to-Drain Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Source-Drain Diode Forward Voltage 

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350<br>Limited By Package<br>300<br>je |<br>250<br>on<br>200<br>n e<br>150<br>P| PAE<br>100<br>CERN<br>50 P p LIN<br>0 aN<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

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2.5<br>2.0 T TT)<br>1.5 a a<br>1.00.5 aa ae aa-<br>Y<br>BZ<br>0.0<br>0 10 20 30 40 50 60<br>Energy (µJ)<br>**----- End of picture text -----**<br>


VDS, Drain-to-Source Voltage (V) **Fig 11.** Typical COSS Stored Energy 

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10000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>1000<br>1 00 µsec<br>100<br>1msec<br>LIMITED BY PACKAGE<br>10<br>10 msec<br>DC<br>1<br>Tc = 25°C<br>Tj = 175°C<br>Single Pulse<br>ST<br>0.1<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 8.   Maximum Safe Operating Area<br>80<br>Id = 5mA<br>75 E LLE<br>C ETL<br>70<br>apzae<br>65 L LL<br>e T<br>60<br>A<br>PELEEL<br>55 EELELL<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>Fig 10.   Drain-to-Source Breakdown Voltage<br>1400<br>ID<br>1200 TOP         35A<br>T TT<br>70A<br>1000 BOTTOM  168A<br>N EL<br>800<br>600 UP NEN<br>400<br>P NN TTT<br>200<br>R IS<br>0 C SS<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>ID,  Drain-to-Source Current (A)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 10.** Drain-to-Source Breakdown Voltage 

**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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1<br>Ht<br>D = 0.50<br>0.1 0.20<br>0.10<br>0.05 ee a | |<br>0.01 0.010.02 soe TU τJ τJτ1τ1 R1 R1 τ2 τR22 R2 Rτ33 R τ3 3 τR4τ4R4 4 τCτ Cn Ri (°C/W)   0.0062       0.0000050.0431      0.0000450.1462       0.001067 τi (sec)<br>> SINGLE PULSE AB eee [ i { T ty<br>0.001 ( THERMAL RESPONSE ) Ci= Ciτi/Rii/Ri 0.2047       0.010195<br>a a es s Notes: — —<br>R o Be<br>a 1. Duty Factor D = t1/t2 HT<br>EE 2. Peak Tj = P dm x Zthjc + Tc il<br>0.0001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>1000<br>Duty Cycle = Single Pulse<br>ee rr Ol ee el reer<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming ∆Tj = 150°C and<br>Se HT AL<br>Tstart =25°C (Single Pulse)<br>100 S e a HI<br>F P 0.01 RSS oo<br>eS ee<br>A 0.05 as<br>| Seat) | en RAT | ee | |<br>0.10<br>10<br>NR TSS EPR<br>ee ore se<br>{J —_+—_t 1 tap ry eeeeeeoSomme e  ee eT<br>Allowed avalanche Current vs avalanche<br>ee<br>pulsewidth, tav, assuming ∆Τ j = 25°C and<br>Tstart = 150°C. fe neeee<br>BEa S|| ETLee<br>1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Thermal Response ( Z thJC ) °C/W<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 14.** Typical Avalanche Current vs.Pulsewidth 

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350<br>TOP          Single Pulse<br>300 BOTTOM   1.0% Duty Cycle<br>ID = 168A<br>K d<br>250<br>200<br>N NUTEE ETT<br>P NET<br>150<br>C EN NUTTTT<br>100<br>C oo<br>50 i t SSS<br>0<br>TT PN SAL<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)** 

1. Avalanche failures assumption: 

- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6. Iav = Allowable avalanche current. 

7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). 

- tav = Average time in avalanche. 

- D = Duty cycle in avalanche =  tav ·f 

ZthJC(D, tav) = Transient thermal resistance, see Figures 13) **PD (ave) = 1/2 ( 1.3·BV·Iav) =** A **T/ ZthJC Iav = 2** A **T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.5<br>ft ft tT tt ID = 250µA<br>4.0 P t | | ct ID = 1.0mA<br>ID = 1.0A<br>| | | | | [| VY<br>3.5<br>P t yn<br>T REAT<br>3.0 p ot<br>P T | poe | tt<br>2.5<br>| SSA TE |<br>| | | EYAL} tT a<br>2.0 ee | ee|e| TRAEeaNNeeeeNNeTO<br>1.5 P ot tT | | cE UT | AN<br>| | | | | ft | | cP NN<br>1.0 Pot ot | | tT [tN]<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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20<br>IF = 112A<br>VR = 51V<br>16<br>TJ = 25°C _ —<br>TJ = 125°C<br>ee<br>“~~ AT<br>12<br>|<br>4<br>8 ,V/<br>y,<br>7<br>4<br>0<br>0 200 400 600 800 1000 1200<br>diF /dt (A/µs)<br>IRR (A)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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20<br>IF = 168A<br>VR = 51V<br>16<br>TJ = 25°C<br>TJ = 125°C =<br>12 = e<br>“y<br>8 p<br>4<br>0<br>0 200 400 600 800 1000 1200<br>diF /dt (A/µs)<br>IRR (A)<br>**----- End of picture text -----**<br>


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600<br>IF = 112A<br>500 VR = 51V<br>TJ = 25°C<br>c e t<br>400 TJ = 125°C<br>oi<br>300<br>‘<br>200<br>ey<br>e t]<br>100<br>|<br>0<br>0 200 400 600 800 1000 1200<br>diF /dt (A/µs)<br>QRR (A)<br>**----- End of picture text -----**<br>


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600<br>IF = 168A<br>500 VR = 51V<br>TJ = 25°C<br>f e<br>400 TJ = 125°C<br>e|a7)<br>300<br>e Zee<br>200<br>100<br>0<br>0 200 400 600 800 1000 1200<br>diF /dt (A/µs)<br>QRR (A)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + {+ P.W. Period ——— — D = —— Period<br>) [©)]    •  CircuitLow  LayoutStray ConsiderationsInduct | t V t GS=10<br> •<br>- •   Low Leakage Inductance @ D.U.T. ISD Waveform<br>+<br>Reverse<br>Recovery Body Diode Forward<br>oi - [1] Current Transformer - ® + Current r Current di/dt AN<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 a VDD<br>ma<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re ( 4 •   dv/dt controlled by Rg Vpp -<br>•<br>D.U.T. - Device Under Test SOO |<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" @| t<br>* Vg = 5V for Logic Level Devices<br>Fig 21.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS(BR)DSS<br>15V —_ tp -><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>¢ 20VVGS dt<br>tp 0.01Ω<br>**----- End of picture text -----**<br>


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V(BR)DSS(BR)DSS<br>—_ tp -><br>IAS<br>**----- End of picture text -----**<br>


**Fig 22b.** Unclamped Inductive Waveforms 

**Fig 22a.** Unclamped Inductive Test Circuit 

**==> picture [192 x 121] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS<br>90%<br>\<br>10% /\<br>VGS |«le ys| |<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


**==> picture [130 x 58] intentionally omitted <==**

**----- Start of picture text -----**<br>
+<br>-<br>≤ 1  ys<br>≤ 0.1 %<br>**----- End of picture text -----**<br>


## **Fig 23a.** Switching Time Test Circuit 

**==> picture [164 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Fig 23b.   Switching Time Waveforms<br>**----- End of picture text -----**<br>


**==> picture [7 x 5] intentionally omitted <==**

**----- Start of picture text -----**<br>
Id<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Current Regulator<br>Same Type as D.U.T. Vds<br>|<br>| 12V .2µF 50KΩ.3µF || i<br>+<br>D.U.T. -VDS<br>Vgs(th)<br>VGS<br>3mA<br>NN IG ID a p p i e w i e » !<br>Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**==> picture [152 x 124] intentionally omitted <==**

**----- Start of picture text -----**<br>
Vds<br>Vgs<br>i<br>Vgs(th)<br>a p p i e w i e » !<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

**Fig 24b.** Gate Charge Waveform 

www.irf.com 

7 

## D[2] Pak (TO-263CB) 7 Long Leads Package Outline 

Dimensions are shown in milimeters (inches) 

## D[2] Pak - 7 Pin Part Marking Information 

**Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/** 

www.irf.com 

8 

## D[2] Pak - 7 Pin Tape and Reel 

Dimensions are shown in milimeters (inches) 

**Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/** 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 10/2008 

www.irf.com 

9 



## Links

- [View this product on Novapart](https://novapart.co/products/IRFS3006TRL7PP/power-mosfet-n-channel-60-v-240-a-2100-ohm-to-263)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/irfs3006trl7pp/mosfet-n-ch-60v-240a-to-263/dp/2725978)
---

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