# Power MOSFET, N Channel, 40 V, 195 A, 1750 µohm, TO-263AB, Surface Mount

![Product image](https://novapart.co/image/farnell:2781137/)

**URL**: https://novapart.co/products/IRFS3004TRLPBF/power-mosfet-n-channel-40-v-195-a-1750-ohm-to
**SKU**: IRFS3004TRLPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €2.4100
**Stock**: 50+
**Lead Time**: 2 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:195A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0014ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:4V; P

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (21-Jan-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Qualification | - |
| Power Dissipation | 380W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-263AB |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 195A |
| Drain Source On State Resistance | 1750µohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2781137/)

## PD -97377 IRFB3004PbF IRFS3004PbF IRFSL3004PbF 

## **Applications** 

High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits 

## **Benefits** 

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability Lead-Free 

HEXFET ® Power MOSFET 

||HEXFET<br>Power MOSFET<br>®|Power MOSFET|
|---|---|---|
|S<br>D<br>G|**VDSS**<br>~~eee~~|**40V**<br>~~eee~~|
||**RDS(on)   typ.**<br>**max.**<br>~~eee~~<br>~~fF~~|**1.4m**Ω<br>~~eee~~|
|||**1.75m**Ω<br>~~eee~~<br>~~fF~~|
||**ID (Silicon Limited)**<br>~~fF~~|**340A**<br>~~fF~~|
||**ID (Package Limited)**|**195A**|



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D<br>D D<br>S<br>D S S D<br>G G G<br>TO-220AB D [2] Pak TO-262<br>IRFB3004PbF IRFS3004PbF IRFSL3004PbF<br>**----- End of picture text -----**<br>


|**G**<br>**D**<br>**S**||
|---|---|
|Gate<br>Drain<br>Source||
|**Absolute Maximum Ratings**<br>**Symbol**<br>**Parameter**<br>**Units**<br>ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>ID@ TC= 100°C<br>Continuous Drain Current, VGS@ 10V (Silicon Limited)<br>ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V (Wire Bond Limited)<br>IDM<br>Pulsed Drain Current<br>PD@TC= 25°C<br>Maximum Power Dissipation<br>W<br>Linear DeratingFactor<br>W/°C<br>VGS<br>Gate-to-Source Voltage<br>V<br>dv/dt<br>Peak Diode Recovery<br>V/ns<br>± 20<br>2.5<br>**Max.**<br>340<br>240<br>1310<br>195<br>A<br>380<br>4.4<br>~~TT~~<br>~~o*FDoF~~<br>~~PCa~~<br>~~©~~<br>~~a~~<br>~~GO~~<br>~~es~~<br>~~>en~~<br>~~esDO~~<br>~~OO~~<br>~~esDO~~<br>~~a~~<br>~~©Sn~~<br>~~GO~~||
|TJ<br>Operating Junction and<br>-55  to + 175||
|TSTG<br>Storage Temperature Range<br>°C||
|SolderingTemperature,for 10 seconds(1.6mm from case)<br>300||
|Mountingtorque,6-32 or M3 screw<br>**Avalanche Characteristics**<br>10lbf in(1.1N m)<br>~~nsGO~~||
|EAS(Thermallylimited)<br>Single Pulse Avalanche Energy<br>mJ<br>IAR<br>Avalanche Current<br>A<br>EAR<br>Repetitive Avalanche Energy<br>mJ<br>**Thermal Resistance**<br>300<br>See Fig. 14, 15, 22a, 22b<br>~~PS~~<br>~~Oe~~<br>~~SS~~<br>~~a~~<br>~~rd~~||
|**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**<br>RθJC<br>Junction-to-Case<br>–––<br>0.40<br>RθCS<br>Case-to-Sink,Flat Greased Surface,TO-220<br>0.50<br>–––<br>RθJA<br>Junction-to-Ambient,TO-220<br>–––<br>62<br>RθJA<br>Junction-to-Ambient (PCB Mount) , D2Pak<br>–––<br>40<br>°C/W<br>~~Pf~~<br>~~es~~<br>~~I ©~~<br>~~QO~~<br>~~a GO~~<br>~~esGO~~<br>~~es~~<br>~~>~~<br>~~DO~~||



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02/26/09 

**Static @ TJ = 25°C (unless otherwise specified)** 

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|||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
|GO|Symbol|Parameter|Min.|Typ.|Max.|Units|Conditions|
|a|V(BR)DSS|QQ|Drain-to-Source Breakdown Voltage|40|–––|GN|–––|V|(|VGS = 0V, ID = 250µA|
|a|∆|V(BR)DSS/|∆|TJ|Breakdown Voltage Temp. Coefficient|–––|0.037|–––|GN|V/°C|Reference to 25°C, ID = 5mA|
|PO|RDS(on)|Static Drain-to-Source On-Resistance|QO|–––|1.4|QO|1.75|GO|m|Ω|VGS = 10V, ID = 195A|
|VGS(th)|Gate Threshold Voltage|2.0|–––|4.0|V|VDS = VGS, ID = 250µA|
|a|IDSS|Drain-to-Source Leakage Current|GO|–––|–––|QO|20|GO|µA|VDS = 40V, VGS = 0V|
|ee|–––|–––|250|VDS = 40V, VGS = 0V, TJ = 125°C|
|IGSS|Gate-to-Source Forward Leakage|a|–––|–––|100|Ds|nA|VGS = 20V|
|——————————————————————GQ|Gate-to-Source Reverse Leakage|–––|–––|-100|VGS = -20V|
|RG|Internal Gate Resistance|–––|2.2|GO|–––|Ω|
|Dynamic @ TJ = 25°C (unless otherwise specified)|
|a|Symbol|QOS|Parameter|Min.|Typ.|Max.|Units|Conditions|
|a|gfs|QQ|Forward Transconductance|1170|–––|QO|–––|GO|S|VDS = 10V, ID = 195A|
|a|Qg|a|Total Gate Charge|–––|160|240|GO|nC|ID = 187A|
|a|Qgs|Gate-to-Source Charge|–––|40|–––|VDS =20V|
|a|Qgd|Gate-to-Drain ("Miller") Charge|–––|68|–––|VGS = 10V|©|
|DG|Qsync|Total Gate Charge Sync. (Qg - Qgd)|–––|92|–––|ID = 187A, VDS =0V, VGS = 10V|
|a|td(on)|Turn-On Delay Time|–––|23|Oe|–––|ns|GO|VDD = 26V|
|a|tr|Rise Time|–––|220|–––|ID = 195A|
|a|td(off)|Turn-Off Delay Time|–––|90|–––|RG = 2.7|Ω|
|a|tf|Fall Time|–––|130|–––|VGS = 10V|©|
|a|Ciss|Input Capacitance|–––|9200|–––|pF|VGS = 0V|
|a|Coss|Output Capacitance|–––|2020|–––|VDS = 25V|
|a|Crss|Reverse Transfer Capacitance|–––|1340|–––|ƒ = 1.0 MHz,  See Fig. 5|
|a|Coss eff. (ER)|Effective Output Capacitance (Energy Related)|–––|2440|–––|VGS = 0V, VDS = 0V to 32V|, See Fig. 11|
|a|Coss eff. (TR)|©|Effective Output Capacitance (Time Related)|–––|2690|–––|VGS = 0V, VDS = 0V to 32V|
|Diode Characteristics|
|Symbol|Parameter|Min.|Typ.|Max.|Units|Conditions|
|Pe|IS|Continuous Source Current|–––|–––|340|A|MOSFET symbol|D|
|(Body Diode)|showing  the|
|ISM|Pulsed Source Current|–––|–––|1310|A|integral reverse|G|
|oo|(Body Diode)|p-n junction diode.|S|
|a|VSD|QD|Diode Forward Voltage|–––|–––|1.3|V|TJ = 25°C, IS = 195A, VGS = 0V|
|trr|Reverse Recovery Time|–––|27|–––|ns|TJ = 25°C|VR = 34V,|
|–––|31|–––|TJ = 125°C|IF = 195A|
|es|Qrr|[ee]|Reverse Recovery Charge|–––|18|GO|–––|GO|nC|TJ = 25°C|di/dt = 100A/µs|
|a|–––|41|ee|–––|TJ = 125°C|
|aee|IRRM|Reverse Recovery Current|a|–––|1.2|–––|A|TJ = 25°C|
|a|ton|Forward Turn-On Time|Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)|

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Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with 

ISD ≤ 195A, di/dt ≤ 930A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. 

Pulse width ≤ 400µs; duty cycle ≤ 2%. 

- Coss eff. (TR) is a fixed capacitance that gives the same charging time 

some lead mounting arrangements. (Refer to AN-1140) as Coss while VDS is rising from 0 to 80% VDSS. 

®@ Repetitive rating;  pulse width limited by max. junction Coss eff. (ER) is a fixed capacitance that gives the same energy as temperature. Coss while VDS is rising from 0 to 80% VDSS. ® Limited by TJmax, starting TJ = 25°C, L = 0.016mH When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom RG = 25 Ω , IAS = 195A, VGS =10V. Part not recommended for use mended footprint and soldering techniques refer to application note #AN-994. above this value . @R θ is measured at T, approximately 90°C. 

When mounted on 1" square PCB (FR-4 or G-10 Material).  For recom mended footprint and soldering techniques refer to application note #AN-994. 

θ JC 

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10000 10000<br>VGS VGS<br>TOP           15V Fat TOP           15V FEF<br>10V 10V<br>8.0V oseeetit 8.0V HHH<br>7.0V 7.0V<br>6.0V 6.0V<br>5.5V 5.5V<br>1000 4.8V 1000 4.8V<br>BOTTOM 4.5V BOTTOM 4.5V<br>i | yy  Zaeen eee e 5—_———eitemeeetait<br>f s a” sae 4.5V ee<br>4.5V<br>100 100<br>f oo S P’ Ameen ll<br>cassie teat Gf | |.<br>≤ 60µs PULSE WIDTH ≤ 60µs PULSE WIDTH<br>Tj = 25°C Tj = 175°C<br>10 Milli 10 ill Baill<br>0.1 1 10 100 0.1 1 10 100<br>sii c oeur S is So<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics Fig 2.   Typical Output Characteristics<br>1000 2.0<br>ID = 195A<br>aee eee), eeeeee eee VGS = 10V<br>100<br>T TT T W<br>TJ = 175°C 1.5<br>a f HI<br>10 TJ = 25°C<br>fe ee ee ee ee ee ee ee<br>FT APP Eff 1.0 A<br>1<br>a L EE<br>e e [os] VDS = 25V — LT<br>≤ 60µs PULSE WIDTH<br>0.1 PE 0.5 PEELE ELLE<br>1 2 3 4 5 6 7 8 -60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>VGS, Gate-to-Source Voltage (V)<br>Fig 4.   Normalized On-Resistance vs. Temperature<br>Fig 3.   Typical Transfer Characteristics<br>100000 14.0<br>VGS   = 0V,       f = 1 MHZ<br>Ciss    = C gs + Cgd,  C ds SHORTED ID= 187AD= 187A= 187A<br>Crss    = Cgd  12.0<br>Coss   = Cds + Cgd VDS= 32VDS= 32V= 32V<br>Lo 10.0 Py VDS= 20VDS= 20V= 20V<br>10000 Ciss<br>Coss 8.0<br>Crss 6.0<br>1000<br>a s e all 4.0 w ana<br>e ee eee eeeeee<br>PETAR FEET 2.0 P f<br>100 PEI CET 0.0 J | |[|[|<br>1 10 100 0 50 100 150 200<br>VDS, Drain-to-Source Voltage (V)  QG,  Total Gate Charge (nC)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>C, Capacitance (pF)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

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14.0<br>ID= 187AD= 187A= 187A<br>12.0<br>VDS= 32VDS= 32V= 32V<br>10.0 Py VDS= 20VDS= 20V= 20V<br>8.0<br>6.0<br>4.0 w ana<br>2.0 P f<br>0.0 J | |[|[|<br>0 50 100 150 200<br> QG,  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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10000<br>OPERATION IN THIS AREA<br>LIMITED BY RDS(on)<br>1000<br>100µsec<br>fete 1msec foe<br>100 RSS as 10msec acicor a GOe<br>eee DC<br>10<br>e e S adi<br>Saa Tc = 25°C s<br>Tj = 175°C a na ta [aes<br>Single Pulse<br>ARYL<br>1 |<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 8.   Maximum Safe Operating Area<br>50<br>Id = 5mA<br>48<br>C e<br>A TE<br>46<br>4<br>VL WALT<br>44 T TT TT<br>42<br>y,<br>40 ALLELLLL ELE<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>ID,  Drain-to-Source Current (A)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


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1000<br>TJ = 175°C<br>100<br>S f<br>10 Pofe e ee ee TJ = 25°C ee eeef<br>Ppp po<br>1<br>p if<br>|<br>e y eee ee ee<br>VGS = 0V<br>0.1 ff<br>0.0 0.5 1.0 1.5 2.0<br>VSD, Source-to-Drain Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


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Fig 7.   Typical Source-Drain Diode<br>Forward Voltage<br>350<br>300 Limited By Package<br>250 P EL TT<br>u y<br>200<br>S2anw n<br>150 rT .sfFON<br>100<br>P | | | EN<br>50 e ee<br>0 CEL IN<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

**Fig 10.** Drain-to-Source Breakdown Voltage 

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2.0 1400<br>1.8 ID<br>1200 TOP         30A<br>1.6 54A<br>1.4 B a e 1000 BOTTOM 195A<br>1.2 C CC An<br>7) =<br>800<br>1.0<br>0.8 SB eSeeaee ? A 255T 600 PT NN ELETTT<br>0.6 P ET A e a S<br>AP 400 D NeR NE<br>0.4<br>200<br>0.2<br>PC O F RESH<br>0.0 > ses 0 (||| DOSS<br>-5 0 5 10 15 20 25 30 35 40 45 25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>VDS, Drain-to-Source Voltage (V)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 11.** Typical COSS Stored Energy 

**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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1 e e ee eee | eeeee]<br>O D = 0.50 CA<br>0.1 e hgate LLL<br>0.20<br>0.01 P p— o 0.100.050.02 TT ag CA τ J τ J τ 1 τ 1 R1 R a 1 e τ 2 τ R22 R2 R τ 33 R τ 3 3 τ R4 τ 4R4 4 τ C ) τ ee Ri (°C/W)   0.00646     0.0000050.10020     0.0001240.18747     0.001374  τ i (sec) ee<br>0.01 Pee Ci=  τ i / Ri 0.10667     0.008465<br>— eT HT Ci i / Ri Notes: ees ee ee<br>SINGLE PULSE<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>0.001 “nna tes  |i et 2. Peak Tj = P dm x Zthjc + Tc TH<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>1000<br>Py Duty Cycle = Single Pulse PP<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  ∆ Tj = 150°C and<br>0.01 Tstart =25°C (Single Pulse)<br>100<br>T 0.05 TS SSNS, ST<br>0.10 aa<br>10<br>e ee<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  ∆Τ j = 25°C and<br>Tstart = 150°C.<br>e ee e||<br>1<br>en<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14.   Typical Avalanche Current vs.Pulsewidth<br>320 G il Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>280 iR w TOP          Single Pulse                BOTTOM   1.0% Duty Cycle (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption:<br>ID = 195A Purely a thermal phenomenon and failure occurs at a temperature far in<br>240 S H excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type.<br>2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded.<br>200 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.<br>P NA TT<br>4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse.<br>160 PENAL EEE 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>during avalanche).<br>P| | IN AEE PE TE ft<br>6. Iav = Allowable avalanche current.<br>120 a e NN ee<br>7.  ∆ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as<br>25°C in Figure 14, 15).<br>80<br>P etENNEE tav = Average time in avalanche.<br>D = Duty cycle in avalanche =  tav ·f<br>40 Pe EELEeeINKLeeNNeeET ZthJC(D, tav) = Transient thermal resistance, see Figures 13)<br>PE Ee<br>0<br>PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = , T/ ZthJCthJC<br>25 50 75 100 125 150 175<br>Iav =av == 2 A T/ [1.3·BV·Zth]th]]<br>Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>Thermal Response ( Z  thJC ) °C/W<br>**----- End of picture text -----**<br>


- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. ∆ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as 25°C in Figure 14, 15). 

**PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) =** , **T/ ZthJCthJC Iav =av == 2** A **T/ [1.3·BV·Zth]th]] EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.5<br>4.0<br>P PS EE<br>3.5<br>P AE PRET<br>T ARA TVA<br>3.0 | | | AINA TT<br>PRET TT<br>2.5<br>ID = 250µA<br>ID = 1.0mA<br>2.0<br>ID = 1.0A<br>N<br>1.5 EEEERNE<br>1.0 SESEEEEEERE<br>-75 -50 -25 0 25 50 75 100 125 150 175 200<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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10<br>IF = 78A<br>9<br>VR = 34V PT<br>8 TJ = 25°C<br>|<br>TJ = 125°C<br>7 an eo? an<br>—<br>6<br>are<br>5<br>4<br>P o<br>3 P t<br>2<br>100 200 300 400 500<br>diF /dt (A/µs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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11<br>IF = 117A<br>10<br>VR = 34V<br>9 a es<br>TJ = 25°C<br>8 T J = 125°C<br>7<br>6 i 2aa<br>5<br>4 Ai a ee<br>3 a ee<br>o o<br>2<br>e e<br>1<br>100 200 300 400 500<br>diF /dt (A/µs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


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350<br>IF = 78A<br>300 VR = 34V<br>TJ = 25°C _<br>250200 TJ = 125°C +far<br>150<br>L t |<br>7<br>A<br>100<br>| |<br>50 a<br>100 200 300 400 500<br>diF /dt (A/µs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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400<br>IF = 117A<br>S|<br>350<br>VR = 34V<br>300 TJ = 25°C are<br>TJ = 125°C<br>a<br>250<br>|<br>200<br>at<br>P a<br>150<br>100<br>o e |<br>50<br>w r | [||]<br>0 P t TT<br>100 200 300 400 500<br>diF /dt (A/µs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>Period D =<br>+ P.W. Period<br>D.U.T {$$ | ————| —— |t<br>VGS=10V<br>) ©)    •  Circuit Layout Considerations |<br> •<br>| —| - LowGround StrayPla I n eductance<br> •   Low Leakage Inductance ® D.U.T. ISD Waveform<br>+<br>Reverse<br>Recovery Body Diode Forward<br>0) - a = Current Transformer - ® + Current r Current = di/dt /<br>00 ® D.U.T. VDS Waveform Diode Recovery =<br>dv/dt ‘ VDD<br>ma<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re ( aA •   dv/dt controlled by Rg Vpp -<br>•<br>D.U.T. - Device Under Test es ae<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" iO) t<br>* Veg = 5V for Logic Level Devices<br>Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V < tp ><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>20VVGS<br>tp 0.01 Ω IAS<br>**----- End of picture text -----**<br>


**Fig 22a.** Unclamped Inductive Test Circuit 

## **Fig 22b.** Unclamped Inductive Waveforms 

**==> picture [130 x 58] intentionally omitted <==**

**----- Start of picture text -----**<br>
+<br>-<br>≤ 1  us<br>≤ 0.1 %<br>**----- End of picture text -----**<br>


## **Fig 23a.** Switching Time Test Circuit 

**==> picture [134 x 132] intentionally omitted <==**

**----- Start of picture text -----**<br>
Current Regulator<br>Same Type as D.U.T.<br>50K Ω<br>12V .2 µ F<br>.3 µ F<br>+<br>D.U.T. -VDS<br>VGS<br>3mA<br>WAN IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

**==> picture [192 x 121] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDS<br>90%<br>\<br>10%<br>VGS |«le ys| |<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


**==> picture [164 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
Fig 23b.   Switching Time Waveforms<br>**----- End of picture text -----**<br>


**==> picture [162 x 131] intentionally omitted <==**

**----- Start of picture text -----**<br>
Id<br>Vds<br>Vgs<br>Vgs(th)<br>‘ epi w i « w i e > !<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 24b.** Gate Charge Waveform 

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TO-220AB packages are not recommended for Surface Mount Application. 

**Note: For the most current drawing please refer to IR website at http://www.irf.com/package/** 

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8 

## TO-262 Package Outline 

Dimensions are shown in millimeters (inches) 

## TO-262 Part Marking Information 

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Dimensions are shown in millimeters (inches) 

**==> picture [404 x 433] intentionally omitted <==**

**----- Start of picture text -----**<br>
TRR<br>1.60 (.063)<br>1.50 (.059)<br>1.60 (.063)<br>4.10 (.161)<br>1.50 (.059)<br>3.90 (.153) 0.368 (.0145)<br>0.342 (.0135)<br>FEED DIRECTION 1.85 (.073) 11.60 (.457)<br>1.65 (.065) 11.40 (.449) 24.30 (.957)<br>15.42 (.609)<br>23.90 (.941)<br>15.22 (.601)<br>TRL<br>1.75 (.069)<br>10.90 (.429) 1.25 (.049)<br>10.70 (.421) 4.72 (.136)<br>16.10 (.634) 4.52 (.178)<br>15.90 (.626)<br>i ~<br>FEED DIRECTION<br>13.50 (.532) 27.40 (1.079)<br>12.80 (.504) 23.90 (.941)<br>4<br>330.00 60.00 (2.362)<br>(14.173)       MIN.<br>  MAX.<br>30.40 (1.197)<br>NOTES :       MAX.<br>1.   COMFORMS TO EIA-418.<br>26.40 (1.039) 4<br>2.   CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)<br>3.   DIMENSION MEASURED @ HUB.<br>3<br>4.   INCLUDES FLANGE DISTORTION @ OUTER EDGE.<br>**----- End of picture text -----**<br>


Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 02/2009 

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## Links

- [View this product on Novapart](https://novapart.co/products/IRFS3004TRLPBF/power-mosfet-n-channel-40-v-195-a-1750-ohm-to)
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- [Supplier page](https://es.farnell.com/infineon/irfs3004trlpbf/mosfet-n-ch-40v-195a-to-263ab/dp/2781137)
---

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