# Power MOSFET, N Channel, 100 V, 35 A, 0.0135 ohm, TO-220FP, Through Hole

![Product image](https://novapart.co/image/farnell:2253792/)

**URL**: https://novapart.co/products/IRFI4510GPBF/power-mosfet-n-channel-100-v-35-a-00135-ohm-to
**SKU**: IRFI4510GPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5920
**Stock**: 10+

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:35A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.0107ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2V; P

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 42W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220FP |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 35A |
| Drain Source On State Resistance | 0.0135ohm |
| Gate Source Threshold Voltage Max | 2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2253792/)

## IRFI4510GPbF 

HEXFET Power MOSFET 

## **Applications** 

High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits 

|**VDSS**|**100V**|
|---|---|
|**RDS(on)   typ.**<br>**max.**|**10.7m**|
||**13.5m**|
|**ID**|**35A**|



## **Benefits** 

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability Lead-Free 

Halogen-Free 

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D D<br>G S<br>D<br>G<br>S<br>TO-220AB Full-Pak<br>**----- End of picture text -----**<br>


|**G**|**D**|**S**|
|---|---|---|
|Gate|Drain|Source|



## **Absolute Maximum Ratings** 

|**Absolute Maximum Ratings**<br>**Symbol**<br>~~se~~|**Absolute Maximum Ratings**<br>**Parameter**<br>~~se~~|**Max.**<br>~~se~~|**Units**<br>~~se~~|
|---|---|---|---|
|ID@ TC= 25°C<br>~~se~~<br>~~TT~~|Continuous Drain Current,VGS@ 10V<br>~~se~~<br>~~a~~<br>|35<br>~~se~~<br>~~a~~<br>|A<br>~~se~~|
|ID@ TC= 100°C<br>~~TT eHe.wT.Y.Ww—~~|Continuous Drain Current,VGS@ 10V<br>~~a~~<br>~~eHe.wT.Y.Ww—~~|24<br>~~a~~<br>~~eHe.wT.Y.Ww—~~||
|IDM<br>~~TT ~~|Pulsed Drain Current<br>~~a~~<br>|180<br>~~a~~<br>||
|PD@TC= 25°C<br>~~a~~|Maximum Power Dissipation<br>~~a~~|42<br>~~a~~|W<br>~~a~~|
|~~PE~~<br>~~TT~~|Linear DeratingFactor<br>~~PE~~<br>~~TT~~<br>~~TTT/—-Nv-————————~~|0.28<br>~~PE~~<br>~~/—-Nv-————————~~|W/°C<br>~~PE~~<br>~~/—-Nv-————————~~|
|VGS<br>~~TT~~|Gate-to-Source Voltage<br>~~TT~~<br>~~TTT/—-Nv-————————~~|±20<br>~~/—-Nv-————————~~|V<br>~~/—-Nv-————————~~|
|EAS (Thermally limited)<br>~~TT~~<br>~~a~~|Single Pulse Avalanche Energy<br>~~TT~~<br>~~TTT /—-Nv-————————~~<br>~~a~~|206<br>~~/—-Nv-————————~~<br>~~a~~|mJ<br>~~/—-Nv-————————~~<br>~~a~~|
|AS (Thermally limited)<br>TJ<br>TSTG<br>~~a~~|Operating Junction and<br>Storage Temperature Range<br>~~a~~|-55  to + 175<br>~~a~~|°C<br>~~a~~|
||Soldering Temperature, for 10 seconds<br>(1.6mm from case)|300||
|~~a~~|Mountingtorque,6-32 or M3 screw<br>~~a~~|10lb in(1.1N m)<br>~~a~~|~~a~~|



www.irf.com 

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05/15/12 

**Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**<br>**Parameter**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>V(BR)DSS<br>Drain-to-Source Breakdown Voltage<br>100<br>–––<br>–––<br>V<br>V(BR)DSS/TJ<br>Breakdown Voltage Temp. Coefficient<br>–––<br>0.11<br>–––<br>V/°C<br>RDS(on)<br>Static Drain-to-Source On-Resistance<br>–––<br>10.7<br>13.5<br>m<br>VGS(th)<br>Gate Threshold Voltage<br>2.0<br>–––<br>4.0<br>V<br>IDSS<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>μA<br>–––<br>–––<br>250<br>IGSS<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>nA<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>RG(int)<br>Internal Gate  Resistance<br>–––<br>0.6<br>–––<br><br>VDS= 100V,VGS= 0V,TJ= 125°C<br>**Conditions**<br>VGS= 0V,ID= 250μA<br>Reference to 25°C,ID= 5mA<br>VGS= 10V,ID= 21A<br>VDS= VGS,ID= 100μA<br>VDS= 100V,VGS= 0V<br>VGS= 20V<br>VGS= -20V<br>~~DG~~<br>~~a GO~~<br>~~DG~~<br>~~GO~~<br>~~QQ~~<br>~~©~~<br>~~GO~~<br>~~GO~~<br>~~are~~<br>~~ee~~<br>~~a ee Po~~<br>~~a _——E~~<br>~~ee~~<br>~~a~~<br>~~pO~~<br>~~QD~~<br>~~GO GO~~|
|---|
|**Dynamic @ TJ = 25°C(unless otherwise specified)**|
|**Symbol**<br>**Parameter**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>gfs<br>Forward Transconductance<br>55<br>–––<br>–––<br>S<br>Qg<br>Total Gate Charge<br>–––<br>54<br>81<br>nC<br>Qgs<br>Gate-to-Source Charge<br>–––<br>13<br>–––<br>Qgd<br>Gate-to-Drain("Miller")Charge<br>–––<br>16<br>–––<br>td(on)<br>Turn-On DelayTime<br>–––<br>16<br>–––<br>ns<br>tr<br>Rise Time<br>–––<br>33<br>–––<br>**Conditions**<br>VDS= 50V,ID= 21A<br>ID= 21A<br>VGS= 10V<br>VDD= 65V<br>ID= 21A<br>VDS= 50V<br>~~se~~<br>~~CG~~<br>~~a~~<br>~~GO~~<br>~~SG~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~@~~<br>~~es~~<br>~~a~~|
|td(off)<br>Turn-Off DelayTime<br>–––<br>54<br>–––<br>RG= 7.5<br>~~a~~|
|tf<br>Fall Time<br>–––<br>37<br>–––<br>VGS= 10V<br>~~a~~<br>@|
|Ciss<br>Input Capacitance<br>–––<br>2998<br>–––<br>pF<br>Coss<br>Output Capacitance<br>–––<br>216<br>–––<br>Crss<br>Reverse Transfer Capacitance<br>–––<br>103<br>–––<br>Cosseff.(ER)<br>Effective Output Capacitance(EnergyRelated)–––<br>261<br>–––<br>Cosseff.(TR)<br>Effective Output Capacitance(Time Related)<br>–––<br>494<br>–––<br>ƒ= 1.0MHz<br>VGS= 0V,VDS= 0V to 80V<br>,See Fig.11<br>VGS= 0V,VDS= 0V to 80V<br>VGS= 0V<br>VDS= 50V<br>~~Qe~~<br>~~es~~<br>~~aeee~~<br>~~a~~|
|**Diode Characteristics**|
|**Symbol**<br>**Parameter**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>**Conditions**|
|D<br>IS<br>Continuous Source Current<br>–––<br>–––<br>35<br>A<br>MOSFET symbol|
|(Body Diode)<br>showing  the|
|S<br>G<br>ISM<br>Pulsed Source Current<br>–––<br>–––<br>180<br>A<br>(Body Diode)<br>VSD<br>Diode Forward Voltage<br>–––<br>–––<br>1.3<br>V<br>trr<br>Reverse Recovery Time<br>–––<br>39<br>59<br>ns<br>TJ= 25°C<br>VR= 85V<br>–––<br>47<br>71<br>TJ= 125°C<br>IF= 21A<br>Qrr<br>Reverse Recovery Charge<br>–––<br>63<br>95<br>nC<br>TJ= 25°C<br>di/dt = 100A/μs<br>–––<br>90<br>135<br>TJ= 125°C<br>IRRM<br>Reverse RecoveryCurrent<br>–––<br>2.9<br>–––<br>A<br>TJ= 25°C<br>p-n junction diode.<br>TJ= 25°C,IS= 21A,VGS= 0V<br>integral reverse<br>~~EEE~~<br>~~GG~~<br>~~GO (©~~<br>~~aee~~<br>~~a ee~~<br>~~a~~<br>~~a~~<br>~~ee~~<br>~~a~~|
|ton<br>Forward Turn-On Time<br>Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~a~~|



> Notes: @) Repetitive rating;  pulse width limited by max. junction Coss eff. (TR) is a fixed capacitance that gives the same charging eff. (TR) is a fixed capacitance that gives the same charging 

Repetitive rating;  pulse width limited by max. junction 

Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 

> temperature. 

- @ Limited by TJmax, starting TJ = 25°C, L = 0.93mH © RG = 50, IAS = 21A, VGS =10V. Part not recommended for use above this value. 

- Coss eff. (ER) is a fixed capacitance that gives the same energy as 

- Coss while VDS is rising from 0 to 80% VDSS. 

Pulse width  400μs; duty cycle  2%. 

 

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1000<br>VGS<br>TOP           15V<br>10V<br>6.0V<br>5.5V<br>5.0V St ooh<br>4.75V<br>100 4.5V fo<br>BOTTOM 4.25V<br>a Zee a<br>10<br>4.25V<br>fo eee<br>Lat TTT<br>60μs PULSE WIDTH<br>1 PTESS Tj = 25°C nn<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics<br>1000<br>100<br>ee<br>a eee eee ey ee eee eee<br>10<br>ea TJ = 175°C TJ = 25°C<br>1 ee ee ee ee<br>| ye<br>VDS = 50V<br>60μs PULSE WIDTH<br>0.1 PYfff t<br>1 2 3 4 5 6 7<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 3.** Typical Transfer Characteristics 

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100000<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED<br>C  = C<br>rss   gd<br>C = C + C<br>10000 oss   ds  gd<br>Ciss<br>1000 Coss<br>C rss<br>ER tH<br>100 ll<br>10 eeFTTE| SPT ST |<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

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1000<br>VGS<br>TOP           15V<br>10V<br>6.0V<br>5.5V<br>5.0V a<br>4.75V<br>100 4.5V ays sa0illl<br>BOTTOM 4.25V<br>4.25V<br>oO<br>10<br>eee eee eee<br>Py [yp]<br>60μs PULSE WIDTH<br>1 PTEGane Tj = 175°C Bill<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>3.0<br>I = 21A<br>D<br>VGS = 10V<br>2.5 yi<br>2.0 y,<br>LLL<br>1.5 LEAL BZ<br>1.0<br>4<br>0.5 ELL ELE<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

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14.0<br>I = 21A<br>D<br>12.0<br>VDS= 80V<br>VDS= 50V<br>10.0<br>VDS= 20V<br>8.0<br>6.0<br>4.0<br>Lay<br>—_<br>2.00.0 Yi i ff<br>0 10 20 30 40 50 60 70<br> QG,  Total Gate Charge (nC)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>100<br>T = 175°C<br>J<br>TJ = 25°C<br>10<br>V GS  = 0V<br>1.0<br>0.2 0.4 0.6 0.8 1.0 1.2 1.4<br>VSD, Source-to-Drain Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


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Fig 7.   Typical Source-Drain Diode<br>Forward Voltage<br>40<br>30 LIT TT]<br>ae<br>cae<br>20<br>10 Py ty INOx<br>0 TPT aN<br>25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>Fig 9.   Maximum Drain Current vs.<br>Case Temperature<br>1.4<br>1.2<br>1.0 SEER<br>0.8 P|<br>0.6 || |J<br>0.4 rT |TT|AIALTSft<br>0.2 TAT<br>L<br>0.0 ZA<br>-20 0 20 40 60 80 100 120<br>VDS, Drain-to-Source Voltage (V)<br>ID,  Drain Current (A)<br>Energy (μJ)<br>**----- End of picture text -----**<br>


**Fig 11.** Typical COSS Stored Energy 

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1000<br>OPERATION IN THIS AREA<br>LIMITED BY RDS(on)<br>100<br>100μsec<br>10<br>10msec<br>1 1msec<br>DC<br>0.1 Tc = 25°C<br>Tj = 175°C<br>Single Pulse<br>0.01<br>0.1 1 10 100 1000<br>VDS, Drain-to-Source Voltage (V)<br>Fig 8.   Maximum Safe Operating Area<br>125<br>Id = 5mA<br>120<br>SOSUREEEEEP<br>115<br>2<br>110 RREEDZG0REE<br>TCA<br>105<br>100<br>C ACCAE<br>95<br>90 PELALP E<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>Fig 10.   Drain-to-Source Breakdown Voltage<br>900<br>ID<br>800<br>TOP         6.7A<br>700 11A<br>Gana BOTTOM 21A<br>600<br>500 Kc<br>400 CREELLL<br>300<br>FONNANTLEEELLT<br>200<br>CNT NET<br>100 PRS AN TT<br>0 PPPS<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>ID,  Drain-to-Source Current (A)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 10.** Drain-to-Source Breakdown Voltage 

**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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10<br>D = 0.50<br>1 TamasSe ee eee ee ee= ——— SOee<br>0.20<br>0.10<br>0.1 Peol|aaa 0.010.020.05 Zege [een] eee caelee==  ee J J11 R1 R1  2  R22 R2 R  33 R 3 3  R4  4R4 4  ———| C J Ri  FE 1.34312   0.4706191.47895   0.072697 0.62114   0.006558 (°C/W | )  EEE i (sec)<br>I OA ee eee<br>Ci= iRi 0.15442   0.000152<br>0.01 Ci iRi<br>ae SINGLE PULSE ean eee eee oon eee<br>Notes:<br>( THERMAL RESPONSE )<br>A | 1. Duty Factor D = t1/t2 HT<br>a en ee 2. Peak Tj = P dm x Zthjc + Tc !<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>100<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming Tj = 150°C and<br>Duty Cycle = Single Pulse Tstart =25°C (Single Pulse)<br>ep ee HE NU |<br>10 0.01<br>FEAF EEATE TTP NT<br>= 0.05 St et SE<br>1 ete 0.10 ee Se<br>RT AA FEE ETHIE pss FER ETF]<br>RP VAAN eR FTP PT ETE pss HP TY<br>0.1 OT tt<br>Allowed avalanche Current vs avalanche<br>| pulsewidth, tav, assuming  j = 25°C and  He<br>ea Tstart = 150°C. eeeeeeeeeeeeeermeemes<br>0.01 N00<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02<br>tav (sec)<br>Fig 14.   Typical Avalanche Current vs.Pulsewidth<br>250 Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse                 (For further info, see AN-1005 at www.irf.com)<br>BOTTOM   1.0% Duty Cycle 1. Avalanche failures assumption:<br>200 ID = 21A Purely a thermal phenomenon and failure occurs at a temperature far in<br>excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type.<br>|<br>2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded.<br>3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.<br>150 PNT ttt 4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse.<br>5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>INE<br>during avalanche).<br>100 6. Iav = Allowable avalanche current.<br>NN 7. T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as<br>PIN ENLEE 25°C in Figure 14, 15).<br>50 tav = Average time in avalanche.<br>pttNONE D = Duty cycle in avalanche =  tav ·f<br>ZthJC(D, tav) = Transient thermal resistance, see Figures 13)thJC(D, tav) = Transient thermal resistance, see Figures 13)(D, tav) = Transient thermal resistance, see Figures 13)av) = Transient thermal resistance, see Figures 13)) = Transient thermal resistance, see Figures 13)<br>ELEN ERAN<br>0<br>Pi Ey | PAN AA PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = A T/ ZthJCthJC<br>25 50 75 100 125 150 175<br>Iav =av == 2 A T/ [1.3·BV·Zth]th]]<br>Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 22a, 22b. 

4. PD (ave) = Average power dissipation per single avalanche pulse.D (ave) = Average power dissipation per single avalanche pulse.= Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. T = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceedT = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as 25°C in Figure 14, 15). 

ZthJC(D, tav) = Transient thermal resistance, see Figures 13)thJC(D, tav) = Transient thermal resistance, see Figures 13)(D, tav) = Transient thermal resistance, see Figures 13)av) = Transient thermal resistance, see Figures 13)) = Transient thermal resistance, see Figures 13) **PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) =** A **T/ ZthJCthJC Iav =av == 2** A **T/ [1.3·BV·Zth]th]] EAS (AR) = PD (ave)·tavAS (AR) = PD (ave)·tav = PD (ave)·tavD (ave)·tav·tavav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.0<br>RPA ELE<br>3.5<br>FNastal<br>SWANS<br>3.0<br>LSS<br>2.5<br>ID = 100μA<br>ID = 250μA PR<br>2.0 I D  = 1.0mA HN<br>ID = 1.0A<br>1.5 XN<br>rete<br>1.0<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 16.** Threshold Voltage vs. Temperature 

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25<br>IF = 21A<br>VR = 85V<br>20<br>TJ = 25°C ane °<br>¢ ¢<br>TJ = 125°C<br>15 favaPa /<br>10<br>sane<br>5<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


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25<br>IF = 14A<br>VR = 85V<br>20<br>TJ = 25°C<br>TJ = 125°C<br>15<br>BS<br>10 Tier<br>Z|<br>by<br>5<br>| |<br>Ptr<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>Fig. 17 - Typical Recovery Current vs. di;/dt<br>500<br>IF = 14A<br>VR = 85V<br>400<br>TJ = 25°C Pf |<br>TJ = 125°C<br>300 “LA<br>200 ane 28<br>100 po4nn<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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500<br>IF = 21A<br>VR = 85V<br>400<br>TJ = 25°C<br>TJ = 125°C<br>300 SeeBEE Pa ‘ Z|<br>| leeZ|¢<br>200<br>Bann<br>100<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + {¢$ — P.W. ————— Period — + D = —— Period<br>) [©)]  CircuitLow  LayoutStray ConsiderationsInduct | V t t GS=10<br><br>-  CurrentLow LeakageTransformerInductance @ D.U.T. ISD Waveform<br>+<br>= ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>00 > VDD<br>ma<br> Re-Applied<br> Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re (A  dv/dt controlled by Rg Vp p -<br><br>D.U.T. - Device Under Test SCO |<br>Ripple   5% ISD<br>Isp controlled by Duty Factor "D" @\ t<br>* Vg = 5V for Logic Level Devices<br>Fig 21.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V << tp -—><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>AE / \<br>t 2V0VGS ae<br>tp 0.01 IAS<br> Unclamped Inductive Test Circuit Fig 22b.   Unclamped Inductive Waveforms<br>LDD<br>VDSDS VDS<br>90%<br>+<br>VDDDD -<br>D.U.T 10% x \<br>VGSGS VGS<br>) t t Pulse Width < 1μs 1 | ey \<br>Duty Factor < 0.1% td(on) tr td(off) tf<br>  Switching Time Test Circuit Fig 23b.   Switching Time Waveforms<br>Id<br>Vds<br>Vgs<br>L<br>VCC<br>DUT<br>Vgs(th)<br>1K<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 22b.** Unclamped Inductive Waveforms 

**Fig 22a.** Unclamped Inductive Test Circuit 

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LDD<br>VDSDS<br>+<br>VDDDD -<br>D.U.T<br>VGSGS<br>) t t Pulse Width < 1μs<br>Duty Factor < 0.1%<br>Fig 23a.   Switching Time Test Circuit<br>L<br>VCC<br>DUT<br>0<br>1K<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

**Fig 24b.** Gate Charge Waveform 

www.irf.com 

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WITH ASSEMBLY<br>LOT CODE 1234<br>ASSEMBLED ON WW<br>. a<br>'P" in assembly line<br>indicates 'Lead-Free'’<br>suffix in part num<br>indicates 'Halogen-Free"<br>�<br>�<br>( .<br>**----- End of picture text -----**<br>


TO-220AB  Full-Pak packages are not recommended for Surface Mount Application. 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 101N Sepulveda Blvd, El Segundo, California 90245, USA Tel: (310) 252-7105 

TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 05/2012 

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- [Supplier page](https://es.farnell.com/infineon/irfi4510gpbf/mosfet-n-ch-100v-30a-to-220fp/dp/2253792)
---

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