# Power MOSFET, N Channel, 30 V, 18 A, 0.0094 ohm, PQFN, Surface Mount

![Product image](https://novapart.co/image/farnell:2839488/)

**URL**: https://novapart.co/products/IRFHM8337TRPBF/power-mosfet-n-channel-30-v-18-a-00094-ohm-pqfn
**SKU**: IRFHM8337TRPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.1160
**Stock**: 10+

## Specifications

| Parameter | Value |
|---|---|
| No. Of Pins | 8Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Power Dissipation | 25W |
| Transistor Mounting | Surface Mount |
| Transistor Polarity | N Channel |
| Power Dissipation Pd | 25W |
| Rds(On) Test Voltage | 10V |
| On Resistance Rds(On) | 0.0094ohm |
| Transistor Case Style | PQFN |
| Drain Source Voltage Vds | 30V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 18A |
| Drain Source On State Resistance | 0.0094ohm |
| Gate Source Threshold Voltage Max | 1.8V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2839488/)

## ~~Cinfineon~~ 

## IRFHM8337TRPbF ~~—~~ 

## HEXFET[® ] Power MOSFET 

|**VDSS**|**30**|**V**|
|---|---|---|
|**RDS(on)max**<br>(@ VGS=10V)|**12.4**|**m**|
|(@VGS= 4.5V)|**17.9**||
|**Qg (typical)**|**5.4**|**nC**|
|**ID**<br>**(@TC = 25°C)**|**18**|**A**|



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## **Applications** 

- System/load switch, 

- Charge or discharge switch for battery protection 

**Features Benefits** Low Thermal Resistance to PCB (< 5.0°C/W) Enable better Thermal Dissipation Low Profile (<1.05 mm) results in Increased Power Density Industry-Standard Pinout  Multi-Vendor Compatibility Compatible with Existing Surface Mount Techniques Easier Manufacturing RoHS Compliant, Halogen-Free Environmentally Friendlier MSL1,Consumer Qualification Increased Reliability 

||**Parameter**|**Max.**|**Units**|
|---|---|---|---|
|VGS|Gate-to-Source Voltage|± 20|V|
|ID@ TA= 25°C|Continuous Drain Current, VGS@ 10V|12|A|
|ID@ TA= 70°C|Continuous Drain Current, VGS@ 10V|9.4||
|IDM|Pulsed Drain Current|94||
|ID@ TC(Bottom)= 25°C|Continuous Drain Current, VGS@ 10V|35||
|ID@ TC(Bottom)= 100°C|Continuous Drain Current, VGS@ 10V|22||
|ID@ TC= 25°C|Continuous Drain Current, VGS@ 10V<br>(Source Bonding Technology Limited)|18||
|PD@TA= 25°C|Power Dissipation|2.8|W|
|PD@TC(Bottom)= 25°C|Power Dissipation|25||
||Linear Derating Factor|0.02|W/°C|
|TJ<br>TSTG|Operating Junction and<br>Storage Temperature Range|-55  to + 150|°C|



Notes  through  are on page 8 

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IRFHM8337TRPbF ~~LLL~~ 

## ~~Cinfineon~~ 

|<br>IRFHM8337TRPbF<br>~~Cinfineoneon~~<br>~~LLL~~|||
|---|---|---|
|**Static@ TJ = 25°C(unless otherwise specified)**|||
|**Parameter**<br>**Min.**<br>**Typ. **<br>**Max.**<br>**Units**<br>**Conditions**<br>BVDSS<br>Drain-to-Source Breakdown Voltage<br>30<br>–––<br>–––<br>V<br>VGS= 0V,ID= 250µA<br>~~SC~~<br>~~ee~~<br>~~IS I (OO~~|||
|BVDSS/TJ<br>Breakdown Voltage Temp. Coefficient<br>–––<br>0.02<br>–––<br>V/°C Reference to 25°C,ID= 1mA|||
|RDS(on)<br>Static Drain-to-Source On-Resistance<br>–––<br>9.4<br>12.4<br>m VGS= 10V,ID= 12A<br>–––<br>14.5<br>17.9<br>VGS= 4.5V,ID=9.4A<br>VGS(th)<br>Gate Threshold Voltage<br>1.35<br>1.8<br>2.35<br>V<br>VDS= VGS, ID= 25µA<br>VGS(th)<br>Gate Threshold Voltage Coefficient<br>–––<br>-6.2<br>–––<br>mV/°C<br>IDSS<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>1.0<br>µAVDS= 24V,VGS= 0V<br>–––<br>–––<br>150<br>VDS= 24V,VGS= 0V,TJ= 125°C<br>IGSS<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>µA<br>VGS= 20V<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>VGS=-20 V<br>gfs<br>ForwardTransconductance<br>17<br>–––<br>–––<br>S<br>VDS= 15V,ID=9.4A<br>~~Se~~<br>~~ee~~<br>~~ec ee~~<br>~~ee~~<br>~~2 ee~~|||
|Qg<br>Total Gate Charge<br>–––<br>5.4<br>8.1<br>Qgs1<br>Pre-Vth Gate-to-Source Charge<br>–––<br>1.1<br>–––<br>VDS= 15V<br>Qgs2<br>Post-Vth Gate-to-Source Charge<br>–––<br>0.7<br>–––<br>nC<br>VGS= 4.5V<br>Qgd<br>Gate-to-Drain Charge<br>–––<br>2.2<br>–––<br>ID= 9.4A<br>Qgodr<br>Gate Charge Overdrive<br>–––<br>1.5<br>–––<br>Qsw<br>Switch Charge(Qgs2+Qgd)<br>–––<br>2.9<br>–––<br>Qoss<br>Output Charge<br>–––<br>3.8<br>–––<br>nC<br>VDS= 16V,VGS= 0V<br>RG<br>Gate Resistance<br>–––<br>2.0<br>–––<br><br>td(on)<br>Turn-On DelayTime<br>–––<br>9.0<br>–––<br>VDD= 15V, VGS= 4.5V<br>tr<br>Rise Time<br>–––<br>11<br>–––<br>ns<br>ID= 9.4A<br>~~=e~~<br>~~a~~<br>~~I~~<br>~~ee~~<br>~~OO~~<br>~~ee~~<br>~~I~~<br>~~eenD~~<br>~~GO~~<br>~~eeeS~~<br>~~I (CO~~<br>~~a~~<br>~~ID III IN I I(~~<br>~~a~~<br>~~I~~<br>~~ee ee~~|||
|td(off)<br>Turn-Off DelayTime<br>–––<br>9.9<br>–––<br>RG= 1.3|||
|tf<br>Fall Time<br>–––<br>5.6<br>–––<br>Ciss<br>Input Capacitance<br>–––<br>755<br>–––<br>VGS= 0V<br>Coss<br>Output Capacitance<br>–––<br>171<br>–––<br>pF<br>VDS= 15V<br>Crss<br>Reverse Transfer Capacitance<br>–––<br>83<br>–––<br>ƒ= 1.0MHz<br>~~—————————~~<br>~~es~~<br>~~ee i~~|||
|**Avalanche Characteristics**|||
|**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**<br>EAS<br>Single Pulse Avalanche Energy <br>–––<br>13<br>mJ<br>~~pf~~|||
|**Diode Characteristics**|||
|**Parameter**<br>**Min.**<br>**Typ. **<br>**Max.**<br>**Units**<br>**Conditions**<br>IS<br>Continuous Source Current<br>–––<br>–––<br>18<br>MOSFET symbol<br>(BodyDiode)<br>showing  the<br>ISM<br>Pulsed Source Current<br>–––<br>–––<br>94<br>integral reverse<br>(BodyDiode) <br>p-njunction diode.<br>A<br>D<br>S<br>G<br>~~a~~<br>~~I (RD OR~~<br>~~I (OO (OO~~<br>~~aee~~<br>~~I~~<br>~~4~~|||
|VSD<br>Diode Forward Voltage<br>–––<br>–––<br>1.0<br>V<br>TJ= 25°C,IS= 9.4A,VGS= 0V|||
|trr<br>Reverse RecoveryTime<br>–––<br>20<br>30<br>ns<br>TJ= 25°C, IF= 9.4A, VDD= 15V|||
|Qrr<br>Reverse RecoveryCharge<br>–––<br>27<br>41<br>nC<br>di/dt = 200A/µs<br>~~ps~~|||
|**Thermal Resistance**|||
|**Parameter**<br>**Typ. **<br>**Max.**<br>**Units**|||
|RJC (Bottom)Junction-to-Case<br>–––<br>5.0|||
|RJC (Top)<br>Junction-to-Case<br>–––<br>50<br>°C/W|||
|RJA<br>Junction-to-Ambient<br>–––<br>45|||
|RJA (<10s)<br>Junction-to-Ambient<br>–––<br>31|||
|2<br>2016-2-23<br>~~re~~|||



IRFHM8337TRPbF 

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1000 1000<br>VGS VGS<br>TOP           10V TOP           10V<br>5.0V 5.0V<br>4.5V 4.5V<br>100 3.5V 3.3V 3.5V 3.3V<br>3.0V 3.0V<br>2.9V 100 2.9V<br>BOTTOM 2.7V BOTTOM 2.7V<br>10<br>10<br>1<br>2.7V 2.7V<br>60µs PULSE WIDTH Tj = 25°C 60µs PULSE WIDTH<br>0.1 1 Tj = 150°C<br>0.1 1 10 100 0.1 1 10 100<br>= | A<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics  Fig 2.   Typical Output Characteristics<br>100 1.8<br>I = 12A<br>D<br>1.6 V GS  = 10V<br>10 TAT) 1.4 (ae<br>T = 25°C 1.2<br>J<br>T = 150°C<br>J<br>1<br>1.0<br>V DS  = 15V 0.8<br>60µs PULSE WIDTH<br>0.1 Wy eet<br>0.6<br>1 2 3 4 5 6<br>-60 -40 -20 0 20 40 60 80 100 120 140 160<br>VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature (°C)<br>Fig 3.   Typical Transfer Characteristics  Fig 4.   Normalized On-Resistance vs. Temperature<br>10000 14.0<br>VGS   = 0V,       f = 1 MHZ ID= 9.4A<br>C iss    = C gs  + C gd ,  C ds  SHORTED 12.0<br>Crss    = Cgd  VDS= 24V<br>C oss   = C ds  + C gd 10.0 V DS = 15V<br>1000 C<br>iss<br>8.0<br>C oss 6.0<br>100 Crss 4.0<br>seit (i tso cant<br>2.0<br>10 ip) 0.0 eet<br>1 10 100 0 2 4 6 8 10 12 14 16<br>VDS, Drain-to-Source Voltage (V)  QG,  Total Gate Charge (nC)<br>Fig 5.   Typical Capacitance vs. Drain-to-Source Voltage  Fig 6.   Typical Gate Charge vs. Gate-to-Source Voltage<br>3  2016-2-23<br>a<br>VGS, Gate-to-Source Voltage (V)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>C, Capacitance (pF)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


IRFHM8337TRPbF ~~LLL~~ 

## ~~Cinfineon~~ 

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1000 1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>100 100<br>100µsec<br>10 T J = 150°C Ali} 10 Lee<br>T J  = 25°C 1msec<br>1 1<br>TA = 25°C 10msec<br>Tj = 150°C<br>VGS = 0V Single Pulse<br>0.1 0.1<br>0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 1 10 100<br>VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 7.   Typical Source-Drain Diode Forward Voltage  Fig 8.   Maximum Safe Operating Area<br>12<br>2.5<br>10<br>2.0<br>8<br>TAT I D  = 25µA<br>6<br>1.5<br>4 Pana SanE<br>1.0<br>2<br>0 tte<br>0.5<br>25 50 75 100 125 150<br>-75 -50 -25 0 25 50 75 100 125 150<br> TA , Ambient Temperature (°C)<br>TJ , Temperature ( °C )<br>VGS(th), Gate Threshold Voltage (V)<br>ISD, Reverse Drain Current (A)<br>ID,  Drain Current (A)<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Ambient Temperature 

**Fig 10.** Threshold Voltage Vs. Temperature 

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100 D = 0.50 (BEALL SEE)Neo<br>10 0.20<br>- 0.10 eee eee<br>0.05<br>1 samt 0.02 oes ail 0 BAN<br>0.01<br>TAT<br>0.1<br>Notes:<br>SINGLE PULSE 1. Duty Factor D = t1/t2<br>at ea<br>( THERMAL RESPONSE ) 2. Peak Tj = P dm x Zthja + TA<br>fi en A i<br>0.01<br>1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100 1000<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z  thJA ) °C/W<br>**----- End of picture text -----**<br>


**Fig 11.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 4 ~~= °°”.~~ 

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IRFHM8337TRPbF 

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35 60<br>I = 12A ID<br>D<br>30 To 50 TOP          2.95A<br> 3.63A<br>BOTTOM  9.40A<br>25 40<br>20 AEMTCLT} CHELE<br>30<br>T = 125°C<br>J<br>15<br>ANCE} 20 AACE<br>10<br>NEE) 10 ESN<br>T = 25°C<br>J<br>5<br>EERRRReee 0 PPPS<br>2 4 6 8 10 12 14 16 18 20 TD<br>25 50 75 100 125 150<br>VGS, Gate -to -Source Voltage  (V) Starting TJ , Junction Temperature (°C)<br>) <br>RDS(on),  Drain-to -Source On Resistance (m EAS , Single Pulse Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Fig 12.** On– Resistance vs. Gate Voltage 

**Fig 13.** Maximum Avalanche Energy vs. Drain Current 

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100<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  Tj = 125°C and<br>10 Tstart =25°C (Single Pulse)<br>10/00 ea<br>1<br>BaiGates<br>0.1 Sv a ell<br>Bee Allowed avalanche Current vs avalanche  al<br>pulsewidth, tav, assuming  j = 25°C and<br>Tstart = 125°C.<br>ESB<br>0.01<br>1.0E-05 1.0E-04 1.0E-03 1.0E-02 a 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


Fig 14. Single avalanche event: pulse current vs. pulse width 

5 2016-2-23 ~~ee~~ 

~~Cinfi~~ 

## IRFHM8337TRPbF ~~a~~ 

**Fig 15.** Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET[® ] Power MOSFETs 

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15V<br>VDS L DRIVER<br>R G D.U.T +<br>- [V][DD]<br>IAS<br>20V<br>tp 0.01<br>**----- End of picture text -----**<br>


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**Fig 16a.** Unclamped Inductive Test Circuit 

**Fig 16b.** Unclamped Inductive Waveforms 

**Fig 17a.** Switching Time Test Circuit 

**Fig 17b.** Switching Time Waveforms 

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Id<br>Vds<br>Vgs<br>|<br>' Hl<br>Vgs(th)<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 18.** Gate Charge Test Circuit 

**Fig 19.** Gate Charge Waveform 

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IRFHM8337TRPbF ~~|~~ 

## **Placement and Layout Guidelines** 

The typical application topology for this product is the synchronous buck converter. These converters operate at high frequencies (typically around 400 kHz). During turn-on and turn-off switching cycles, the high di/dt currents circulating in the parasitic elements of the circuit induce high voltage ringing which may exceed the device rating and lead to undesirable effects. One of the major contributors to the increase in parasitics is the PCB power circuit inductance. 

This section introduces a simple guideline that mitigates the effect of these parasitics on the performance of the circuit and provides reliable operation of the devices. 

To reduce high frequency switching noise and the effects of Electromagnetic Interference (EMI) when the control MOSFET (Q1) is turned on, the layout shown in Figure 19 is recommended. The input bypass capacitors, control MOSFET and output capacitors are placed in a tight loop to minimize parasitic inductance which in turn lowers the amplitude of the switch node ringing, and minimizes exposure of the MOSFETs to repetitive avalanche conditions. 

When the synchronous MOSFET (Q2) is turned on, high average DC current flows through the path indicated in Figure 19. Therefore, the Q2 turn-on path should be laid out with a tight loop and wide traces at both ends of the inductor to minimize loop resistance. 

7 2016-2-23 ~~ee~~ 

~~Cinfineon~~ 

IRFHM8337TRPbF ~~LLL~~ 

## **PQFN 3.3 x 3.3 Outline “C” Package Details** 

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## **PQFN 3.3 x 3.3 Outline “G” Package Details** 

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For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-1136: http://www.irf.com/technical-info/appnotes/an-1136.pdf For more information on package inspection techniques, please refer to application note AN-1154: - - http://www.irf.com/technical info/appnotes/an 1154.pdf 8 2016-2-23 ~~ee~~ 

~~Cinfineon~~ 

IRFHM8337TRPbF ~~LLL~~ 

## **PQFN 3.3 x 3.3 Part Marking** 

## INTERNATIONAL RECTIFIER LOGO 

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DATE CODE<br>XXXX PART NUMBER<br>ASSEMBLY ~<br>SITE CODE ?YWW? MARKING CODE<br>(Per Marking Spec)<br>(Per SCOP 200-002) XXXXX<br>» \ LOT CODE<br>PIN 1 (Eng Mode - Min last 4 digits of EATI#)<br>(Prod Mode - 4 digits of SPN code)<br>IDENTIFIER<br>**----- End of picture text -----**<br>


Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

## **PQFN 3.3 x 3.3 Tape and Reel** 

|Bo<br>W<br>P1<br>Ao<br>Ko<br>CODE<br>**TAPE DIMENSIONS**<br>**REEL DIMENSIONS**<br>**QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE**<br>Dimension design to accommodate the component width<br>Dimension design to accommodate the component lenght<br>Dimension design to accommodate the component thickness<br>Pitch between successive cavitycenters<br>Overall width of the carrier tape<br>Bo<br>W<br>P1<br>Ao<br>Ko<br>DIMENSION (MM)<br>CODE<br>MIN<br>MAX<br>DIMENSION (INCH)<br>MIN<br>MAX<br>3.50<br>3.70<br>.138<br>.146<br>1.10<br>1.30<br>7.90<br>8.10<br>.043<br>.051<br>11.80<br>12.20<br>.311<br>.319<br>12.30<br>12.50<br>.465<br>.480<br>.484<br>.492<br>3.50<br>3.70<br>.138<br>.146<br>DESCRIPTION<br>W1<br>Qty<br>4000<br>Reel Diameter<br>13   Inches<br>—>|Bo<br>W<br>P1<br>Ao<br>Ko<br>CODE<br>**TAPE DIMENSIONS**<br>**REEL DIMENSIONS**<br>**QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE**<br>Dimension design to accommodate the component width<br>Dimension design to accommodate the component lenght<br>Dimension design to accommodate the component thickness<br>Pitch between successive cavitycenters<br>Overall width of the carrier tape<br>Bo<br>W<br>P1<br>Ao<br>Ko<br>DIMENSION (MM)<br>CODE<br>MIN<br>MAX<br>DIMENSION (INCH)<br>MIN<br>MAX<br>3.50<br>3.70<br>.138<br>.146<br>1.10<br>1.30<br>7.90<br>8.10<br>.043<br>.051<br>11.80<br>12.20<br>.311<br>.319<br>12.30<br>12.50<br>.465<br>.480<br>.484<br>.492<br>3.50<br>3.70<br>.138<br>.146<br>DESCRIPTION<br>W1<br>Qty<br>4000<br>Reel Diameter<br>13   Inches<br>—>|Bo<br>W<br>P1<br>Ao<br>Ko<br>CODE<br>**TAPE DIMENSIONS**<br>**REEL DIMENSIONS**<br>**QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE**<br>Dimension design to accommodate the component width<br>Dimension design to accommodate the component lenght<br>Dimension design to accommodate the component thickness<br>Pitch between successive cavitycenters<br>Overall width of the carrier tape<br>Bo<br>W<br>P1<br>Ao<br>Ko<br>DIMENSION (MM)<br>CODE<br>MIN<br>MAX<br>DIMENSION (INCH)<br>MIN<br>MAX<br>3.50<br>3.70<br>.138<br>.146<br>1.10<br>1.30<br>7.90<br>8.10<br>.043<br>.051<br>11.80<br>12.20<br>.311<br>.319<br>12.30<br>12.50<br>.465<br>.480<br>.484<br>.492<br>3.50<br>3.70<br>.138<br>.146<br>DESCRIPTION<br>W1<br>Qty<br>4000<br>Reel Diameter<br>13   Inches<br>—>|Bo<br>W<br>P1<br>Ao<br>Ko<br>CODE<br>**TAPE DIMENSIONS**<br>**REEL DIMENSIONS**<br>**QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE**<br>Dimension design to accommodate the component width<br>Dimension design to accommodate the component lenght<br>Dimension design to accommodate the component thickness<br>Pitch between successive cavitycenters<br>Overall width of the carrier tape<br>Bo<br>W<br>P1<br>Ao<br>Ko<br>DIMENSION (MM)<br>CODE<br>MIN<br>MAX<br>DIMENSION (INCH)<br>MIN<br>MAX<br>3.50<br>3.70<br>.138<br>.146<br>1.10<br>1.30<br>7.90<br>8.10<br>.043<br>.051<br>11.80<br>12.20<br>.311<br>.319<br>12.30<br>12.50<br>.465<br>.480<br>.484<br>.492<br>3.50<br>3.70<br>.138<br>.146<br>DESCRIPTION<br>W1<br>Qty<br>4000<br>Reel Diameter<br>13   Inches<br>—>|Bo<br>W<br>P1<br>Ao<br>Ko<br>CODE<br>**TAPE DIMENSIONS**<br>**REEL DIMENSIONS**<br>**QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE**<br>Dimension design to accommodate the component width<br>Dimension design to accommodate the component lenght<br>Dimension design to accommodate the component thickness<br>Pitch between successive cavitycenters<br>Overall width of the carrier tape<br>Bo<br>W<br>P1<br>Ao<br>Ko<br>DIMENSION (MM)<br>CODE<br>MIN<br>MAX<br>DIMENSION (INCH)<br>MIN<br>MAX<br>3.50<br>3.70<br>.138<br>.146<br>1.10<br>1.30<br>7.90<br>8.10<br>.043<br>.051<br>11.80<br>12.20<br>.311<br>.319<br>12.30<br>12.50<br>.465<br>.480<br>.484<br>.492<br>3.50<br>3.70<br>.138<br>.146<br>DESCRIPTION<br>W1<br>Qty<br>4000<br>Reel Diameter<br>13   Inches<br>—>|Bo<br>W<br>P1<br>Ao<br>Ko<br>CODE<br>**TAPE DIMENSIONS**<br>**REEL DIMENSIONS**<br>**QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE**<br>Dimension design to accommodate the component width<br>Dimension design to accommodate the component lenght<br>Dimension design to accommodate the component thickness<br>Pitch between successive cavitycenters<br>Overall width of the carrier tape<br>Bo<br>W<br>P1<br>Ao<br>Ko<br>DIMENSION (MM)<br>CODE<br>MIN<br>MAX<br>DIMENSION (INCH)<br>MIN<br>MAX<br>3.50<br>3.70<br>.138<br>.146<br>1.10<br>1.30<br>7.90<br>8.10<br>.043<br>.051<br>11.80<br>12.20<br>.311<br>.319<br>12.30<br>12.50<br>.465<br>.480<br>.484<br>.492<br>3.50<br>3.70<br>.138<br>.146<br>DESCRIPTION<br>W1<br>Qty<br>4000<br>Reel Diameter<br>13   Inches<br>—>|
|---|---|---|---|---|---|
|||||CODE|DESCRIPTION|
|||||Ao|Dimension design to accommodate the component width|
|||||Bo|Dimension design to accommodate the component lenght|
|||||Ko|Dimension design to accommodate the component thickness|
|||||W|Overall width of the carrier tape|
|||||P1|Pitch between successive cavitycenters|
|Note: For the most current drawing please refer to IR website at|Note: For the most current drawing please refer to IR website at|Note: For the most current drawing please refer to IR website at|Note: For the most current drawing please refer to IR website athttp://www.irf.com/package/|||



Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

9 

2016-2-23 

|infineon|infineon|infineon|infineon|
|---|---|---|---|
|<br>IRFHM8337TRPbF<br>**Qualification Information† **<br>infineon<br>~~Genee~~||||
||**Qualification Level**|Consumer††<br>(per JEDEC JESD47F guidelines)||
||**Moisture Sensitivity Level**|PQFN 3.3mm x 3.3mm|MSL1<br>(per JEDEC J-STD-020D†††)|
||**RoHS Compliant**||Yes|



- Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/ 

- ††     Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information: - 

- http://www.irf.com/whoto call/salesrep/ 

- †††    Applicable version of JEDEC standard at the time of product release. 

## **Notes:** 

- Repetitive rating;  pulse width limited by max. junction temperature. 

- Starting TJ = 25°C, L = 0.297mH, RG = 50, IAS = 9.4A. 

- Pulse width  400µs; duty cycle  2%. 

-  R is measured at TJ of approximately 90°C. 

- When mounted on 1 inch square  PCB (FR-4). Please refer to AN-994 for more details: - - 

- http://www.irf.com/technical info/appnotes/an 994.pdf 

- Calculated continuous current based on maximum allowable junction temperature. 

-  Current limited  to 18A by  source bonding technology. 

-  Pulse drain current is limited to 72A by source bonding technology. 

10 2016-2-23 ~~ee~~ 

2016-2-23 

IRFHM8337TRPbF 

- IRFHM8337TRPbF 

- ~~Genee~~ **Revision History** 

|**Revision Historyy**||
|---|---|
|**Date**|**Comments**|
|6/5/2014|<br>Updated schematic  on page 1<br><br>Updated part marking on page 8<br><br>Updated tape and reel onpage 9|
|7/1/2014|<br>Remove “SAWN” package outline on page 8.|
|02/23/2016|<br>Updated datasheet with corporate template<br><br>Updated package outline to reflect the PCN # (241-PCN30-Public) for “Option C” and<br>“OptionG”onpage 8.|



**Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved.** 

## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 

11 2016-2-23 ~~ee~~ 



## Links

- [View this product on Novapart](https://novapart.co/products/IRFHM8337TRPBF/power-mosfet-n-channel-30-v-18-a-00094-ohm-pqfn)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/en-ES/infineon/irfhm8337trpbf/mosfet-n-ch-30v-18a-pqfn/dp/2839488)
---

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