# Power MOSFET, N Channel, 40 V, 85 A, 2400 µohm, PQFN, Surface Mount

![Product image](https://novapart.co/image/farnell:2253807/)

**URL**: https://novapart.co/products/IRFH7440TRPBF/power-mosfet-n-channel-40-v-85-a-2400-ohm-pqfn
**SKU**: IRFH7440TRPBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.4270
**Stock**: 1000+
**Lead Time**: 64 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:85A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0018ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.2V; Power

## Specifications

| Parameter | Value |
|---|---|
| Msl | MSL 1 - Unlimited |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 5Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 104W |
| Transistor Mounting | Surface Mount |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | PQFN |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 150°C |
| Continuous Drain Current Id | 85A |
| Drain Source On State Resistance | 2400µohm |
| Gate Source Threshold Voltage Max | 2.2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2253807/)

HEXFET ® Power MOSFET 

## **Applications** 

Brushed Motor drive applications BLDC Motor drive applications PWM Inverterized topologies Battery powered circuits Half-bridge and full-bridge topologies Electronic ballast applications Synchronous rectifier applications Resonant mode power supplies OR-ing and redundant power switches DC/DC and AC/DC converters 

|HEXFET<br>Power MOSFET<br>®|Power MOSFET|
|---|---|
|**VDSS**|**40V**|
|**RDS(on)   typ.**<br>**max.**|**1.8m**Ω|
||**2.4m**Ω|
|**ID (Silicon Limited)**|**159A**|
|**ID (Package Limited)**|**85A**|



## **Benefits** 

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness 

Fully Characterized Capacitance and Avalanche SOA 

Enhanced body diode dV/dt and dI/dt Capability RoHS Compliant containing no Lead, no Bromide, and no Halogen 

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PQFN 5X6 mm<br>**----- End of picture text -----**<br>


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Base Part Number Package Type Standard Pack Orderable Part Number Note<br>Form Quantity<br>IRFH7440PBF eG PQFN 5mm x 6mm Tape and Reel 4000 IRFH7440TRPBF<br>PQFN 5mm x 6mm Tape and Reel 400 IRFH7440TR2PBF EOL notice #259<br>| | ——_ ff — | ——_ |<br>6.0 200<br>ID = 50A<br>5.0<br>Limited By Package<br>150<br>Lae ~.)<br>4.0<br>TJ = 125°C 100<br>Ne Ls<br>3.0 —m PE ZS<br>50<br>2.0 ENaEEe ||<br>TJ = 25°C<br>1.0 0<br>CECHEEE PL LL| |e<br>4 6 8 10 12 14 16 18 20 25 50 75 100 125 150<br> TC , Case Temperature (°C)<br>VGS, Gate -to -Source Voltage  (V)<br>ID,  Drain Current (A)<br>)  Ω<br>RDS(on),  Drain-to -Source On Resistance (m<br>**----- End of picture text -----**<br>


**Fig 1.** Typical On-Resistance vs. Gate Voltage 

**Fig 2.** Maximum Drain Current vs. Case Temperature 

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## **Absolute Maximum Ratings** 

|<br>**Symbol**|<br>**Parameter**|**Max.**|**Max.**|**Units**|
|---|---|---|---|---|
|ID@ TC= 25°C|Continuous Drain Current,VGS@ 10V(Silicon Limited)|159�||A|
|ID@ TC= 100°C|Continuous Drain Current,VGS@ 10V(Silicon Limited)|101�|||
|ID@ TC= 25°C|Continuous Drain Current,VGS@ 10V(Package Limited)|85|||
|IDM|Pulsed Drain Current�|624|||
|PD@TC= 25°C|Maximum Power Dissipation|104||W|
||Linear DeratingFactor|0.83||W/°C|
|VGS|Gate-to-Source Voltage|± 20||V|
|dv/dt|Peak Diode Recovery �|3.0||V/ns|
|TJ<br>TSTG|Operating Junction and<br>Storage Temperature Range|-55  to + 150||°C|
|**Avalanche Characteristics**|||||
|EAS (Thermally limited)|Single Pulse Avalanche Energy �|121||mJ|
|EAS (Thermally limited)|Single Pulse Avalanche Energy �|232|||
|IAR|Avalanche Current��|See Fig. 14, 15, 22a, 22b||A|
|EAR|Repetitive Avalanche Energy �|||mJ|
|**Thermal Resistance**|||||
|**Symbol**|**Parameter**|**Typ.**|**Max.**|**Units**|
|RθJC (Bottom)|Junction-to-Case�|–––|1.2|°C/W|
|RθJC (Top)|Junction-to-Case�|–––|31||
|RθJA|Junction-to-Ambient�|–––|35||
|RθJA (<10s)|Junction-to-Ambient�|–––|22||



## **Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-to-Source Breakdown Voltage|40|–––|–––|V|VGS= 0V,ID= 250μA|
|ΔV(BR)DSS/ΔTJ|Breakdown Voltage Temp. Coefficient|–––|0.031|–––|V/°C|Reference to 25°C,ID= 1.0mA�|
|RDS(on)|Static Drain-to-Source On-Resistance|–––|1.8|2.4|mΩ|VGS= 10V,ID= 50A�|
|||–––|2.7|–––|mΩ|VGS= 6.0V,ID= 25A�|
|VGS(th)|Gate Threshold Voltage|2.2|–––|3.9|V|VDS= VGS,ID= 100μA|
|IDSS|Drain-to-Source Leakage Current|–––|–––|1.0|μA|VDS= 40V,VGS= 0V|
|||–––|–––|150||VDS= 40V,VGS= 0V,TJ= 125°C|
|IGSS|Gate-to-Source Forward Leakage|–––|–––|100|nA|VGS= 20V|
||Gate-to-Source Reverse Leakage|–––|–––|-100||VGS= -20V|
|RG|Internal Gate Resistance|–––|2.6|–––|Ω||



## **������** 

- Calculated continuous current based on maximum allowable junction temperature. Current is limited to 85A by source bond technology. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. 

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- Repetitive rating;  pulse width limited by max. junction temperature. 

- Limited by TJmax, starting TJ = 25°C, L = 0.097mH RG = 50 Ω , IAS = 50A, VGS =10V. 

- ISD ≤ 50A, di/dt ≤ 1126A/μs, VDD ≤ V(BR)DSS, TJ ≤ 150°C. 

- Pulse width ≤ 400μs; duty cycle ≤ 2%. 

- Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 

- Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. 

- When mounted on 1 inch square 2 oz copper pad on 1.5 x 1.5 in. board of FR-4 material. 

- �θ ������������������������������������� 

- Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50 Ω , IAS = 22A, VGS =10V. 

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**Dynamic @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**<br>**Parameter**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>gfs<br>Forward Transconductance<br>149<br>–––<br>–––<br>S<br>Qg<br>Total Gate Charge<br>–––<br>92<br>138<br>nC<br>Qgs<br>Gate-to-Source Charge<br>–––<br>22<br>–––<br>Qgd<br>Gate-to-Drain("Miller")Charge<br>–––<br>29<br>–––<br>Qsync<br>Total Gate Charge Sync.(Qg- Qgd)<br>–––<br>63<br>–––<br>td(on)<br>Turn-On DelayTime<br>–––<br>12<br>–––<br>ns<br>tr<br>Rise Time<br>–––<br>45<br>–––<br>td(off)<br>Turn-Off DelayTime<br>–––<br>53<br>–––<br>tf<br>Fall Time<br>–––<br>42<br>–––<br>Ciss<br>Input Capacitance<br>–––<br>4574<br>–––<br>pF<br>Coss<br>Output Capacitance<br>–––<br>700<br>–––<br>Crss<br>Reverse Transfer Capacitance<br>–––<br>466<br>–––<br>Cosseff.(ER)<br>Effective Output Capacitance(EnergyRelated)<br>–––<br>863<br>–––<br>Cosseff.(TR)<br>Effective Output Capacitance(Time Related)<br>–––<br>1229<br>–––<br>ID= 30A<br>RG= 2.7Ω<br>VGS= 10V<br>VDD= 20V<br>**Conditions**<br>VDS= 10V,ID= 50A<br>VDS=20V<br>ID= 50A<br>VGS= 10V<br>VGS= 0V<br>VDS= 25V<br>ƒ= 1.0 MHz<br>VGS= 0V,VDS= 0V to 32V<br>VGS= 0V,VDS= 0V to 32V<br>~~es~~<br>~~GDfdQO~~<br>~~es~~<br>~~es~~<br>~~es~~<br>©<br>~~ee~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~ee~~<br>~~@~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~ee~~|
|---|
|**Diode Characteristics**|
|S<br>D<br>G<br>**Symbol**<br>**Parameter**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Units**<br>IS<br>Continuous Source Current<br>–––<br>–––<br>85<br>A<br>(Body Diode)<br>ISM<br>Pulsed Source Current<br>–––<br>–––<br>745<br>A<br>(Body Diode)<br>integral reverse<br>p-n junction diode.<br>MOSFET symbol<br>showing  the<br>**Conditions**<br>~~es~~<br>~~DG (~~<br>~~eeee~~<br>~~ee~~<br>~~ee~~|
|VSD<br>Diode Forward Voltage<br>–––<br>0.9<br>1.3<br>V<br>trr<br>Reverse Recovery Time<br>–––<br>25<br>–––<br>ns<br>TJ= 25°C<br>VR= 34V,<br>–––<br>27<br>–––<br>TJ= 125°C<br>IF= 50A<br>Qrr<br>Reverse Recovery Charge<br>–––<br>16<br>–––<br>nC<br>TJ= 25°C<br>di/dt = 100A/μs<br>–––<br>17<br>–––<br>TJ= 125°C<br>IRRM<br>Reverse RecoveryCurrent<br>–––<br>1.2<br>–––<br>A<br>TJ= 25°C<br>TJ= 25°C,IS= 50A,VGS= 0V<br>~~Ge~~<br>~~eesee~~<br>~~| |~~<br>~~**e**e ee~~<br>~~:~~<br>~~||~~<br>~~s~~|



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1000 1000<br>VGS VGS<br>TOP           15V TOP           15V<br>10V 10V<br>ee 1 ae 8.0V Ee 2a 8.0V<br>7.0V 7.0V<br>fi 6.0V fh 6.0V<br>5.5V 5.5V<br>100 | fo 5.0V 100 | 5.0V<br>BOTTOM 4.5V BOTTOM 4.5V<br>Yer fo<br>4.5V<br>10 ageeee Ht 10 YTCas<br>ee ee ee eel po<br>Eri 4.5V ≤ 60μs PULSE WIDTH iit Htl =H ≤ Fel 60μs PULSE WIDTH<br>1 annipe Tj = 25°C | 1 LTEpeel Tj = 150°C ill<br>0.1 1 10 100 0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)<br>Fig 3.   Typical Output Characteristics Fig 4.   Typical Output Characteristics<br>1000 1.8<br>ID = 50A<br>1.6 V GS  = 10V<br>100 es TJ = 150°C ee ee ee 1.4 ar y,<br>SSbt = 1.2 ALLELEWA<br>T = 25°C<br>J<br>10 |PEEVP] yy | 1.0 LLEKLLLLLwa<br>PART TP V DS  = 10V ye 0.8 LAELL ELL<br>aim ≤ 60μs PULSE WIDTH<br>1.0 HEA 0.6 ALLEL<br>3 4 5 6 7 8 9 -60 -40 -20 0 20 40 60 80 100 120 140 160<br>TJ , Junction Temperature (°C)<br>VGS, Gate-to-Source Voltage (V)<br>Fig 6.   Normalized On-Resistance vs. Temperature<br>Fig 5.   Typical Transfer Characteristics<br>100000 14.0<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED ID= 50A<br>C  = C 12.0<br>Crss  oss   = Cds gd + Cgd VDS= 32V<br>= 10.0 a VDS= 20V ff<br>10000 eo oo if |<br>ee| Ciss ee ee 8.0 Pf | j/\ |<br>a<br>C<br>oss 6.0<br>P| | fl.<br>1000 m= Crss ee [HIF] eeeel<br>A i<br>SCS 4.0 ——<br>EHH Pee 2.0 fe | | |<br>eenN| 7Ae<br>100 0.0<br>1 10 100 0 20 40 60 80 100 120<br>VDS, Drain-to-Source Voltage (V)  QG,  Total Gate Charge (nC)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>C, Capacitance (pF)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 6.** Normalized On-Resistance vs. Temperature 

**Fig 7.** Typical Capacitance vs. Drain-to-Source Voltage 

**Fig 8.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>Ee es ee — ee<br>T = 150°C<br>100 J<br>[_——es —ey ey ee ee<br>T = 25°C<br>10 yf J<br>— oe<br>V GS  = 0V<br>1.0 ee<br>0.0 0.5 1.0 1.5 2.0 2.5<br>VSD, Source-to-Drain Voltage (V)<br>Fig 9.   Typical Source-Drain Diode<br>Forward Voltage<br>50<br>Id = 1.0mA<br>48<br>46<br>AW<br>44<br>A<br>+<br>42<br>40<br>-60 -40 -20 0 20 40 60 80 100 120 140 160<br>TJ , Temperature ( °C )<br>ISD, Reverse Drain Current (A)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 11.** Drain-to-Source Breakdown Voltage 

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10000<br>OPERATION IN THIS AREA<br>Po LIMITED BY R DS(on) TT TT<br>1000<br>100μsec<br>100 PSPT0 Semw af OgSepy<br>1msec<br>10 Limited by<br>EeSe package et 10msec REE<br>a<br>1 Tc = 25°C DC<br>Tj = 150°C Le<br>Single Pulse<br>0.1 COee,rer<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 10.** Maximum Safe Operating Area 

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0.7<br>0.6<br>0.50.4 PTEEE E EA<br>0.3<br>0.2 HH aa<br>0.1<br>Pie Lt<br>0.0<br>-5 0 5 10 15 20 25 30 35 40<br>VDS, Drain-to-Source Voltage (V)<br>Fig 12.   Typical COSS Stored Energy<br>Energy (μJ)<br>**----- End of picture text -----**<br>


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40<br>VGS = 5.0V<br>VGS = 6.0V<br>30 V GS  = 7.0V<br>VGS = 8.0V<br>VGS =10V<br>20<br>10<br>SA<br>0 eS<br>0 100 200 300 400 500<br>ID, Drain Current (A)<br>) Ω<br>RDS(on),  Drain-to -Source On Resistance (m<br>**----- End of picture text -----**<br>


**Fig 13.** Typical On-Resistance vs. Drain Current 

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10<br>1<br>D = 0.50<br>0.20<br>0.10<br>0.1<br>0.05<br>0.02<br>0.01<br>0.01<br>SINGLE PULSE Notes:<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 14.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>100<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  Δ Tj = 125°C and<br>Tstart =25°C (Single Pulse)<br>10<br>1<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  ΔΤ j = 25°C and<br>Tstart = 125°C.<br>0.1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 15.   Typical Avalanche Current vs.Pulsewidth<br>140 Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse                 (For further info, see AN-1005 at www.irf.com)<br>1. Avalanche failures assumption:<br>120 BOTTOM   1.0% Duty Cycle Purely a thermal phenomenon and failure occurs at a temperature far in<br>ID = 50A excess of Tjmax. This is validated for every part type.<br>100 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.jmax is not exceeded. is not exceeded.<br>3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.<br>4. PD (ave) = Average power dissipation per single avalanche pulse.<br>80 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>during avalanche).<br>60 6. Iav = Allowable avalanche current.<br>7.  Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed asjmax (assumed as(assumed as<br>40 25°C in Figure 14, 15).<br>tav = Average time in avalanche.<br>D = Duty cycle in avalanche =  tav ·f<br>20 ZthJC(D, tav) = Transient thermal resistance, see Figures 13)<br>0 PD (ave) = 1/2 ( 1.3·BV·Iav) = � T/ ZthJC<br>25 50 75 100 125 150 Iav = 2 � T/ [1.3·BV·Zth]<br>Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tav<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.jmax is not exceeded. is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax (assumed asjmax (assumed as(assumed as 25°C in Figure 14, 15). 

**Fig 16.** Maximum Avalanche Energy vs. Temperature 

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4.5<br>4.0<br>Litt EEL<br>APL<br>3.5<br>etPt<br>SNeeannDN PN<br>3.0<br>ID = 100μA<br>ID = 1.0mA<br>2.5 I D  = 1.0A Zane<br>TTS<br>2.0<br>1.5<br>-75 -50 -25 0 25 50 75 100 125 150<br>TJ , Temperature ( °C )<br>Fig 17.   Threshold Voltage vs. Temperature<br>10<br>IF = 50A<br>VR = 34V<br>8<br>TJ = 25°C<br>TJ = 125°C<br>6<br>4<br>2<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>VGS(th), Gate threshold Voltage (V)<br>IRRM (A)<br>**----- End of picture text -----**<br>


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10<br>IF = 30A<br>VR = 34V<br>8 Pf]<br>TJ = 25°C<br>TJ = 125°C<br>6<br>| ile<br>P<br>4<br>ye<br>2 EEA<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>Fig. 18 - Typical Recovery Current vs. di;/dt<br>200<br>IF = 30A<br>VR = 34V<br>T  = 25°C<br>150 J<br>TJ = 125°C<br>100<br>50<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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200<br>IF = 50A<br>VR = 34V<br>150 T J  = 25°C Bae,<br>TJ = 125°C<br>a<br>BR<br>100<br>o<br>50<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + { P.W. + Period ——— + D = —— Period<br>) ©)    •  Circuit Layout Considerations ) fi V t GS=10V<br> •<br>| 1] - LowGround StrayPla I n eductance<br> •   CurrentLow LeakageTransformerInductance ® D.U.T. ISD Waveform<br>+<br>Reverse<br>fe) - a | a - ® + RecoveryCurrent r Body Diode ForwardCurrent di/dt /\ ——_<br>©) D.U.T. VDS Waveform Diode Recoverydv/dt ‘ '<br>00 =e VDD<br>iv<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re (A •   dv/dt controlled by Rg Vo p -<br>•<br>D.U.T. - Device Under Test e s ee<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" i) t<br>* Vag = 5V for Logic Level Devices<br>Fig 22.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V ~—— tp -><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>y 2V0VGS ab<br>tp 0.01 nN Ω IAS —<br>**----- End of picture text -----**<br>


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Fig 22a.   Unclamped Inductive Test Circuit<br>**----- End of picture text -----**<br>


**Fig 22b.** Unclamped Inductive Waveforms 

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+<br>-<br>≤ 1  ys<br>≤ 0.1 %<br>**----- End of picture text -----**<br>


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Fig 23a.   Switching Time Test Circuit<br>**----- End of picture text -----**<br>


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Current Regulator<br>Same Type as D.U.T.<br>50K Ω<br>ti 12V .2 μ F |<br>.3 μ F<br>‘ [| jt J +<br>D.U.T. -VDS<br>VGS<br>3mA<br>IG ID<br>Current Sampling Resistors<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

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VDS<br>90%<br>I<br>10% /\<br>VGS |l v l > | KSp l<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


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Fig 23b.   Switching Time Waveforms<br>**----- End of picture text -----**<br>


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Id<br>Vds<br>Vgs<br>|<br>1<br>Vgs(th)<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 24b.** Gate Charge Waveform 

http://www.irf.com/package/ 

**==> picture [72 x 18] intentionally omitted <==**

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INTERNATIONAL<br>RECTIFIER LOGO<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
DATE CODE<br>XXXX P ART NUMBER<br>ASSEMBLY (“4 or 5 digits”)<br>SITE CODE XYWWX M ARKING CODE<br>(Per SCOP 200-002) (Per Marking Spec)<br>XXXXX<br>PIN 1<br>IDENTIFIER<br>| LOT CODE<br>(Eng Mode - Min last 4 digits of EATI#)<br>(Prod Mode - 4 digits of SPN code)<br>**----- End of picture text -----**<br>


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REEL DIMENSIONS<br>**----- End of picture text -----**<br>


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TAPE DIMENSIONS<br>**----- End of picture text -----**<br>


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CODE DESCRIPTION<br>Ao Dimension design to accommodate the component width<br>Bo Dimension design to accommodate the component lenght<br>Ko Dimension design to accommodate the component thickness<br>W Overall width of the carrier tape<br>> P1 Pitch between successive cavity centers<br>**----- End of picture text -----**<br>


|~~_~~|~~_~~||W<br>P1<br>~~>~~|W<br>P1<br>~~>~~|W<br>P1<br>~~>~~|W<br>P1<br>~~>~~|W<br>P1<br>~~>~~|W<br>P1<br>~~>~~|W<br>P1<br>~~>~~|W<br>P1<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|Pitch between successive cavity centersy centerscenters<br>Overall width of the carrier tapepee<br>~~>~~|~~>~~|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
||||**QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE**||||||||**QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE**<br>Sprocke~~t~~<br>~~H~~oles|||||||||||||||
|||||SO||OOO|||||OA|||||||||||||||
|||||~~Jorfeef~~<br>~~Jor [ae|~~<br>Jos ~~[oe |~~<br>Jes ~~[oe|~~<br>Pocke~~t ~~Vroaroa~~te~~||||||||||User||||~~=>~~<br> Direction of Feed||||||||
|Note:  All dimension are nominal||||||||||||||||||||||||||
||Package|Reel|QTY|Reel||Ao|||||Bo|||Ko|||||||||P1|W|Pin 1|
||Type|Diameter||Width||(mm)||||(mm)||||(mm)||||||||(mm)||(mm)|Quadrant|
|||(Inch)||W1||||||||||||||||||||||
|||||(mm)||||||||||||||||||||||
||5 X 6 PQFN|13|4000|12.4||6.300||||5.300||||1.20||||||||8.00||12|Q1|



## **Qualification information**[†] 

|**Qualification information**[†]|||
|---|---|---|
|Qualification level|(per JEDEC JE S D47F  guidelines)††<br>Industrial||
|Moisture Sensitivity Level|(per JEDEC JE S D47F<br>PQFN 5mm x 6mm|MS L1<br>(per JE DEC J-S TD-020D††)<br>(per JEDEC JE S D47Fguidelines)|
|RoHS compliant|Yes||



## **Revision History** 

|**Date**|**Comment**|
|---|---|
|1/13/2014|• Updated ordering information to reflect the End-Of-Life (EOL) of the mini-reel option (EOL notice #259).<br>•Updated data sheet with the new IR corporate template.|
|2/19/2015|•Updated EAS (L =1mH)= 232mJ on page 2<br>•Updated note 10“Limited by TJmax, starting TJ =25°C, L=1mH, RG =50Ω, IAS =22A, VGS =10V”.  on page 2|
|6/2/2015|•Updated package outline for “option E” and  added package outline for “option G” on page 9.<br>•Updated "IFX" logo on page 1 & 11.<br>• Updated tape and reel on page 10.|
|7/7/2015|Updated tape and reel on page 10.<br>• Corrected package outline for“option E”on page 9.|



**IR WORLD HEADQUARTERS:** 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 



## Links

- [View this product on Novapart](https://novapart.co/products/IRFH7440TRPBF/power-mosfet-n-channel-40-v-85-a-2400-ohm-pqfn)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/irfh7440trpbf/mosfet-n-ch-40v-85a-pqfn/dp/2253807)
---

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