# Power MOSFET, N Channel, 40 V, 195 A, 1300 µohm, TO-220AB, Through Hole

![Product image](https://novapart.co/image/farnell:2253784/)

**URL**: https://novapart.co/products/IRFB7430PBF/power-mosfet-n-channel-40-v-195-a-1300-ohm-to
**SKU**: IRFB7430PBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €1.1300
**Stock**: 50+
**Lead Time**: 64 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:195A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.001ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.2V;

## Specifications

| Parameter | Value |
|---|---|
| Msl | - |
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | - |
| Qualification | - |
| Power Dissipation | 375W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220AB |
| Drain Source Voltage Vds | 40V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 195A |
| Drain Source On State Resistance | 1300µohm |
| Gate Source Threshold Voltage Max | 2.2V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:2253784/)

## **Applications** 

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e Brushed Motor drive applications HEXFET Power MOSFET<br>BLDC Motor drive applications<br>: Battery powered circuits D ee VDSS 40V ee<br>alf-bridge and full-bridge topologies RDS(on)   typ. 1.0m Ω<br>3: Synchronous rectifier applications —               max. | 1.3m Ω<br>G<br>Resonant mode power supplies<br>ID (Silicon Limited) 409A<br>OR-ing and redundant power switches<br>DC/DC and AC/DC converters S ID (Package Limited) 195A<br>ef<br>DC/AC Inverters<br>D<br>Benefits<br>. Improved  Gate, Avalanche and Dynamic dV/dt D S<br>Ruggedness G<br>Fully Characterized Capacitance and Avalanche<br>TO-220AB<br>     SOA<br>IRFB7430PbF<br>Enhanced body diode dV/dt and dI/dt Capability<br>Lead-Free<br>G D S<br>RoHS Compliant, Halogen-Free*<br>Gate Drain Source<br>**----- End of picture text -----**<br>


## **Benefits** 

Fully Characterized Capacitance and Avalanche SOA 

## **Ordering Information** 

|**Ordering Informationg Information Information**||||||
|---|---|---|---|---|---|
|**Base Part Number**|**Package Type**|**Standard Pack**|||**Complete Part Number**|
|||**Form**||**Quantity**||
|IRFB7430PbF|TO-220|Tube||50|IRFB7430PbF|



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6.0 500<br>ID = 100A<br>Limited By Package<br>400<br>4.0<br>300<br>T = 125°C<br>J<br>200<br>LL \ aacesee<br>2.0<br>100<br>TJ = 25°C<br>0.0 eeeTrae 0 PietPET T T TK<br>4 6 8 10 12 14 16 18 20 25 50 75 100 125 150 175<br> TC , Case Temperature (°C)<br>VGS, Gate -to -Source Voltage  (V)<br>Fig 1.    Typical On-Resistance vs. Gate Voltage Fig 2.   Maximum Drain Current vs. Case Temperature<br>)  Ω<br>RDS(on),  Drain-to -Source On Resistance (m<br>ID,  Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 2.** Maximum Drain Current vs. Case Temperature 

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## **Absolute Maximum Ratings** 

|**Symbol**|**Parameter**|**Max.**|**Max.**|**Units**|
|---|---|---|---|---|
|ID @ TC = 25°C|Continuous Drain Current,VGS @ 10V(Silicon Limited)|409�||A|
|ID @ TC = 100°C|Continuous Drain Current,VGS @ 10V(Silicon Limited)|289�|||
|ID @ TC = 25°C|Continuous Drain Current,VGS @ 10V(Wire Bond Limited)|195|||
|IDM|Pulsed Drain Current�|1524|||
|PD @TC = 25°C|Maximum Power Dissipation|375||W|
||Linear Derating Factor|2.5||W/°C|
|VGS|Gate-to-Source Voltage|± 20||V|
|TJ<br>TSTG|Operating Junction and<br>Storage Temperature Range|-55  to + 175||°C|
||<br>Soldering Temperature, for 10 seconds (1.6mm from case)|300|||
||Mounting torque, 6-32 or M3 screw|10lbf�in (1.1N�m)|||
|**Avalanche Characteristics**|||||
|EAS (Thermally limited)|Single Pulse Avalanche Energy �|760||mJ|
|EAS (Thermally limited)|Single Pulse Avalanche Energy�|1452|||
|IAR|Avalanche Current��|See Fig. 14, 15, 22a, 22b||A|
|EAR|Repetitive Avalanche Energy �|||mJ|
|**Thermal Resistance**|||||
|**Symbol**|**Parameter**|**Typ.**|**Max.**|**Units**|
|RθJC|Junction-to-Case�|–––|0.40|°C/W|
|RθCS|Case-to-Sink, Flat Greased Surface|0.50|–––||
|RθJA|Junction-to-Ambient|–––|62||



**Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Units**|**Conditions**|
|---|---|---|---|---|---|---|
|V(BR)DSS|Drain-to-Source Breakdown Voltage|40|–––|–––|V|VGS= 0V,ID= 250μA|
|ΔV(BR)DSS/ΔTJ|Breakdown Voltage Temp. Coefficient|–––|0.014|–––|V/°C|Reference to 25°C,ID= 1.0mA�|
|RDS(on)|Static Drain-to-Source On-Resistance|–––|1.0|1.3|mΩ|VGS= 10V,ID= 100A�|
|||–––|1.2|–––||VGS= 6.0V, ID= 50A�|
|VGS(th)|Gate Threshold Voltage|2.2|–––|3.9|V|VDS= VGS,ID= 250μA|
|IDSS|Drain-to-Source Leakage Current|–––|–––|1.0|μA|VDS= 40V,VGS= 0V|
|||–––|–––|150||VDS= 40V,VGS= 0V,TJ= 125°C|
|IGSS|Gate-to-Source Forward Leakage|–––|–––|100|nA|VGS= 20V|
||Gate-to-Source Reverse Leakage|–––|–––|-100||VGS= -20V|
|RG|Internal Gate Resistance|–––|2.1|–––|Ω||



## **������** 

- Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. ������������������ 

- Repetitive rating;  pulse width limited by max. junction temperature. 

- Limited by TJmax, starting TJ = 25°C, L = 0.15mH RG = 50 Ω , IAS = 100A, VGS =10V. 

- ISD ≤ 100A, di/dt ≤ 990A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. 

- Pulse width ≤ 400μs; duty cycle ≤ 2%. 

- Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 

- Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. 

- �θ ������������������������������������� . 

- Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50 Ω , IAS = 54A, VGS =10V. 

- Halogen -Free since April 30, 2014 

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## **Dynamic @ TJ = 25°C (unless otherwise specified)** 

|**Dynamic @ TJ =**|**25°C(unless otherwise specified)**||||||
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Units**|**Conditions**|
|gfs|Forward Transconductance|150|–––|–––|S|VDS= 10V,ID= 100A|
|Qg|Total Gate Charge|–––|300|460|nC|VGS= 10V�<br>VDS=20V<br>ID= 100A|
|Qgs|Gate-to-Source Charge|–––|77|–––|||
|Qgd|Gate-to-Drain("Miller")Charge|–––|98|–––|||
|Qsync|Total Gate Charge Sync.(Qg- Qgd)|–––|202|–––|||
|td(on)|Turn-On DelayTime|–––|32|–––|ns|RG= 2.7Ω<br>VGS= 10V�<br>ID= 30A<br>VDD= 20V|
|tr|Rise Time|–––|105|–––|||
|td(off)|Turn-Off DelayTime|–––|160|–––|||
|tf|Fall Time|–––|100|–––|||
|Ciss|Input Capacitance|–––|14240|–––|pF|VGS= 0V<br>VDS= 25V<br>ƒ= 1.0 MHz|
|Coss|Output Capacitance|–––|2130|–––|||
|Crss|Reverse Transfer Capacitance|–––|1460|–––|||
|Cosseff.(ER)|Effective Output Capacitance(EnergyRelated) ��|–––|2605|–––||VGS= 0V,VDS= 0V to 32V�|
|Cosseff.(TR)|Effective Output Capacitance(Time Related)�|–––|2920|–––||VGS= 0V,VDS= 0V to 32V�|
|**Diode Characteristics**|||||||
|**Symbol**|**Parameter**|**Min.**|**Typ.**|**Max.**|**Units**|**Conditions**|
|IS|Continuous Source Current<br>(Body Diode)|–––|–––|394�|A|S<br>D<br>G<br>showing  the<br>integral reverse<br>p-n junction diode.<br>MOSFET symbol|
|ISM|Pulsed Source Current<br>(Body Diode)��|–––|–––|1576|A||
|VSD|Diode Forward Voltage|–––|0.86|1.2|V|TJ= 25°C,IS= 100A,VGS= 0V�|
|dv/dt|Peak Diode Recovery �|–––|2.7|–––|V/ns|TJ= 175°C,IS= 100A,VDS= 40V|
|trr|Reverse Recovery Time|–––|52|–––|ns|TJ= 25°C<br>VR= 34V,<br>TJ= 125°C<br>IF= 100A<br>TJ= 25°C<br>di/dt = 100A/μs�<br>TJ= 125°C<br>TJ= 25°C|
|||–––|52|–––|||
|Qrr|Reverse Recovery Charge|–––|97|–––|nC||
|||–––|97|–––|||
|IRRM|Reverse RecoveryCurrent|–––|2.3|–––|A||



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1000<br>VGS<br>TOP           15V<br>10V<br>8.0V<br>7.0V<br>6.0V<br>5.5V<br>100 4.8V<br>BOTTOM 4.5V<br>10<br>4.5V<br>≤ 60μs PULSE WIDTH<br>Tj = 25°C<br>1<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 3.   Typical Output Characteristics<br>1000<br>100<br>TJ = 25°C<br>T = 175°C<br>10 J<br>VDS = 25V<br>≤ 60μs PULSE WIDTH<br>1.0<br>2 3 4 5 6 7<br>VGS, Gate-to-Source Voltage (V)<br>ID, Drain-to-Source Current (A)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Transfer Characteristics 

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100000<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = C gs + Cgd,  C ds SHORTED<br>C  = C<br>rss   gd<br>C = C + C<br>oss   ds  gd<br>Ciss<br>10000<br>C<br>oss<br>Crss<br>1000<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>C, Capacitance (pF)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Capacitance vs. Drain-to-Source Voltage 

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1000<br>VGS<br>TOP           15V<br>10V<br>8.0V<br>7.0V<br>6.0V<br>5.5V<br>4.8V<br>BOTTOM 4.5V<br>100<br>4.5V<br>≤ 60μs PULSE WIDTH<br>Tj = 175°C<br>10<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 4.   Typical Output Characteristics<br>2.0<br>ID = 100A<br>1.8 VGS = 10V<br>1.6<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Junction Temperature (°C)<br>  Normalized On-Resistance vs. Temperature<br>14.0<br>ID= 100A<br>12.0<br>VDS= 32V<br>10.0 V DS = 20V<br>8.0<br>6.0<br>4.0<br>2.0<br>0.0<br>0 50 100 150 200 250 300 350 400<br> QG,  Total Gate Charge (nC)<br>ID, Drain-to-Source Current (A)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 6.** Normalized On-Resistance vs. Temperature 

**Fig 8.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>T = 175°C<br>J<br>100<br>10<br>T = 25°C<br>J<br>1<br>VGS = 0V<br>0.1<br>0.0 0.5 1.0 1.5 2.0 2.5<br>VSD, Source-to-Drain Voltage (V)<br>Fig 9.   Typical Source-Drain Diode<br>Forward Voltage<br>47<br>Id = 1.0mA<br>46<br>CTT ee<br>45<br>BRRR E DZAGnne<br>L E<br>44<br>43<br>LATE<br>42<br>TALE TE<br>ALLE<br>41<br>40 CETEEE<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>ISD, Reverse Drain Current (A)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 11.** Drain-to-Source Breakdown Voltage 

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10000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>1000 100μsec<br>1msec<br>100<br>10msec<br>Limited by package<br>10<br>1 ° DC<br>Tc = 25 C<br>Tj = 175°C<br>Single Pulse<br>0.1<br>0.1 1 10 100<br>VDS, Drain-toSource Voltage (V)<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 10.** Maximum Safe Operating Area 

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2.5<br>VDS= 0V to 32V<br>2.0 TTT<br>1.5 PrP ry<br>1.0 Seeeee see<br>0.5 TTDAT<br>TY<br>0.0 7LAT<br>0 5 10 15 20 25 30 35 40 45<br>VDS, Drain-to-Source Voltage (V)<br>Fig 12.   Typical COSS Stored Energy<br>Energy (μJ)<br>**----- End of picture text -----**<br>


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6.0<br>VGS = 5.5V<br>VGS = 6.0V<br>VGS = 7.0V<br>4.0 EP VGS = 8.0V<br>VGS =10V<br>JAM<br>2.0<br>/| | |W<br>SS<br>0.0<br>0 200 400 600 800 1000 1200<br>ID, Drain Current (A)<br>) Ω<br>RDS(on),  Drain-to -Source On Resistance (m<br>**----- End of picture text -----**<br>


**Fig 13.** Typical On-Resistance vs. Drain Current 

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1<br>D = 0.50<br>0.1 0.20<br>0.10<br>0.05<br>0.01 0.02<br>0.01<br>0.001<br>Notes:<br>SINGLE PULSE<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>2. Peak Tj = P dm x Zthjc + Tc<br>0.0001<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


**Fig 14.** Maximum Effective Transient Thermal Impedance, Junction-to-Case 

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1000<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  Δ Tj = 150°C and<br>Tstart =25°C (Single Pulse)<br>100<br>10<br>Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  ΔΤ j = 25°C and<br>Tstart = 150°C.<br>1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Avalanche Current (A)<br>**----- End of picture text -----**<br>


**Fig 15.** Typical Avalanche Current vs.Pulsewidth 

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800<br>TOP          Single Pulse<br>700 BOTTOM   1.0% Duty Cycle<br>ID = 100A<br>600<br>500<br>400<br>300<br>200<br>100<br>0<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>**----- End of picture text -----**<br>


**Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)** 

1. Avalanche failures assumption: 

- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

4. PD (ave) = Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

6. Iav = Allowable avalanche current. 

7. Δ T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). 

- tav = Average time in avalanche. 

- D = Duty cycle in avalanche =  tav ·f 

- ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 

   - **PD (ave) = 1/2 ( 1.3·BV·Iav) =** � **T/ ZthJC Iav = 2** � **T/ [1.3·BV·Zth]** 

      - **EAS (AR) = PD (ave)·tav** 

**Fig 16.** Maximum Avalanche Energy vs. Temperature 

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4.0<br>Pen<br>3.5<br>SSAC<br>3.0<br>SNR<br>Zsa<br>2.5<br>ID = 250μA LPR<br>ID = 1.0mA<br>2.0 I D  = 1.0A CLILNNL<br>1.5<br>LILES<br>1.0<br>-75 -50 -25 0 25 50 75 100 125 150 175<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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12<br>IF = 60A<br>10 V R  = 34V E=<br>TJ = 25°C<br>8 T J  = 125°C LAoo Le<br>|<br>yo<br>6<br>| |<br>yl<br>4<br>Lf<br>7 | tt<br>2<br>| [<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


**Fig 17.** Threshold Voltage vs. Temperature 

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12<br>IF = 100A<br>10 V R  = 34V<br>TJ = 25°C<br>T  = 125°C<br>8 J<br>6<br>20<br>4<br>2 ylAA ft to]|<br>0<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>IRRM (A)<br>**----- End of picture text -----**<br>


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300<br>IF = 60A<br>VR = 34V<br>250<br>TJ = 25°C<br>TJ = 125°C<br>200<br>7<br>150<br>4<br>to]| 100 Yla | |<br>50<br>800 1000 0 200 400 600 800 1000<br>diF /dt (A/μs)<br>Current vs. di;/dt Fig. 20 - Typical Stored Charge vs. di;/dt<br>260<br>IF = 100A<br>VR = 34V<br>220 TJ = 25°C Wy<br>TJ = 125°C<br>|At 7 be<br>180<br>¢<br>140 Z|<br>Vann<br>100<br>60<br>0 200 400 600 800 1000<br>diF /dt (A/μs)<br>QRR (nC)<br>QRR (nC)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + { P.W. + Period ——— + D = —— Period<br>) ©) Circuit    •  Layout Considerations ) fi V t GS=10V<br> •<br>| 1] - LowGroundS'  PlaneInd<br> •   CurrentLow LeakageTransformerInductance ® D.U.T. ISD Waveform<br>+<br>= ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>©) D.U.T. VDS Waveform Diode Recoverydv/dt ‘ '<br>00 =e VDD<br>•  Re-Applied<br>Re •   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop iv<br>(A •   vidt controlled by Rg Vp p -<br>•<br>D.U.T. - Device Under Test e s ee<br>Ripple  ≤ 5% ISD<br>Isp controlled by Duty Factor "D" @)<br>* Vos = 5V for Logic Level Devices<br>Fig 22. eak Diode Recovery dv/dt Test Circuit or N-Channel<br>HEXFET ® ower MOSFETs<br>V(BR)DSS<br>15V << tp ><br>VDS L DRIVER<br>RG D.U.T +<br>- [V][DD]<br>IAS A<br>y 2V0VGS ab<br>tp 0.01 nN Ω IAS —<br> Unclamped Inductive Test Circuit Fig 22b.   Unclamped Inductive Waveforms<br>Rp<br>VDSDS<br>90%<br>Ves D.U.T. I<br>Ro L +<br>- Vop<br>i Ves 10%<br>Pulse Width  1 s VGSGS | ee,,<br>Duty Factor  0.1 % l v l > | p l<br>td(on)d(on) trr td(off)d(off)<br>  Switching Time Test Circuit Fig 23b.   Switching Time Waveforms<br>Current Regulator<br>Same Type as D.U.T. Vds<br>| ! 12V .2 μ F 50K Ω | fl Vgs<br>!: i .3 μ F | J + i<br>D.U.T. -VDS<br>Vgs(th)<br>VGS<br>3mA<br>IG ID<br>Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


**Fig 22b.** Unclamped Inductive Waveforms 

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Fig 22a.   Unclamped Inductive Test Circuit<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
VDSDS<br>90%<br>I<br>10% /\<br>| ee,,<br>VGSGS l v l > | p l<br>td(on)d(on) trr td(off)d(off) tf<br>Fig 23b.   Switching Time Waveforms<br>Id<br>Vds<br>fl Vgs<br>i<br>Vgs(th)<br>Qgs1 Qgs2 Qgd Qgodr<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Fig 23a.   Switching Time Test Circuit<br>**----- End of picture text -----**<br>


**Fig 24a.** Gate Charge Test Circuit 

**Fig 24b.** Gate Charge Waveform 

TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 

|y<br>Té4zR<br>IRFB7430PbF<br>wy|y<br>Té4zR<br>IRFB7430PbF<br>wy|y<br>Té4zR<br>IRFB7430PbF<br>wy|
|---|---|---|
|**Qualification information**†|||
|Qualification level|(per JEDEC JESD47F††guidelines)<br>Industrial||
|Moisture SensitivityLevel|TO-220|Not applicable|
|RoHS compliant|Yes||



## **Revision History** 

|**Date**|**Comment**|
|---|---|
|4/22/2014|•Updated data sheet with new IR corporate template.<br>•Updated  package outline and part marking on page 9.<br>•Added bulletpoint in the  Benefits  "RoHS Compliant,Halogen -Free" onpage 1.|
|2/19/2015|•Updated EAS (L =1mH)= 1452mJ on page 2<br>•Updated note 9  “Limited byTJmax,startingTJ= 25°C,L = 1mH,RG= 50Ω,IAS= 54A,VGS=10V”.  onpage 2|



## **IMPORTANT NOTICE** 

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . 

With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( **www.infineon.com** ). 

## **WARNINGS** 

Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. 

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 



## Links

- [View this product on Novapart](https://novapart.co/products/IRFB7430PBF/power-mosfet-n-channel-40-v-195-a-1300-ohm-to)
- [Request a quote for this part](https://novapart.co/quote/)
- [Supplier page](https://es.farnell.com/infineon/irfb7430pbf/mosfet-n-ch-40v-195a-to-220ab/dp/2253784)
---

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