# Power MOSFET, N Channel, 100 V, 62 A, 0.0135 ohm, TO-220AB, Through Hole

![Product image](https://novapart.co/image/farnell:3155133/)

**URL**: https://novapart.co/products/IRFB4510PBF/power-mosfet-n-channel-100-v-62-a-00135-ohm-to
**SKU**: IRFB4510PBF
**Manufacturer**: INFINEON
**Category**: Semiconductors - Discretes || FETs || Single MOSFETs
**Price**: €0.5200
**Stock**: 500+
**Lead Time**: 155 days (indicative)

## Description

Transistor Polarity:N Channel; Continuous Drain Current Id:62A; Drain Source Voltage Vds:100V; On Resistance Rds(on):0.0107ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs

## Specifications

| Parameter | Value |
|---|---|
| Svhc | No SVHC (25-Jun-2025) |
| No. Of Pins | 3Pins |
| Channel Type | N Channel |
| Product Range | HEXFET |
| Qualification | - |
| Power Dissipation | 140W |
| Transistor Mounting | Through Hole |
| Rds(On) Test Voltage | 10V |
| Transistor Case Style | TO-220AB |
| Drain Source Voltage Vds | 100V |
| Operating Temperature Max | 175°C |
| Continuous Drain Current Id | 62A |
| Drain Source On State Resistance | 0.0135ohm |
| Gate Source Threshold Voltage Max | 4V |

## Datasheet

📄 [Download PDF](https://novapart.co/datasheet/farnell:3155133/)

## IRFB4510PbF 

HEXFET Power MOSFET 

## **Applications** 

|D<br>**Applications**<br>High Efficiency Synchronous Rectification in SMPS<br>Uninterruptible Power Supply<br>**VDSS**<br>**100V**<br>**RDS(on)   typ.**<br>**10.7m**Ω||
|---|---|
|G<br>High Speed Power Switching<br>**max.**<br>**13.5m**Ω||
|S<br>Hard Switched and High Frequency Circuits<br>**ID (Silicon Limited)**<br>**62A**||
|**Benefits**||
|**Benefits**||
|Improved  Gate, Avalanche and Dynamic  dV/dt<br>D||
|Ruggedness||
|Fully Characterized Capacitance and Avalanche<br>SOA<br>Enhanced body diode dV/dt and dI/dt Capability<br>S<br>D<br>G<br>:||
|Lead-Free<br>TO-220AB||
|IRFB4510PbF||
|||
|**G**<br>**D**<br>**S**||
|Gate<br>Drain<br>Source||
|**Absolute Maximum Ratings**||
|**Symbol**<br>**Parameter**<br>**Units**<br>**Max.**||
|ID@ TC= 25°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>ID@ TC= 100°C<br>Continuous Drain Current, VGS@ 10V(Silicon Limited)<br>A<br>IDM<br>Pulsed Drain Current<br>PD@TC= 25°C<br>Maximum Power Dissipation<br>W<br>Linear DeratingFactor<br>W/°C<br>VGS<br>Gate-to-Source Voltage<br>V<br>dv/dt<br>Peak Diode Recovery<br>V/ns<br>140<br>3.2<br>± 20<br>0.95<br>62<br>44<br>250<br>~~a~~<br>~~aee~~<br>~~a~~<br>~~DGn~~<br>~~TD~~<br>~~St~~<br>~~TD~~<br>~~St~~<br>~~Po~~<br>~~Oe—eaesaiaiad~~||
|TJ<br>Operating Junction and<br>°C<br>-55  to + 175||
|TSTG<br>Storage Temperature Range||
|Soldering Temperature, for 10 seconds<br>300||
|(1.6mm from case)||
|Mountingtorque,6-32 or M3 screw<br>**Avalanche Characteristics**<br>10lb n(1.1N m)<br>~~TD~~<br>~~Sn~~||
|EAS(Thermallylimited)<br>Single Pulse Avalanche Energy<br>mJ<br>IAR<br>Avalanche Current<br>A<br>EAR<br>Repetitive Avalanche Energy<br>mJ<br>130<br>See Fig. 14, 15, 22a, 22b,<br>~~a~~<br>~~a~~<br>~~aS~~<br>~~a~~ |<br>~~a~~<br>~~es~~||
|**Thermal Resistance**||
|**Symbol**<br>**Parameter**<br>**Typ.**<br>**Max.**<br>**Units**<br>RθJC<br>Junction-to-Case<br>–––<br>1.05<br>RθCS<br>Case-to-Sink,Flat Greased Surface<br>0.50<br>–––<br>°C/W<br>RθJA<br>Junction-to-Ambient,TO-220<br>–––<br>62<br>~~nD~~<br>~~nD EE~~<br>~~on~~<br>~~GE~~<br>~~nn~~<br>~~Ge~~<br>~~Ss~~<br>~~GE)~~||



## **Benefits** 

> : Fully Characterized Capacitance and Avalanche SOA 

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4/10/12 

**Static @ TJ = 25°C (unless otherwise specified)** 

|**Symbol**|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|---|---|---|
|V(BR)DSS<br>Drain-to-Source Breakdown Voltage<br>100<br>–––<br>–––<br>V<br>ΔV(BR)DSS/ΔTJBreakdown Voltage Temp. Coefficient<br>–––<br>0.11<br>–––<br>V/°C<br>RDS(on)<br>Static Drain-to-Source On-Resistance<br>–––<br>10.7<br>13.5<br>mΩ<br>VGS(th)<br>Gate Threshold Voltage<br>2.0<br>–––<br>4.0<br>V<br>IDSS<br>Drain-to-Source Leakage Current<br>–––<br>–––<br>20<br>μA<br>–––<br>–––<br>250<br>IGSS<br>Gate-to-Source Forward Leakage<br>–––<br>–––<br>100<br>nA<br>Gate-to-Source Reverse Leakage<br>–––<br>–––<br>-100<br>RG<br>Internal Gate Resistance<br>–––<br>0.6<br>–––<br>Ω<br>VGS= 20V<br>VGS= -20V<br>VGS= 0V,ID= 250μA<br>Reference to 25°C,ID= 5mA<br>VGS= 10V,ID= 37A<br>VDS= VGS,ID= 100μA<br>VDS= 100V,VGS= 0V<br>VDS= 80V,VGS= 0V,TJ= 125°C<br>~~a~~<br>~~GG~~<br>~~GG OO~~<br>~~ee~~<br>~~Gs~~<br>~~OO~~<br>~~ee~~<br>~~a~~<br>~~a ee~~<br>~~qe~~<br>~~eG~~<br>~~GG GO~~<br>~~Pe~~|||
|**Dynamic @ TJ = 25°C(unless otherwise specified)**|||
|**Symbol**|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|gfs|Forward Transconductance<br>100<br>–––<br>–––<br>S<br>VDS= 25V,ID= 37A<br>~~QO GQ~~||
|Qg|Total Gate Charge<br>–––<br>58<br>87<br>nC<br>ID= 37A<br>~~ee~~||
|Qgs|Gate-to-Source Charge<br>–––<br>14<br>–––<br>VDS=50V<br>~~a~~||
|Qgd|Gate-to-Drain("Miller")Charge<br>–––<br>18<br>VGS= 10V<br>~~a~~<br>@||
|Qsync<br>td(on)<br>tr<br>td(off)|Total Gate Charge Sync.(Qg - Qgd)<br>–––<br>40<br>–––<br>Turn-On DelayTime<br>–––<br>13<br>–––<br>ns<br>Rise Time<br>–––<br>32<br>–––<br>Turn-Off DelayTime<br>–––<br>28<br>–––<br>ID= 37A<br>RG=2.7Ω<br>VDD= 65V<br>ID= 37A,VDS=0V,VGS= 10V<br>~~ee~~<br>~~**a**a~~||
|tf|Fall Time<br>–––<br>28<br>–––<br>VGS= 10V<br>~~a~~<br>®||
|Ciss|Input Capacitance<br>–––<br>3180<br>–––<br>pF<br>VGS= 0V<br>~~a~~||
|Coss|Output Capacitance<br>–––<br>220<br>–––<br>VDS= 50V<br>~~a~~||
|Crss|Reverse Transfer Capacitance<br>–––<br>120<br>–––<br>ƒ= 1.0MHz,See Fig.5<br>~~a~~||
|Coss eff.(ER) Effective Output Capacitance (Energy Related)<br>–––<br>260<br>–––<br>VGS= 0V,VDS= 0V to 80V<br>See Fig.1<br>~~a~~|||
|Coss eff.(TR) EffectiveOutputCapacitance(Time Related)<br>–––<br>325<br>–––<br>**Diode Characteristics**<br>VGS= 0V,VDS= 0V to 80V<br>~~ee~~|||
|**Symbol**|**Parameter**<br>**Min. Typ. Max. Units**<br>**Conditions**||
|IS<br>ISM<br>VSD<br>trr<br>Qrr<br>IRRM|S<br>D<br>G<br>Continuous Source Current<br>–––<br>–––<br>62<br>A<br>(BodyDiode)<br>Pulsed Source Current<br>–––<br>–––<br>250<br>A<br>(BodyDiode)<br>Diode Forward Voltage<br>–––<br>–––<br>1.3<br>V<br>Reverse Recovery Time<br>–––<br>54<br>81<br>ns<br>TJ = 25°C<br>VR= 85V,<br>–––<br>60<br>90<br>TJ = 125°C<br>IF= 37A<br>Reverse Recovery Charge<br>–––<br>95<br>140<br>nC<br>TJ = 25°C<br>di/dt = 100A/μs<br>–––<br>130<br>195<br>TJ = 125°C<br>Reverse RecoveryCurrent<br>–––<br>3.3<br>–––<br>A<br>TJ = 25°C<br>MOSFET symbol<br>showing  the<br>TJ= 25°C,IS= 37A,VGS= 0V<br>integral reverse<br>p-njunction diode.<br>~~ee eee~~<br>~~8~~<br>~~eG~~<br>~~QO~~<br>~~ee ee~~<br>~~**a**~~<br>~~ee ee~~<br>°<br>~~a~~||
|ton|Forward Turn-On Time<br>Intrinsic turn-on time is negligible(turn-on is dominated byLS+LD)<br>~~a~~||



Repetitive rating;  pulse width limited by max. junction 

Repetitive rating;  pulse width limited by max. junction fe) Coss eff. (TR) is a fixed capacitance that gives the same charging time temperature. as Coss while VDS is rising from 0 to 80% VDSS. 

@ Limited by TJmax, starting TJ = 25°C, L = 0.192mH © Coss eff. (ER) is a fixed capacitance that gives the same energy as RG = 25 Ω , IAS = 37A, VGS =10V. Part not recommended for use Coss while VDS is rising from 0 to 80% VDSS. above this value. 

- [R] 

- 6 ISD ≤ 37A, di/dt ≤ 1550A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.[@] ® Pulse width ≤ 400μs; duty cycle ≤ 2%. 

θ 

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1000<br>VGS<br>PEFR FEE TOP           15V<br>a eee                        10V 6.0V<br>100 AT 5.0V 4.8V<br>4.5V<br>Ee Pe ee |                       4.3V<br>mn Ad BOTTOM 4.0V<br>10 Pati ec<br>1 ReTUM ae al<br>PF||AEE a<br>ee 4.0V ey ee ee<br>≤  60μs PULSE WIDTH<br>Tj = 25°C<br>0.1 PEE | |<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 1.   Typical Output Characteristics<br>1000<br>ee ee ee ee<br>100<br>Se TJ = 175°C<br>— 4 ——<br>a ee) 2 ee ee eee<br>10<br>T = 25°C<br>J<br>1<br>=——— VDS = 50V<br>a Gy, ≤  60μs PULSE WIDTH<br>0.1 Ph<br>2.0 3.0 4.0 5.0 6.0 7.0<br>VGS, Gate-to-Source Voltage (V)<br>Fig 3.   Typical Transfer Characteristics<br>100000<br>VGS   = 0V,       f = 1 MHZ<br>Ciss   = Cgs + Cgd,  Cds SHORTED<br>= Crss   = Cgd<br>10000 C oss   = C ds  + C gd<br>_<br>Ciss<br>a a<br>1000<br>a EE<br>Coss<br>Pe Crss SS<br>100<br>Ea<br>a ee ee ee ee<br>10 FTtyEE ft<br>1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>) (Α<br>ID, Drain-to-Source Current<br>C, Capacitance (pF)<br>ID, Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 5.** Typical Capacitance vs. Drain-to-Source Voltage 

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1000<br>VGS<br>TOP           15V ee<br>                       10V6.0V en eee<br>5.0V<br>4.8V ell<br>100 4.5V<br>                      4.3VBOTTOM 4.0V ,, ae, 4c callane<br>nen)Ae anil<br>10 Oei 4.0V aaillll<br>geWO aEt<br>AGG | ee ||<br>≤  60μs PULSE WIDTH<br>Tj = 175°C<br>1 YL LLU | |<br>0.1 1 10 100<br>VDS, Drain-to-Source Voltage (V)<br>Fig 2.   Typical Output Characteristics<br>3.0<br>ID = 37A<br>2.5 V GS  = 10V L<br>FECL<br>2.0<br>LA<br>y<br>1.5<br>1.0 eer LLL<br>0.5 TEL ELELELEL<br>0.0<br>-60 -40 -20 0 20 40 60 80 100 120 140 160 180<br>TJ , Junction Temperature (°C)<br>Fig 4.   Normalized On-Resistance vs. Temperature<br>14<br>ID= 37A<br>12 VDS= 80V<br>pe oe<br>VDS= 50V<br>10 S| V DS = 20V Ly_|<br>8 L<br>ae Za<br>6<br>4 | LY |<br>20 Yo747 aa<br>0 20 40 60 80<br> QG  Total Gate Charge (nC)<br>RDS(on) , Drain-to-Source On Resistance                        (Normalized)<br>ID, Drain-to-Source Current (A)<br>VGS, Gate-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 4.** Normalized On-Resistance vs. Temperature 

**Fig 6.** Typical Gate Charge vs. Gate-to-Source Voltage 

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1000<br>100<br>TJ = 175°C<br>10<br>TJ = 25°C<br>1<br>VGS = 0V<br>0.1<br>0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6<br>VSD, Source-to-Drain Voltage (V)<br>ISD, Reverse Drain Current (A)<br>**----- End of picture text -----**<br>


**Fig 7.** Typical Source-Drain Diode Forward Voltage 

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70<br>60 CAREEERU000R<br>50<br>PASSE<br>40<br>PEEPS<br>30 COPPA<br>20<br>COPE<br>10 CTT<br>0 BERERRERREEL<br>25 50 75 100 125 150 175<br>TJ,  Junction Temperature (°C)<br>**----- End of picture text -----**<br>


**Fig 9.** Maximum Drain Current vs. Case Temperature 

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1.2<br>1.0<br>pt | | le<br>0.8<br>Peery<br>0.6<br>Py<br>0.4<br>ven<br>0.2<br>40m<br>0.0<br>er | | |<br>0 20 40 60 80 100<br>VDS, Drain-to-Source Voltage (V)<br>**----- End of picture text -----**<br>


**Fig 11.** Typical COSS Stored Energy 

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1000<br>OPERATION IN THIS AREA<br>LIMITED BY R DS(on)<br>100<br>100μsec<br>1msec<br>10<br>10msec<br>1<br>Tc = 25°C<br>Tj = 175°C DC<br>Single Pulse<br>0.1<br>1 10 100<br>VDS, Drain-toSource Voltage (V)<br>Fig 8.   Maximum Safe Operating Area<br>125<br>Id = 5mA<br>TTT<br>120<br>ATT<br>115<br>PEERDP Onn<br>110<br>Y<br>105<br>HERP AREER<br>100 ALTA<br>95<br>-60 -40 -20 0 20 40 60 80 100120140160180<br>TJ , Temperature ( °C )<br>Fig 10.   Drain-to-Source Breakdown Voltage<br>600<br>ID<br>500 TOP         4.7A<br>TE<br>12A<br>BOTTOM 37A<br>400<br>XCEL<br>300<br>NEL<br>200<br>SUISCUHEEERE<br>100<br>ONT<br>0 DUT PFSSSS<br>25 50 75 100 125 150 175<br>Starting TJ , Junction Temperature (°C)<br>V(BR)DSS, Drain-to-Source Breakdown Voltage (V)<br>EAS , Single Pulse Avalanche Energy (mJ)<br>ID,  Drain-to-Source Current (A)<br>**----- End of picture text -----**<br>


**Fig 12.** Maximum Avalanche Energy vs. DrainCurrent 

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T@R Rectifier<br>10<br>1 S|<br>D = 0.50<br>0.20<br>eeeee kl ee<br>0.10<br>0.1<br>0.05<br>ae 0.02<br>0.01<br>0.01 een a<br>Notes:<br>SINGLE PULSE<br>1. Duty Factor D = t1/t2<br>( THERMAL RESPONSE )<br>0.001 Fe Ot 2. Peak Tj = P dm x Zthjc + Tc ll<br>1E-006 1E-005 0.0001 0.001 0.01 0.1<br>t1 , Rectangular Pulse Duration (sec)<br>Fig 13.   Maximum Effective Transient Thermal Impedance, Junction-to-Case<br>100<br>Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche<br>pulsewidth, tav, assuming  Δ Tj = 150 ° C and<br>Sn a Tstart =25°C (Single Pulse) HH<br>SOI 0.01 AE eS<br>PRN TPS TTI DTI LTT<br>10 TIS<br>0.05<br>PS S EI<br>H S<br>Rt 0.10 SR<br>PISS<br>1 AESPe<br>eee<br>cre Allowed avalanche Current vs avalanche  ee eee ee ee ee eer<br>pulsewidth, tav, assuming  ΔΤ j = 25°C and  EES EES<br>Tstart = 150°C.<br>Poa OO oe  er 0 0 | 0| ee ee ee|es<br>0.1<br>1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01<br>tav (sec)<br>Fig 14.   Typical Avalanche Current vs.Pulsewidth<br>140 Notes on Repetitive Avalanche Curves , Figures 14, 15:<br>TOP          Single Pulse                 (For further info, see AN-1005 at www.irf.com)<br>120 \ BOTTOM   1% Duty CycleID = 37A 1. Avalanche failures assumption:Purely a thermal phenomenon and failure occurs at a temperature far in<br>100 excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type.<br>2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded.<br>3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.<br>ENSNERRREEE<br>80 4. PD (ave) = Average power dissipation per single avalanche pulse.<br>5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase<br>60 during avalanche).<br>6. Iav = Allowable avalanche current.<br>ESN SCEREEEE<br>40 7.  Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as<br>25°C in Figure 14, 15).<br>LINN tav = Average time in avalanche.<br>20 D = Duty cycle in avalanche =  tav ·f<br>LLNS ZthJC(D, tav) = Transient thermal resistance, see Figures 13)<br>ELLE<br>0 EE MNA<br>25 50 75 100 125 150 175 PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) = A T/ ZthJCthJC<br>Iav =av == 2 A T/ [1.3·BV·Zth]th]]<br>Starting TJ , Junction Temperature (°C)<br>EAR , Avalanche Energy (mJ)<br>Avalanche Current (A)<br>Thermal Response ( Z thJC ) °C/W<br>**----- End of picture text -----**<br>


- Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type.jmax. This is validated for every part type.. This is validated for every part type. 

2. Safe operation in Avalanche is allowed as long asTjmaxjmax is not exceeded. 

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 

7. Δ T = Allowable rise in junction temperature, not to exceed = Allowable rise in junction temperature, not to exceedAllowable rise in junction temperature, not to exceed Tjmax jmax (assumed as 25°C in Figure 14, 15). 

**PD (ave) = 1/2 ( 1.3·BV·Iav) =D (ave) = 1/2 ( 1.3·BV·Iav) = = 1/2 ( 1.3·BV·Iav) =av) =) =** A **T/ ZthJCthJC Iav =av == 2** A **T/ [1.3·BV·Zth]th]] EAS (AR) = PD (ave)·tav** 

**Fig 15.** Maximum Avalanche Energy vs. Temperature 

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4.5 pot | ft tt Et<br>4.0 |ENGR | T=~wy tt tt tt<br>ENGR<br>3.5<br>ONE<br>Pt | RAL TE TE NL<br>3.0<br>SSPt<br>Pt tT tT | ye<br>2.5<br>-CEERRSE<br>2.0 I D = 100μA 100μA TAZA NA<br>I D = 250μA 250μA A AZ| | AAIN<br>TAT| INAT<br>1.5 I D = 1.0mA 1.0mA ATAT| | | | | NN I<br>I D  = 1.0A 1.0A<br>PPTL<br>1.0 | | | tt |<br>-75 -50 -25 0 25 50 75 100 125 150 175 200<br>TJ , Temperature ( °C )<br>VGS(th), Gate threshold Voltage (V)<br>**----- End of picture text -----**<br>


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4.5 pot | ft tt Et 24<br>4.0 |ENGR | T=~wy tt tt tt 20 ;<br>3.5<br>ONE CCA<br>16<br>Pt | RAL TE TE NL Po<br>3.0<br>SSPt tT tT | ye 12 Gannp>2a0 | ot 4 |<br>2.5<br>-CEERRSE err<br>8<br>2.0 I D = 100μA 100μA TAZA NA aa IF = 24A<br>I D = 250μA 250μA A AZ| | AAIN a VR = 80V ——<br>1.5 I D = 1.0mA 1.0mA ATAT| | | INAT | NN I 4 p cA TJ = 125°C<br>I D  = 1.0A 1.0A TJ =  25°C<br>PPTL LIE<br>1.0 | | | tt | 0 | |<br>100 200 300 400 500 600 700 800 900 1000<br>-75 -50 -25 0 25 50 75 100 125 150 175 200<br>TJ , Temperature ( °C ) dif / dt - (A / μs)<br>Fig. 17 - Typical Recovery Current vs. di;/dt<br>Fig 16.   Threshold Voltage vs. Temperature<br>24 600<br>2016 Sy ae 500400 Pe<br>cd er<br>128 SE EaeZanie pat] Bea A" 300200 SPBibbeyeyl?<br>IF = 37A IF = 24A<br>VR = 80V VR = 80V<br>4 iii 100<br>i TJ = 125°C  | rer TJ = 125°C<br>TJ =  25°C TJ =  25°C<br>0 PCE 0 PEPE| =|<br>100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs) dif / dt - (A / μs)<br>VGS(th), Gate threshold Voltage (V)<br>QRR - (nC)<br>IRRM - (A)<br>IRRM - (A)<br>**----- End of picture text -----**<br>


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600<br>¢<br>500<br>elt [yyy] le<br>¢<br>400 Pt ae<br>¢ |<br>300<br>SERED<br>200<br>IF = 37A<br>CT [LP][e][T] Ze<br>VR = 80V<br>100<br>TJ = 125°C<br>T  =  25°C<br>J<br>0<br>100 200 300 400 500 600 700 800 900 1000<br>dif / dt - (A / μs)<br>QRR - (nC)<br>**----- End of picture text -----**<br>


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Driver Gate Drive<br>P.W.<br>D.U.T + { P.W. + Period ——— + D = —— Period<br>) [©)]    •  CircuitLow  LayoutStray ConsiderationsInduct | V t t GS=10<br> •<br>- •   CurrentLow LeakageTransformerInductance @ D.U.T. ISD Waveform<br>+<br>® = ReverseRecovery Body Diode Forward \<br>- a - ® + Current r Current di/dt /<br>® D.U.T. VDS Waveform Diode Recoverydv/dt ‘<br>o) 00 > VDD<br>ma<br>•   Re-Applied<br>•   Driver same type as D.U.T. + Voltage Body Diode  Forward Drop<br>Re (A •   dv/dt controlled by Rg Vp p -<br>•<br>D.U.T. - Device Under Test SCO |<br>Ripple  ≤ 5% ISD<br>on Isp controlled by Duty Factor "D" @\ t<br>* Vg = 5V for Logic Level Devices<br>Fig 21.  Peak Diode Recovery dv/dt Test Circuit for N-Channel<br>HEXFET ® Power MOSFETs<br>V(BR)DSS<br>15V << tp ><br>VDS L DRIVER<br>RG D.U.T +<br>| IAS - [V][DD] A y |<br>20V<br>gy dt tp 0.01 Ω IAS |<br>Fig 22a.   Unclamped Inductive Test Circuit Fig 22b.   Unclamped Inductive Waveforms<br>LD<br>VDS V<br>DS<br>90%<br>+<br>VDD -<br>D.U.T 10%<br>i) VGS VGS ' \ f ewA H<br>Second Pulse Width < 1μs  IN on<br>Duty Factor < 0.1%<br>td(on) tr td(off) tf<br>Fig 23a.   Switching Time Test Circuit Fig 23b.   Switching Time Waveforms<br>Id<br>Vds<br>Vgs<br>L<br>VCC<br>DUT<br>0<br>S Vgs(th)<br>201 K<br>Sm: H Qgodr \ Qgd Qgs2 ' ‘ge Qgs1 !<br>Fig 24a.   Gate Charge Test Circuit Fig 24b.    Gate Charge Waveform<br>**----- End of picture text -----**<br>


**Fig 22b.** Unclamped Inductive Waveforms 

www.irf.com 

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EXAMPLE: THIS IS AN IRF1010<br>LOT CODE 1789 INTERNATIONAL PART NUMBER<br>ASSEMBLED ON WW 19, 2000 RECTIFIER<br>I RF 1010<br>IN THE ASSEMBLY LINE "C" LOGO IeaR 019C<br>17 89 DATE CODE<br>YEAR 0 =  2000<br>Note: "P" in assembly line position ASSEMBLY<br>indicates "Lead - Free" LOT CODE WEEK 19<br>LINE C<br>**----- End of picture text -----**<br>


TO-220AB packages are not recommended for Surface Mount Application. 

Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. 

**IR WORLD HEADQUARTERS:** 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information **.** 04/12 

www.irf.com 

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- [View this product on Novapart](https://novapart.co/products/IRFB4510PBF/power-mosfet-n-channel-100-v-62-a-00135-ohm-to)
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- [Supplier page](https://es.farnell.com/infineon/irfb4510pbf/mosfet-n-ch-100v-62a-175deg-c/dp/3155133)
---

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